0001
0002
0003
0004
0005
0006
0007
0008
0009 #ifndef __QETH_CORE_MPC_H__
0010 #define __QETH_CORE_MPC_H__
0011
0012 #include <asm/qeth.h>
0013 #include <uapi/linux/if_ether.h>
0014 #include <uapi/linux/in6.h>
0015
0016 extern const unsigned char IPA_PDU_HEADER[];
0017 #define IPA_PDU_HEADER_SIZE 0x40
0018 #define QETH_IPA_PDU_LEN_TOTAL(buffer) (buffer + 0x0e)
0019 #define QETH_IPA_PDU_LEN_PDU1(buffer) (buffer + 0x26)
0020 #define QETH_IPA_PDU_LEN_PDU2(buffer) (buffer + 0x29)
0021 #define QETH_IPA_PDU_LEN_PDU3(buffer) (buffer + 0x3a)
0022
0023 #define QETH_IPA_CMD_DEST_ADDR(buffer) (buffer + 0x2c)
0024
0025 #define QETH_SEQ_NO_LENGTH 4
0026 #define QETH_MPC_TOKEN_LENGTH 4
0027 #define QETH_MCL_LENGTH 4
0028
0029 #define QETH_TIMEOUT (10 * HZ)
0030 #define QETH_IPA_TIMEOUT (45 * HZ)
0031
0032
0033
0034
0035 #define IPA_CMD_INITIATOR_HOST 0x00
0036 #define IPA_CMD_INITIATOR_OSA 0x01
0037 #define IPA_CMD_PRIM_VERSION_NO 0x01
0038
0039 struct qeth_ipa_caps {
0040 u32 supported;
0041 u32 enabled;
0042 };
0043
0044 static inline bool qeth_ipa_caps_supported(struct qeth_ipa_caps *caps, u32 mask)
0045 {
0046 return (caps->supported & mask) == mask;
0047 }
0048
0049 static inline bool qeth_ipa_caps_enabled(struct qeth_ipa_caps *caps, u32 mask)
0050 {
0051 return (caps->enabled & mask) == mask;
0052 }
0053
0054 #define qeth_adp_supported(c, f) \
0055 qeth_ipa_caps_supported(&c->options.adp, f)
0056 #define qeth_is_supported(c, f) \
0057 qeth_ipa_caps_supported(&c->options.ipa4, f)
0058 #define qeth_is_supported6(c, f) \
0059 qeth_ipa_caps_supported(&c->options.ipa6, f)
0060 #define qeth_is_ipafunc_supported(c, prot, f) \
0061 ((prot == QETH_PROT_IPV6) ? qeth_is_supported6(c, f) : \
0062 qeth_is_supported(c, f))
0063
0064 enum qeth_card_types {
0065 QETH_CARD_TYPE_OSD = 1,
0066 QETH_CARD_TYPE_IQD = 5,
0067 QETH_CARD_TYPE_OSM = 3,
0068 QETH_CARD_TYPE_OSX = 2,
0069 };
0070
0071 #define IS_IQD(card) ((card)->info.type == QETH_CARD_TYPE_IQD)
0072 #define IS_OSD(card) ((card)->info.type == QETH_CARD_TYPE_OSD)
0073 #define IS_OSM(card) ((card)->info.type == QETH_CARD_TYPE_OSM)
0074
0075 #ifdef CONFIG_QETH_OSX
0076 #define IS_OSX(card) ((card)->info.type == QETH_CARD_TYPE_OSX)
0077 #else
0078 #define IS_OSX(card) false
0079 #endif
0080
0081 #define IS_VM_NIC(card) ((card)->info.is_vm_nic)
0082
0083 #define QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE 0x18
0084
0085 enum qeth_link_types {
0086 QETH_LINK_TYPE_FAST_ETH = 0x01,
0087 QETH_LINK_TYPE_HSTR = 0x02,
0088 QETH_LINK_TYPE_GBIT_ETH = 0x03,
0089 QETH_LINK_TYPE_10GBIT_ETH = 0x10,
0090 QETH_LINK_TYPE_25GBIT_ETH = 0x12,
0091 QETH_LINK_TYPE_LANE_ETH100 = 0x81,
0092 QETH_LINK_TYPE_LANE_TR = 0x82,
0093 QETH_LINK_TYPE_LANE_ETH1000 = 0x83,
0094 QETH_LINK_TYPE_LANE = 0x88,
0095 };
0096
0097 enum qeth_routing_types {
0098
0099 NO_ROUTER = 0,
0100 PRIMARY_ROUTER = 1,
0101 SECONDARY_ROUTER = 2,
0102 MULTICAST_ROUTER = 3,
0103 PRIMARY_CONNECTOR = 4,
0104 SECONDARY_CONNECTOR = 5,
0105 };
0106
0107
0108 enum qeth_ipa_cmds {
0109 IPA_CMD_STARTLAN = 0x01,
0110 IPA_CMD_STOPLAN = 0x02,
0111 IPA_CMD_SETVMAC = 0x21,
0112 IPA_CMD_DELVMAC = 0x22,
0113 IPA_CMD_SETGMAC = 0x23,
0114 IPA_CMD_DELGMAC = 0x24,
0115 IPA_CMD_SETVLAN = 0x25,
0116 IPA_CMD_DELVLAN = 0x26,
0117 IPA_CMD_VNICC = 0x2a,
0118 IPA_CMD_SETBRIDGEPORT_OSA = 0x2b,
0119 IPA_CMD_SETIP = 0xb1,
0120 IPA_CMD_QIPASSIST = 0xb2,
0121 IPA_CMD_SETASSPARMS = 0xb3,
0122 IPA_CMD_SETIPM = 0xb4,
0123 IPA_CMD_DELIPM = 0xb5,
0124 IPA_CMD_SETRTG = 0xb6,
0125 IPA_CMD_DELIP = 0xb7,
0126 IPA_CMD_SETADAPTERPARMS = 0xb8,
0127 IPA_CMD_SET_DIAG_ASS = 0xb9,
0128 IPA_CMD_SETBRIDGEPORT_IQD = 0xbe,
0129 IPA_CMD_CREATE_ADDR = 0xc3,
0130 IPA_CMD_DESTROY_ADDR = 0xc4,
0131 IPA_CMD_REGISTER_LOCAL_ADDR = 0xd1,
0132 IPA_CMD_UNREGISTER_LOCAL_ADDR = 0xd2,
0133 IPA_CMD_ADDRESS_CHANGE_NOTIF = 0xd3,
0134 IPA_CMD_UNKNOWN = 0x00
0135 };
0136
0137 enum qeth_ip_ass_cmds {
0138 IPA_CMD_ASS_START = 0x0001,
0139 IPA_CMD_ASS_STOP = 0x0002,
0140 IPA_CMD_ASS_CONFIGURE = 0x0003,
0141 IPA_CMD_ASS_ENABLE = 0x0004,
0142 };
0143
0144 enum qeth_arp_process_subcmds {
0145 IPA_CMD_ASS_ARP_SET_NO_ENTRIES = 0x0003,
0146 IPA_CMD_ASS_ARP_QUERY_CACHE = 0x0004,
0147 IPA_CMD_ASS_ARP_ADD_ENTRY = 0x0005,
0148 IPA_CMD_ASS_ARP_REMOVE_ENTRY = 0x0006,
0149 IPA_CMD_ASS_ARP_FLUSH_CACHE = 0x0007,
0150 IPA_CMD_ASS_ARP_QUERY_INFO = 0x0104,
0151 IPA_CMD_ASS_ARP_QUERY_STATS = 0x0204,
0152 };
0153
0154
0155
0156
0157
0158 enum qeth_ipa_return_codes {
0159 IPA_RC_SUCCESS = 0x0000,
0160 IPA_RC_NOTSUPP = 0x0001,
0161 IPA_RC_IP_TABLE_FULL = 0x0002,
0162 IPA_RC_UNKNOWN_ERROR = 0x0003,
0163 IPA_RC_UNSUPPORTED_COMMAND = 0x0004,
0164 IPA_RC_TRACE_ALREADY_ACTIVE = 0x0005,
0165 IPA_RC_INVALID_FORMAT = 0x0006,
0166 IPA_RC_DUP_IPV6_REMOTE = 0x0008,
0167 IPA_RC_SBP_IQD_NOT_CONFIGURED = 0x000C,
0168 IPA_RC_DUP_IPV6_HOME = 0x0010,
0169 IPA_RC_UNREGISTERED_ADDR = 0x0011,
0170 IPA_RC_NO_ID_AVAILABLE = 0x0012,
0171 IPA_RC_ID_NOT_FOUND = 0x0013,
0172 IPA_RC_SBP_IQD_ANO_DEV_PRIMARY = 0x0014,
0173 IPA_RC_SBP_IQD_CURRENT_SECOND = 0x0018,
0174 IPA_RC_SBP_IQD_LIMIT_SECOND = 0x001C,
0175 IPA_RC_INVALID_IP_VERSION = 0x0020,
0176 IPA_RC_SBP_IQD_CURRENT_PRIMARY = 0x0024,
0177 IPA_RC_LAN_FRAME_MISMATCH = 0x0040,
0178 IPA_RC_SBP_IQD_NO_QDIO_QUEUES = 0x00EB,
0179 IPA_RC_L2_UNSUPPORTED_CMD = 0x2003,
0180 IPA_RC_L2_DUP_MAC = 0x2005,
0181 IPA_RC_L2_ADDR_TABLE_FULL = 0x2006,
0182 IPA_RC_L2_DUP_LAYER3_MAC = 0x200a,
0183 IPA_RC_L2_GMAC_NOT_FOUND = 0x200b,
0184 IPA_RC_L2_MAC_NOT_AUTH_BY_HYP = 0x200c,
0185 IPA_RC_L2_MAC_NOT_AUTH_BY_ADP = 0x200d,
0186 IPA_RC_L2_MAC_NOT_FOUND = 0x2010,
0187 IPA_RC_L2_INVALID_VLAN_ID = 0x2015,
0188 IPA_RC_L2_DUP_VLAN_ID = 0x2016,
0189 IPA_RC_L2_VLAN_ID_NOT_FOUND = 0x2017,
0190 IPA_RC_L2_VLAN_ID_NOT_ALLOWED = 0x2050,
0191 IPA_RC_VNICC_VNICBP = 0x20B0,
0192 IPA_RC_SBP_OSA_NOT_CONFIGURED = 0x2B0C,
0193 IPA_RC_SBP_OSA_OS_MISMATCH = 0x2B10,
0194 IPA_RC_SBP_OSA_ANO_DEV_PRIMARY = 0x2B14,
0195 IPA_RC_SBP_OSA_CURRENT_SECOND = 0x2B18,
0196 IPA_RC_SBP_OSA_LIMIT_SECOND = 0x2B1C,
0197 IPA_RC_SBP_OSA_NOT_AUTHD_BY_ZMAN = 0x2B20,
0198 IPA_RC_SBP_OSA_CURRENT_PRIMARY = 0x2B24,
0199 IPA_RC_SBP_OSA_NO_QDIO_QUEUES = 0x2BEB,
0200 IPA_RC_DATA_MISMATCH = 0xe001,
0201 IPA_RC_INVALID_MTU_SIZE = 0xe002,
0202 IPA_RC_INVALID_LANTYPE = 0xe003,
0203 IPA_RC_INVALID_LANNUM = 0xe004,
0204 IPA_RC_DUPLICATE_IP_ADDRESS = 0xe005,
0205 IPA_RC_IP_ADDR_TABLE_FULL = 0xe006,
0206 IPA_RC_LAN_PORT_STATE_ERROR = 0xe007,
0207 IPA_RC_SETIP_NO_STARTLAN = 0xe008,
0208 IPA_RC_SETIP_ALREADY_RECEIVED = 0xe009,
0209 IPA_RC_IP_ADDR_ALREADY_USED = 0xe00a,
0210 IPA_RC_MC_ADDR_NOT_FOUND = 0xe00b,
0211 IPA_RC_SETIP_INVALID_VERSION = 0xe00d,
0212 IPA_RC_UNSUPPORTED_SUBCMD = 0xe00e,
0213 IPA_RC_ARP_ASSIST_NO_ENABLE = 0xe00f,
0214 IPA_RC_PRIMARY_ALREADY_DEFINED = 0xe010,
0215 IPA_RC_SECOND_ALREADY_DEFINED = 0xe011,
0216 IPA_RC_INVALID_SETRTG_INDICATOR = 0xe012,
0217 IPA_RC_MC_ADDR_ALREADY_DEFINED = 0xe013,
0218 IPA_RC_LAN_OFFLINE = 0xe080,
0219 IPA_RC_VEPA_TO_VEB_TRANSITION = 0xe090,
0220 IPA_RC_INVALID_IP_VERSION2 = 0xf001,
0221 IPA_RC_FFFF = 0xffff
0222 };
0223
0224 #define IPA_RC_VNICC_OOSEQ 0x0005
0225
0226
0227 #define IPA_RC_INVALID_SUBCMD IPA_RC_IP_TABLE_FULL
0228 #define IPA_RC_HARDWARE_AUTH_ERROR IPA_RC_UNKNOWN_ERROR
0229
0230
0231 #define IPA_RC_SBP_IQD_OS_MISMATCH IPA_RC_DUP_IPV6_HOME
0232 #define IPA_RC_SBP_IQD_NOT_AUTHD_BY_ZMAN IPA_RC_INVALID_IP_VERSION
0233
0234
0235 enum qeth_ipa_funcs {
0236 IPA_ARP_PROCESSING = 0x00000001L,
0237 IPA_INBOUND_CHECKSUM = 0x00000002L,
0238 IPA_OUTBOUND_CHECKSUM = 0x00000004L,
0239
0240 IPA_FILTERING = 0x00000010L,
0241 IPA_IPV6 = 0x00000020L,
0242 IPA_MULTICASTING = 0x00000040L,
0243 IPA_IP_REASSEMBLY = 0x00000080L,
0244 IPA_QUERY_ARP_COUNTERS = 0x00000100L,
0245 IPA_QUERY_ARP_ADDR_INFO = 0x00000200L,
0246 IPA_SETADAPTERPARMS = 0x00000400L,
0247 IPA_VLAN_PRIO = 0x00000800L,
0248 IPA_PASSTHRU = 0x00001000L,
0249 IPA_FLUSH_ARP_SUPPORT = 0x00002000L,
0250 IPA_FULL_VLAN = 0x00004000L,
0251 IPA_INBOUND_PASSTHRU = 0x00008000L,
0252 IPA_SOURCE_MAC = 0x00010000L,
0253 IPA_OSA_MC_ROUTER = 0x00020000L,
0254 IPA_QUERY_ARP_ASSIST = 0x00040000L,
0255 IPA_INBOUND_TSO = 0x00080000L,
0256 IPA_OUTBOUND_TSO = 0x00100000L,
0257 IPA_INBOUND_CHECKSUM_V6 = 0x00400000L,
0258 IPA_OUTBOUND_CHECKSUM_V6 = 0x00800000L,
0259 };
0260
0261
0262 enum qeth_ipa_setdelip_flags {
0263 QETH_IPA_SETDELIP_DEFAULT = 0x00L,
0264 QETH_IPA_SETIP_VIPA_FLAG = 0x01L,
0265 QETH_IPA_SETIP_TAKEOVER_FLAG = 0x02L,
0266 QETH_IPA_DELIP_ADDR_2_B_TAKEN_OVER = 0x20L,
0267 QETH_IPA_DELIP_VIPA_FLAG = 0x40L,
0268 QETH_IPA_DELIP_ADDR_NEEDS_SETIP = 0x80L,
0269 };
0270
0271
0272 enum qeth_ipa_setadp_cmd {
0273 IPA_SETADP_QUERY_COMMANDS_SUPPORTED = 0x00000001L,
0274 IPA_SETADP_ALTER_MAC_ADDRESS = 0x00000002L,
0275 IPA_SETADP_ADD_DELETE_GROUP_ADDRESS = 0x00000004L,
0276 IPA_SETADP_ADD_DELETE_FUNCTIONAL_ADDR = 0x00000008L,
0277 IPA_SETADP_SET_ADDRESSING_MODE = 0x00000010L,
0278 IPA_SETADP_SET_CONFIG_PARMS = 0x00000020L,
0279 IPA_SETADP_SET_CONFIG_PARMS_EXTENDED = 0x00000040L,
0280 IPA_SETADP_SET_BROADCAST_MODE = 0x00000080L,
0281 IPA_SETADP_SEND_OSA_MESSAGE = 0x00000100L,
0282 IPA_SETADP_SET_SNMP_CONTROL = 0x00000200L,
0283 IPA_SETADP_QUERY_CARD_INFO = 0x00000400L,
0284 IPA_SETADP_SET_PROMISC_MODE = 0x00000800L,
0285 IPA_SETADP_SET_DIAG_ASSIST = 0x00002000L,
0286 IPA_SETADP_SET_ACCESS_CONTROL = 0x00010000L,
0287 IPA_SETADP_QUERY_OAT = 0x00080000L,
0288 IPA_SETADP_QUERY_SWITCH_ATTRIBUTES = 0x00100000L,
0289 };
0290 enum qeth_ipa_mac_ops {
0291 CHANGE_ADDR_READ_MAC = 0,
0292 CHANGE_ADDR_REPLACE_MAC = 1,
0293 CHANGE_ADDR_ADD_MAC = 2,
0294 CHANGE_ADDR_DEL_MAC = 4,
0295 CHANGE_ADDR_RESET_MAC = 8,
0296 };
0297 enum qeth_ipa_addr_ops {
0298 CHANGE_ADDR_READ_ADDR = 0,
0299 CHANGE_ADDR_ADD_ADDR = 1,
0300 CHANGE_ADDR_DEL_ADDR = 2,
0301 CHANGE_ADDR_FLUSH_ADDR_TABLE = 4,
0302 };
0303 enum qeth_ipa_promisc_modes {
0304 SET_PROMISC_MODE_OFF = 0,
0305 SET_PROMISC_MODE_ON = 1,
0306 };
0307 enum qeth_ipa_isolation_modes {
0308 ISOLATION_MODE_NONE = 0x00000000L,
0309 ISOLATION_MODE_FWD = 0x00000001L,
0310 ISOLATION_MODE_DROP = 0x00000002L,
0311 };
0312 enum qeth_ipa_set_access_mode_rc {
0313 SET_ACCESS_CTRL_RC_SUCCESS = 0x0000,
0314 SET_ACCESS_CTRL_RC_NOT_SUPPORTED = 0x0004,
0315 SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED = 0x0008,
0316 SET_ACCESS_CTRL_RC_ALREADY_ISOLATED = 0x0010,
0317 SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER = 0x0014,
0318 SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF = 0x0018,
0319 SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED = 0x0022,
0320 SET_ACCESS_CTRL_RC_REFLREL_FAILED = 0x0024,
0321 SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED = 0x0028,
0322 };
0323 enum qeth_card_info_card_type {
0324 CARD_INFO_TYPE_1G_COPPER_A = 0x61,
0325 CARD_INFO_TYPE_1G_FIBRE_A = 0x71,
0326 CARD_INFO_TYPE_10G_FIBRE_A = 0x91,
0327 CARD_INFO_TYPE_1G_COPPER_B = 0xb1,
0328 CARD_INFO_TYPE_1G_FIBRE_B = 0xa1,
0329 CARD_INFO_TYPE_10G_FIBRE_B = 0xc1,
0330 };
0331 enum qeth_card_info_port_mode {
0332 CARD_INFO_PORTM_HALFDUPLEX = 0x0002,
0333 CARD_INFO_PORTM_FULLDUPLEX = 0x0003,
0334 };
0335 enum qeth_card_info_port_speed {
0336 CARD_INFO_PORTS_10M = 0x00000005,
0337 CARD_INFO_PORTS_100M = 0x00000006,
0338 CARD_INFO_PORTS_1G = 0x00000007,
0339 CARD_INFO_PORTS_10G = 0x00000008,
0340 CARD_INFO_PORTS_25G = 0x0000000A,
0341 };
0342
0343
0344 struct qeth_ipacmd_setdelip4 {
0345 __be32 addr;
0346 __be32 mask;
0347 __u32 flags;
0348 } __attribute__ ((packed));
0349
0350 struct qeth_ipacmd_setdelip6 {
0351 struct in6_addr addr;
0352 struct in6_addr prefix;
0353 __u32 flags;
0354 } __attribute__ ((packed));
0355
0356 struct qeth_ipacmd_setdelipm {
0357 __u8 mac[6];
0358 __u8 padding[2];
0359 struct in6_addr ip;
0360 } __attribute__ ((packed));
0361
0362 struct qeth_ipacmd_layer2setdelmac {
0363 __u32 mac_length;
0364 __u8 mac[6];
0365 } __attribute__ ((packed));
0366
0367 struct qeth_ipacmd_layer2setdelvlan {
0368 __u16 vlan_id;
0369 } __attribute__ ((packed));
0370
0371 struct qeth_ipacmd_setassparms_hdr {
0372 __u16 length;
0373 __u16 command_code;
0374 __u16 return_code;
0375 __u8 number_of_replies;
0376 __u8 seq_no;
0377 } __attribute__((packed));
0378
0379 struct qeth_arp_query_data {
0380 __u16 request_bits;
0381 __u16 reply_bits;
0382 __u32 no_entries;
0383 char data;
0384 } __attribute__((packed));
0385
0386
0387 struct qeth_arp_query_info {
0388 __u32 udata_len;
0389 __u16 mask_bits;
0390 __u32 udata_offset;
0391 __u32 no_entries;
0392 char *udata;
0393 };
0394
0395
0396
0397
0398 enum qeth_ipa_checksum_bits {
0399 QETH_IPA_CHECKSUM_IP_HDR = 0x0002,
0400 QETH_IPA_CHECKSUM_UDP = 0x0008,
0401 QETH_IPA_CHECKSUM_TCP = 0x0010,
0402 QETH_IPA_CHECKSUM_LP2LP = 0x0020
0403 };
0404
0405 enum qeth_ipa_large_send_caps {
0406 QETH_IPA_LARGE_SEND_TCP = 0x00000001,
0407 };
0408
0409 struct qeth_tso_start_data {
0410 u32 mss;
0411 u32 supported;
0412 };
0413
0414
0415 struct qeth_ipacmd_setassparms {
0416 u32 assist_no;
0417 struct qeth_ipacmd_setassparms_hdr hdr;
0418 union {
0419 __u32 flags_32bit;
0420 struct qeth_ipa_caps caps;
0421 struct qeth_arp_cache_entry arp_entry;
0422 struct qeth_arp_query_data query_arp;
0423 struct qeth_tso_start_data tso;
0424 } data;
0425 } __attribute__ ((packed));
0426
0427 #define SETASS_DATA_SIZEOF(field) sizeof_field(struct qeth_ipacmd_setassparms,\
0428 data.field)
0429
0430
0431 struct qeth_set_routing {
0432 __u8 type;
0433 };
0434
0435
0436 struct qeth_query_cmds_supp {
0437 __u32 no_lantypes_supp;
0438 __u8 lan_type;
0439 __u8 reserved1[3];
0440 __u32 supported_cmds;
0441 __u8 reserved2[8];
0442 } __attribute__ ((packed));
0443
0444 struct qeth_change_addr {
0445 u32 cmd;
0446 u32 addr_size;
0447 u32 no_macs;
0448 u8 addr[ETH_ALEN];
0449 };
0450
0451 struct qeth_snmp_cmd {
0452 __u8 token[16];
0453 __u32 request;
0454 __u32 interface;
0455 __u32 returncode;
0456 __u32 firmwarelevel;
0457 __u32 seqno;
0458 __u8 data;
0459 } __attribute__ ((packed));
0460
0461 struct qeth_snmp_ureq_hdr {
0462 __u32 data_len;
0463 __u32 req_len;
0464 __u32 reserved1;
0465 __u32 reserved2;
0466 } __attribute__ ((packed));
0467
0468 struct qeth_snmp_ureq {
0469 struct qeth_snmp_ureq_hdr hdr;
0470 struct qeth_snmp_cmd cmd;
0471 } __attribute__((packed));
0472
0473
0474 struct qeth_set_access_ctrl {
0475 __u32 subcmd_code;
0476 __u8 reserved[8];
0477 } __attribute__((packed));
0478
0479 #define QETH_QOAT_PHYS_SPEED_UNKNOWN 0x00
0480 #define QETH_QOAT_PHYS_SPEED_10M_HALF 0x01
0481 #define QETH_QOAT_PHYS_SPEED_10M_FULL 0x02
0482 #define QETH_QOAT_PHYS_SPEED_100M_HALF 0x03
0483 #define QETH_QOAT_PHYS_SPEED_100M_FULL 0x04
0484 #define QETH_QOAT_PHYS_SPEED_1000M_HALF 0x05
0485 #define QETH_QOAT_PHYS_SPEED_1000M_FULL 0x06
0486
0487 #define QETH_QOAT_PHYS_SPEED_10G_FULL 0x08
0488
0489 #define QETH_QOAT_PHYS_SPEED_25G_FULL 0x0A
0490
0491 #define QETH_QOAT_PHYS_MEDIA_COPPER 0x01
0492 #define QETH_QOAT_PHYS_MEDIA_FIBRE_SHORT 0x02
0493 #define QETH_QOAT_PHYS_MEDIA_FIBRE_LONG 0x04
0494
0495 struct qeth_query_oat_physical_if {
0496 u8 res_head[33];
0497 u8 speed_duplex;
0498 u8 media_type;
0499 u8 res_tail[29];
0500 };
0501
0502 #define QETH_QOAT_REPLY_TYPE_PHYS_IF 0x0004
0503
0504 struct qeth_query_oat_reply {
0505 u16 type;
0506 u16 length;
0507 u16 version;
0508 u8 res[10];
0509 struct qeth_query_oat_physical_if phys_if;
0510 };
0511
0512 #define QETH_QOAT_SCOPE_INTERFACE 0x00000001
0513
0514 struct qeth_query_oat {
0515 u32 subcmd_code;
0516 u8 reserved[12];
0517 struct qeth_query_oat_reply reply[];
0518 } __packed;
0519
0520 struct qeth_qoat_priv {
0521 __u32 buffer_len;
0522 __u32 response_len;
0523 char *buffer;
0524 };
0525
0526 struct qeth_query_card_info {
0527 __u8 card_type;
0528 __u8 reserved1;
0529 __u16 port_mode;
0530 __u32 port_speed;
0531 __u32 reserved2;
0532 };
0533
0534 #define QETH_SWITCH_FORW_802_1 0x00000001
0535 #define QETH_SWITCH_FORW_REFL_RELAY 0x00000002
0536 #define QETH_SWITCH_CAP_RTE 0x00000004
0537 #define QETH_SWITCH_CAP_ECP 0x00000008
0538 #define QETH_SWITCH_CAP_VDP 0x00000010
0539
0540 struct qeth_query_switch_attributes {
0541 __u8 version;
0542 __u8 reserved1;
0543 __u16 reserved2;
0544 __u32 capabilities;
0545 __u32 settings;
0546 __u8 reserved3[8];
0547 };
0548
0549 #define QETH_SETADP_FLAGS_VIRTUAL_MAC 0x80
0550
0551 struct qeth_ipacmd_setadpparms_hdr {
0552 u16 cmdlength;
0553 u16 reserved2;
0554 u32 command_code;
0555 u16 return_code;
0556 u8 used_total;
0557 u8 seq_no;
0558 u8 flags;
0559 u8 reserved3[3];
0560 };
0561
0562 struct qeth_ipacmd_setadpparms {
0563 struct qeth_ipa_caps hw_cmds;
0564 struct qeth_ipacmd_setadpparms_hdr hdr;
0565 union {
0566 struct qeth_query_cmds_supp query_cmds_supp;
0567 struct qeth_change_addr change_addr;
0568 struct qeth_snmp_cmd snmp;
0569 struct qeth_set_access_ctrl set_access_ctrl;
0570 struct qeth_query_oat query_oat;
0571 struct qeth_query_card_info card_info;
0572 struct qeth_query_switch_attributes query_switch_attributes;
0573 __u32 mode;
0574 } data;
0575 } __attribute__ ((packed));
0576
0577 #define SETADP_DATA_SIZEOF(field) sizeof_field(struct qeth_ipacmd_setadpparms,\
0578 data.field)
0579
0580
0581 struct qeth_create_destroy_address {
0582 u8 mac_addr[ETH_ALEN];
0583 u16 uid;
0584 };
0585
0586
0587
0588 enum qeth_diags_cmds {
0589 QETH_DIAGS_CMD_QUERY = 0x0001,
0590 QETH_DIAGS_CMD_TRAP = 0x0002,
0591 QETH_DIAGS_CMD_TRACE = 0x0004,
0592 QETH_DIAGS_CMD_NOLOG = 0x0008,
0593 QETH_DIAGS_CMD_DUMP = 0x0010,
0594 };
0595
0596 enum qeth_diags_trace_types {
0597 QETH_DIAGS_TYPE_HIPERSOCKET = 0x02,
0598 };
0599
0600 enum qeth_diags_trace_cmds {
0601 QETH_DIAGS_CMD_TRACE_ENABLE = 0x0001,
0602 QETH_DIAGS_CMD_TRACE_DISABLE = 0x0002,
0603 QETH_DIAGS_CMD_TRACE_MODIFY = 0x0004,
0604 QETH_DIAGS_CMD_TRACE_REPLACE = 0x0008,
0605 QETH_DIAGS_CMD_TRACE_QUERY = 0x0010,
0606 };
0607
0608 enum qeth_diags_trap_action {
0609 QETH_DIAGS_TRAP_ARM = 0x01,
0610 QETH_DIAGS_TRAP_DISARM = 0x02,
0611 QETH_DIAGS_TRAP_CAPTURE = 0x04,
0612 };
0613
0614 struct qeth_ipacmd_diagass {
0615 __u32 host_tod2;
0616 __u32:32;
0617 __u16 subcmd_len;
0618 __u16:16;
0619 __u32 subcmd;
0620 __u8 type;
0621 __u8 action;
0622 __u16 options;
0623 __u32 ext;
0624 __u8 cdata[64];
0625 } __attribute__ ((packed));
0626
0627 #define DIAG_HDR_LEN offsetofend(struct qeth_ipacmd_diagass, ext)
0628 #define DIAG_SUB_HDR_LEN (offsetofend(struct qeth_ipacmd_diagass, ext) -\
0629 offsetof(struct qeth_ipacmd_diagass, \
0630 subcmd_len))
0631
0632
0633
0634 #define IPA_VNICC_QUERY_CHARS 0x00000000L
0635 #define IPA_VNICC_QUERY_CMDS 0x00000001L
0636 #define IPA_VNICC_ENABLE 0x00000002L
0637 #define IPA_VNICC_DISABLE 0x00000004L
0638 #define IPA_VNICC_SET_TIMEOUT 0x00000008L
0639 #define IPA_VNICC_GET_TIMEOUT 0x00000010L
0640
0641
0642 #define QETH_VNICC_FLOODING 0x80000000
0643 #define QETH_VNICC_MCAST_FLOODING 0x40000000
0644 #define QETH_VNICC_LEARNING 0x20000000
0645 #define QETH_VNICC_TAKEOVER_SETVMAC 0x10000000
0646 #define QETH_VNICC_TAKEOVER_LEARNING 0x08000000
0647 #define QETH_VNICC_BRIDGE_INVISIBLE 0x04000000
0648 #define QETH_VNICC_RX_BCAST 0x02000000
0649
0650
0651 #define QETH_VNICC_ALL 0xff000000
0652 #define QETH_VNICC_DEFAULT QETH_VNICC_RX_BCAST
0653
0654 #define QETH_VNICC_DEFAULT_TIMEOUT 600
0655
0656
0657 struct qeth_ipacmd_vnicc_hdr {
0658 u16 data_length;
0659 u16 reserved;
0660 u32 sub_command;
0661 };
0662
0663
0664 struct qeth_vnicc_query_cmds {
0665 u32 vnic_char;
0666 u32 sup_cmds;
0667 };
0668
0669
0670 struct qeth_vnicc_set_char {
0671 u32 vnic_char;
0672 };
0673
0674
0675 struct qeth_vnicc_getset_timeout {
0676 u32 vnic_char;
0677 u32 timeout;
0678 };
0679
0680
0681 struct qeth_ipacmd_vnicc {
0682 struct qeth_ipa_caps vnicc_cmds;
0683 struct qeth_ipacmd_vnicc_hdr hdr;
0684 union {
0685 struct qeth_vnicc_query_cmds query_cmds;
0686 struct qeth_vnicc_set_char set_char;
0687 struct qeth_vnicc_getset_timeout getset_timeout;
0688 } data;
0689 };
0690
0691 #define VNICC_DATA_SIZEOF(field) sizeof_field(struct qeth_ipacmd_vnicc,\
0692 data.field)
0693
0694
0695 enum qeth_ipa_sbp_cmd {
0696 IPA_SBP_QUERY_COMMANDS_SUPPORTED = 0x00000000L,
0697 IPA_SBP_RESET_BRIDGE_PORT_ROLE = 0x00000001L,
0698 IPA_SBP_SET_PRIMARY_BRIDGE_PORT = 0x00000002L,
0699 IPA_SBP_SET_SECONDARY_BRIDGE_PORT = 0x00000004L,
0700 IPA_SBP_QUERY_BRIDGE_PORTS = 0x00000008L,
0701 IPA_SBP_BRIDGE_PORT_STATE_CHANGE = 0x00000010L,
0702 };
0703
0704 struct net_if_token {
0705 __u16 devnum;
0706 __u8 cssid;
0707 __u8 iid;
0708 __u8 ssid;
0709 __u8 chpid;
0710 __u16 chid;
0711 } __packed;
0712
0713 struct mac_addr_lnid {
0714 __u8 mac[6];
0715 __u16 lnid;
0716 } __packed;
0717
0718 struct qeth_ipacmd_sbp_hdr {
0719 __u16 cmdlength;
0720 __u16 reserved1;
0721 __u32 command_code;
0722 __u16 return_code;
0723 __u8 used_total;
0724 __u8 seq_no;
0725 __u32 reserved2;
0726 } __packed;
0727
0728 struct qeth_sbp_query_cmds_supp {
0729 __u32 supported_cmds;
0730 __u32 reserved;
0731 } __packed;
0732
0733 struct qeth_sbp_set_primary {
0734 struct net_if_token token;
0735 } __packed;
0736
0737 struct qeth_sbp_port_entry {
0738 __u8 role;
0739 __u8 state;
0740 __u8 reserved1;
0741 __u8 reserved2;
0742 struct net_if_token token;
0743 } __packed;
0744
0745
0746 struct qeth_sbp_port_data {
0747 __u8 primary_bp_supported;
0748 __u8 secondary_bp_supported;
0749 __u8 num_entries;
0750 __u8 entry_length;
0751 struct qeth_sbp_port_entry entry[];
0752 } __packed;
0753
0754 struct qeth_ipacmd_setbridgeport {
0755 struct qeth_ipa_caps sbp_cmds;
0756 struct qeth_ipacmd_sbp_hdr hdr;
0757 union {
0758 struct qeth_sbp_query_cmds_supp query_cmds_supp;
0759 struct qeth_sbp_set_primary set_primary;
0760 struct qeth_sbp_port_data port_data;
0761 } data;
0762 } __packed;
0763
0764 #define SBP_DATA_SIZEOF(field) sizeof_field(struct qeth_ipacmd_setbridgeport,\
0765 data.field)
0766
0767
0768
0769 enum qeth_ipa_addr_change_code {
0770 IPA_ADDR_CHANGE_CODE_VLANID = 0x01,
0771 IPA_ADDR_CHANGE_CODE_MACADDR = 0x02,
0772 IPA_ADDR_CHANGE_CODE_REMOVAL = 0x80,
0773 };
0774
0775 struct qeth_ipacmd_addr_change_entry {
0776 struct net_if_token token;
0777 struct mac_addr_lnid addr_lnid;
0778 __u8 change_code;
0779 __u8 reserved1;
0780 __u16 reserved2;
0781 } __packed;
0782
0783 struct qeth_ipacmd_addr_change {
0784 __u8 lost_event_mask;
0785 __u8 reserved;
0786 __u16 num_entries;
0787 struct qeth_ipacmd_addr_change_entry entry[];
0788 } __packed;
0789
0790
0791 struct qeth_ipacmd_local_addr4 {
0792 __be32 addr;
0793 u32 flags;
0794 };
0795
0796 struct qeth_ipacmd_local_addrs4 {
0797 u32 count;
0798 u32 addr_length;
0799 struct qeth_ipacmd_local_addr4 addrs[];
0800 };
0801
0802 struct qeth_ipacmd_local_addr6 {
0803 struct in6_addr addr;
0804 u32 flags;
0805 };
0806
0807 struct qeth_ipacmd_local_addrs6 {
0808 u32 count;
0809 u32 addr_length;
0810 struct qeth_ipacmd_local_addr6 addrs[];
0811 };
0812
0813
0814 struct qeth_ipacmd_hdr {
0815 __u8 command;
0816 __u8 initiator;
0817 __u16 seqno;
0818 __u16 return_code;
0819 __u8 adapter_type;
0820 __u8 rel_adapter_no;
0821 __u8 prim_version_no;
0822 __u8 param_count;
0823 __u16 prot_version;
0824 struct qeth_ipa_caps assists;
0825 } __attribute__ ((packed));
0826
0827
0828 struct qeth_ipa_cmd {
0829 struct qeth_ipacmd_hdr hdr;
0830 union {
0831 struct qeth_ipacmd_setdelip4 setdelip4;
0832 struct qeth_ipacmd_setdelip6 setdelip6;
0833 struct qeth_ipacmd_setdelipm setdelipm;
0834 struct qeth_ipacmd_setassparms setassparms;
0835 struct qeth_ipacmd_layer2setdelmac setdelmac;
0836 struct qeth_ipacmd_layer2setdelvlan setdelvlan;
0837 struct qeth_create_destroy_address create_destroy_addr;
0838 struct qeth_ipacmd_setadpparms setadapterparms;
0839 struct qeth_set_routing setrtg;
0840 struct qeth_ipacmd_diagass diagass;
0841 struct qeth_ipacmd_setbridgeport sbp;
0842 struct qeth_ipacmd_addr_change addrchange;
0843 struct qeth_ipacmd_vnicc vnicc;
0844 struct qeth_ipacmd_local_addrs4 local_addrs4;
0845 struct qeth_ipacmd_local_addrs6 local_addrs6;
0846 } data;
0847 } __attribute__ ((packed));
0848
0849 #define IPA_DATA_SIZEOF(field) sizeof_field(struct qeth_ipa_cmd, data.field)
0850
0851
0852
0853
0854
0855
0856 enum qeth_ipa_arp_return_codes {
0857 QETH_IPA_ARP_RC_SUCCESS = 0x0000,
0858 QETH_IPA_ARP_RC_FAILED = 0x0001,
0859 QETH_IPA_ARP_RC_NOTSUPP = 0x0002,
0860 QETH_IPA_ARP_RC_OUT_OF_RANGE = 0x0003,
0861 QETH_IPA_ARP_RC_Q_NOTSUPP = 0x0004,
0862 QETH_IPA_ARP_RC_Q_NO_DATA = 0x0008,
0863 };
0864
0865 extern const char *qeth_get_ipa_msg(enum qeth_ipa_return_codes rc);
0866 extern const char *qeth_get_ipa_cmd_name(enum qeth_ipa_cmds cmd);
0867
0868
0869 #define IS_IPA_REPLY(cmd) ((cmd)->hdr.initiator == IPA_CMD_INITIATOR_HOST)
0870
0871
0872
0873
0874
0875 extern const unsigned char CM_ENABLE[];
0876 #define CM_ENABLE_SIZE 0x63
0877 #define QETH_CM_ENABLE_ISSUER_RM_TOKEN(buffer) (buffer + 0x2c)
0878 #define QETH_CM_ENABLE_FILTER_TOKEN(buffer) (buffer + 0x53)
0879 #define QETH_CM_ENABLE_USER_DATA(buffer) (buffer + 0x5b)
0880
0881 #define QETH_CM_ENABLE_RESP_FILTER_TOKEN(buffer) \
0882 (PDU_ENCAPSULATION(buffer) + 0x13)
0883
0884
0885 extern const unsigned char CM_SETUP[];
0886 #define CM_SETUP_SIZE 0x64
0887 #define QETH_CM_SETUP_DEST_ADDR(buffer) (buffer + 0x2c)
0888 #define QETH_CM_SETUP_CONNECTION_TOKEN(buffer) (buffer + 0x51)
0889 #define QETH_CM_SETUP_FILTER_TOKEN(buffer) (buffer + 0x5a)
0890
0891 #define QETH_CM_SETUP_RESP_DEST_ADDR(buffer) \
0892 (PDU_ENCAPSULATION(buffer) + 0x1a)
0893
0894 extern const unsigned char ULP_ENABLE[];
0895 #define ULP_ENABLE_SIZE 0x6b
0896 #define QETH_ULP_ENABLE_LINKNUM(buffer) (buffer + 0x61)
0897 #define QETH_ULP_ENABLE_DEST_ADDR(buffer) (buffer + 0x2c)
0898 #define QETH_ULP_ENABLE_FILTER_TOKEN(buffer) (buffer + 0x53)
0899 #define QETH_ULP_ENABLE_PORTNAME_AND_LL(buffer) (buffer + 0x62)
0900 #define QETH_ULP_ENABLE_RESP_FILTER_TOKEN(buffer) \
0901 (PDU_ENCAPSULATION(buffer) + 0x13)
0902 #define QETH_ULP_ENABLE_RESP_MAX_MTU(buffer) \
0903 (PDU_ENCAPSULATION(buffer) + 0x1f)
0904 #define QETH_ULP_ENABLE_RESP_DIFINFO_LEN(buffer) \
0905 (PDU_ENCAPSULATION(buffer) + 0x17)
0906 #define QETH_ULP_ENABLE_RESP_LINK_TYPE(buffer) \
0907 (PDU_ENCAPSULATION(buffer) + 0x2b)
0908
0909 #define QETH_MPC_PROT_L2 0x08
0910 #define QETH_MPC_PROT_L3 0x03
0911 #define QETH_ULP_ENABLE_PROT_TYPE(buffer) (buffer + 0x50)
0912 #define QETH_IPA_CMD_PROT_TYPE(buffer) (buffer + 0x19)
0913
0914 extern const unsigned char ULP_SETUP[];
0915 #define ULP_SETUP_SIZE 0x6c
0916 #define QETH_ULP_SETUP_DEST_ADDR(buffer) (buffer + 0x2c)
0917 #define QETH_ULP_SETUP_CONNECTION_TOKEN(buffer) (buffer + 0x51)
0918 #define QETH_ULP_SETUP_FILTER_TOKEN(buffer) (buffer + 0x5a)
0919 #define QETH_ULP_SETUP_CUA(buffer) (buffer + 0x68)
0920 #define QETH_ULP_SETUP_REAL_DEVADDR(buffer) (buffer + 0x6a)
0921
0922 #define QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(buffer) \
0923 (PDU_ENCAPSULATION(buffer) + 0x1a)
0924
0925
0926 extern const unsigned char DM_ACT[];
0927 #define DM_ACT_SIZE 0x55
0928 #define QETH_DM_ACT_DEST_ADDR(buffer) (buffer + 0x2c)
0929 #define QETH_DM_ACT_CONNECTION_TOKEN(buffer) (buffer + 0x51)
0930
0931
0932
0933 #define QETH_TRANSPORT_HEADER_SEQ_NO(buffer) (buffer + 4)
0934 #define QETH_PDU_HEADER_SEQ_NO(buffer) (buffer + 0x1c)
0935 #define QETH_PDU_HEADER_ACK_SEQ_NO(buffer) (buffer + 0x20)
0936
0937 extern const unsigned char IDX_ACTIVATE_READ[];
0938 extern const unsigned char IDX_ACTIVATE_WRITE[];
0939 #define IDX_ACTIVATE_SIZE 0x22
0940 #define QETH_IDX_ACT_PNO(buffer) (buffer+0x0b)
0941 #define QETH_IDX_ACT_ISSUER_RM_TOKEN(buffer) (buffer + 0x0c)
0942 #define QETH_IDX_ACT_INVAL_FRAME 0x40
0943 #define QETH_IDX_NO_PORTNAME_REQUIRED(buffer) ((buffer)[0x0b] & 0x80)
0944 #define QETH_IDX_ACT_FUNC_LEVEL(buffer) (buffer + 0x10)
0945 #define QETH_IDX_ACT_DATASET_NAME(buffer) (buffer + 0x16)
0946 #define QETH_IDX_ACT_QDIO_DEV_CUA(buffer) (buffer + 0x1e)
0947 #define QETH_IDX_ACT_QDIO_DEV_REALADDR(buffer) (buffer + 0x20)
0948 #define QETH_IS_IDX_ACT_POS_REPLY(buffer) (((buffer)[0x08] & 3) == 2)
0949 #define QETH_IDX_REPLY_LEVEL(buffer) (buffer + 0x12)
0950 #define QETH_IDX_ACT_CAUSE_CODE(buffer) (buffer)[0x09]
0951 #define QETH_IDX_ACT_ERR_EXCL 0x19
0952 #define QETH_IDX_ACT_ERR_AUTH 0x1E
0953 #define QETH_IDX_ACT_ERR_AUTH_USER 0x20
0954
0955 #define QETH_IDX_TERMINATE 0xc0
0956 #define QETH_IDX_TERMINATE_MASK 0xc0
0957 #define QETH_IDX_TERM_BAD_TRANSPORT 0x41
0958 #define QETH_IDX_TERM_BAD_TRANSPORT_VM 0xf6
0959
0960 #define PDU_ENCAPSULATION(buffer) \
0961 (buffer + *(buffer + (*(buffer + 0x0b)) + \
0962 *(buffer + *(buffer + 0x0b) + 0x11) + 0x07))
0963
0964 #define IS_IPA(buffer) \
0965 ((buffer) && \
0966 (*(buffer + ((*(buffer + 0x0b)) + 4)) == 0xc1))
0967
0968 #endif
