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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright IBM Corp. 2001, 2007
0004  * Authors:     Fritz Elfert (felfert@millenux.com)
0005  *      Peter Tiedemann (ptiedem@de.ibm.com)
0006  *  MPC additions :
0007  *      Belinda Thompson (belindat@us.ibm.com)
0008  *      Andy Richter (richtera@us.ibm.com)
0009  */
0010 #ifndef _CTCM_FSMS_H_
0011 #define _CTCM_FSMS_H_
0012 
0013 #include <linux/module.h>
0014 #include <linux/init.h>
0015 #include <linux/kernel.h>
0016 #include <linux/slab.h>
0017 #include <linux/errno.h>
0018 #include <linux/types.h>
0019 #include <linux/interrupt.h>
0020 #include <linux/timer.h>
0021 #include <linux/bitops.h>
0022 
0023 #include <linux/signal.h>
0024 #include <linux/string.h>
0025 
0026 #include <linux/ip.h>
0027 #include <linux/if_arp.h>
0028 #include <linux/tcp.h>
0029 #include <linux/skbuff.h>
0030 #include <linux/ctype.h>
0031 #include <net/dst.h>
0032 
0033 #include <linux/io.h>
0034 #include <asm/ccwdev.h>
0035 #include <asm/ccwgroup.h>
0036 #include <linux/uaccess.h>
0037 
0038 #include <asm/idals.h>
0039 
0040 #include "fsm.h"
0041 #include "ctcm_main.h"
0042 
0043 /*
0044  * Definitions for the channel statemachine(s) for ctc and ctcmpc
0045  *
0046  * To allow better kerntyping, prefix-less definitions for channel states
0047  * and channel events have been replaced :
0048  * ch_event... -> ctc_ch_event...
0049  * CH_EVENT... -> CTC_EVENT...
0050  * ch_state... -> ctc_ch_state...
0051  * CH_STATE... -> CTC_STATE...
0052  */
0053 /*
0054  * Events of the channel statemachine(s) for ctc and ctcmpc
0055  */
0056 enum ctc_ch_events {
0057     /*
0058      * Events, representing return code of
0059      * I/O operations (ccw_device_start, ccw_device_halt et al.)
0060      */
0061     CTC_EVENT_IO_SUCCESS,
0062     CTC_EVENT_IO_EBUSY,
0063     CTC_EVENT_IO_ENODEV,
0064     CTC_EVENT_IO_UNKNOWN,
0065 
0066     CTC_EVENT_ATTNBUSY,
0067     CTC_EVENT_ATTN,
0068     CTC_EVENT_BUSY,
0069     /*
0070      * Events, representing unit-check
0071      */
0072     CTC_EVENT_UC_RCRESET,
0073     CTC_EVENT_UC_RSRESET,
0074     CTC_EVENT_UC_TXTIMEOUT,
0075     CTC_EVENT_UC_TXPARITY,
0076     CTC_EVENT_UC_HWFAIL,
0077     CTC_EVENT_UC_RXPARITY,
0078     CTC_EVENT_UC_ZERO,
0079     CTC_EVENT_UC_UNKNOWN,
0080     /*
0081      * Events, representing subchannel-check
0082      */
0083     CTC_EVENT_SC_UNKNOWN,
0084     /*
0085      * Events, representing machine checks
0086      */
0087     CTC_EVENT_MC_FAIL,
0088     CTC_EVENT_MC_GOOD,
0089     /*
0090      * Event, representing normal IRQ
0091      */
0092     CTC_EVENT_IRQ,
0093     CTC_EVENT_FINSTAT,
0094     /*
0095      * Event, representing timer expiry.
0096      */
0097     CTC_EVENT_TIMER,
0098     /*
0099      * Events, representing commands from upper levels.
0100      */
0101     CTC_EVENT_START,
0102     CTC_EVENT_STOP,
0103     CTC_NR_EVENTS,
0104     /*
0105      * additional MPC events
0106      */
0107     CTC_EVENT_SEND_XID = CTC_NR_EVENTS,
0108     CTC_EVENT_RSWEEP_TIMER,
0109     /*
0110      * MUST be always the last element!!
0111      */
0112     CTC_MPC_NR_EVENTS,
0113 };
0114 
0115 /*
0116  * States of the channel statemachine(s) for ctc and ctcmpc.
0117  */
0118 enum ctc_ch_states {
0119     /*
0120      * Channel not assigned to any device,
0121      * initial state, direction invalid
0122      */
0123     CTC_STATE_IDLE,
0124     /*
0125      * Channel assigned but not operating
0126      */
0127     CTC_STATE_STOPPED,
0128     CTC_STATE_STARTWAIT,
0129     CTC_STATE_STARTRETRY,
0130     CTC_STATE_SETUPWAIT,
0131     CTC_STATE_RXINIT,
0132     CTC_STATE_TXINIT,
0133     CTC_STATE_RX,
0134     CTC_STATE_TX,
0135     CTC_STATE_RXIDLE,
0136     CTC_STATE_TXIDLE,
0137     CTC_STATE_RXERR,
0138     CTC_STATE_TXERR,
0139     CTC_STATE_TERM,
0140     CTC_STATE_DTERM,
0141     CTC_STATE_NOTOP,
0142     CTC_NR_STATES,     /* MUST be the last element of non-expanded states */
0143     /*
0144      * additional MPC states
0145      */
0146     CH_XID0_PENDING = CTC_NR_STATES,
0147     CH_XID0_INPROGRESS,
0148     CH_XID7_PENDING,
0149     CH_XID7_PENDING1,
0150     CH_XID7_PENDING2,
0151     CH_XID7_PENDING3,
0152     CH_XID7_PENDING4,
0153     CTC_MPC_NR_STATES, /* MUST be the last element of expanded mpc states */
0154 };
0155 
0156 extern const char *ctc_ch_event_names[];
0157 
0158 extern const char *ctc_ch_state_names[];
0159 
0160 void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg);
0161 void ctcm_purge_skb_queue(struct sk_buff_head *q);
0162 
0163 /*
0164  * ----- non-static actions for ctcm channel statemachine -----
0165  *
0166  */
0167 void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg);
0168 
0169 /*
0170  * ----- FSM (state/event/action) of the ctcm channel statemachine -----
0171  */
0172 extern const fsm_node ch_fsm[];
0173 extern int ch_fsm_len;
0174 
0175 
0176 /*
0177  * ----- non-static actions for ctcmpc channel statemachine ----
0178  *
0179  */
0180 /* shared :
0181 void ctcm_chx_txidle(fsm_instance * fi, int event, void *arg);
0182  */
0183 void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg);
0184 
0185 /*
0186  * ----- FSM (state/event/action) of the ctcmpc channel statemachine -----
0187  */
0188 extern const fsm_node ctcmpc_ch_fsm[];
0189 extern int mpc_ch_fsm_len;
0190 
0191 /*
0192  * Definitions for the device interface statemachine for ctc and mpc
0193  */
0194 
0195 /*
0196  * States of the device interface statemachine.
0197  */
0198 enum dev_states {
0199     DEV_STATE_STOPPED,
0200     DEV_STATE_STARTWAIT_RXTX,
0201     DEV_STATE_STARTWAIT_RX,
0202     DEV_STATE_STARTWAIT_TX,
0203     DEV_STATE_STOPWAIT_RXTX,
0204     DEV_STATE_STOPWAIT_RX,
0205     DEV_STATE_STOPWAIT_TX,
0206     DEV_STATE_RUNNING,
0207     /*
0208      * MUST be always the last element!!
0209      */
0210     CTCM_NR_DEV_STATES
0211 };
0212 
0213 extern const char *dev_state_names[];
0214 
0215 /*
0216  * Events of the device interface statemachine.
0217  * ctcm and ctcmpc
0218  */
0219 enum dev_events {
0220     DEV_EVENT_START,
0221     DEV_EVENT_STOP,
0222     DEV_EVENT_RXUP,
0223     DEV_EVENT_TXUP,
0224     DEV_EVENT_RXDOWN,
0225     DEV_EVENT_TXDOWN,
0226     DEV_EVENT_RESTART,
0227     /*
0228      * MUST be always the last element!!
0229      */
0230     CTCM_NR_DEV_EVENTS
0231 };
0232 
0233 extern const char *dev_event_names[];
0234 
0235 /*
0236  * Actions for the device interface statemachine.
0237  * ctc and ctcmpc
0238  */
0239 /*
0240 static void dev_action_start(fsm_instance * fi, int event, void *arg);
0241 static void dev_action_stop(fsm_instance * fi, int event, void *arg);
0242 static void dev_action_restart(fsm_instance *fi, int event, void *arg);
0243 static void dev_action_chup(fsm_instance * fi, int event, void *arg);
0244 static void dev_action_chdown(fsm_instance * fi, int event, void *arg);
0245 */
0246 
0247 /*
0248  * The (state/event/action) fsm table of the device interface statemachine.
0249  * ctcm and ctcmpc
0250  */
0251 extern const fsm_node dev_fsm[];
0252 extern int dev_fsm_len;
0253 
0254 
0255 /*
0256  * Definitions for the MPC Group statemachine
0257  */
0258 
0259 /*
0260  * MPC Group Station FSM States
0261 
0262 State Name      When In This State
0263 ======================  =======================================
0264 MPCG_STATE_RESET    Initial State When Driver Loaded
0265             We receive and send NOTHING
0266 
0267 MPCG_STATE_INOP         INOP Received.
0268             Group level non-recoverable error
0269 
0270 MPCG_STATE_READY    XID exchanges for at least 1 write and
0271             1 read channel have completed.
0272             Group is ready for data transfer.
0273 
0274 States from ctc_mpc_alloc_channel
0275 ==============================================================
0276 MPCG_STATE_XID2INITW    Awaiting XID2(0) Initiation
0277                   ATTN from other side will start
0278                   XID negotiations.
0279                   Y-side protocol only.
0280 
0281 MPCG_STATE_XID2INITX    XID2(0) negotiations are in progress.
0282                   At least 1, but not all, XID2(0)'s
0283                   have been received from partner.
0284 
0285 MPCG_STATE_XID7INITW    XID2(0) complete
0286                   No XID2(7)'s have yet been received.
0287                   XID2(7) negotiations pending.
0288 
0289 MPCG_STATE_XID7INITX    XID2(7) negotiations in progress.
0290                   At least 1, but not all, XID2(7)'s
0291                   have been received from partner.
0292 
0293 MPCG_STATE_XID7INITF    XID2(7) negotiations complete.
0294                   Transitioning to READY.
0295 
0296 MPCG_STATE_READY          Ready for Data Transfer.
0297 
0298 
0299 States from ctc_mpc_establish_connectivity call
0300 ==============================================================
0301 MPCG_STATE_XID0IOWAIT   Initiating XID2(0) negotiations.
0302                   X-side protocol only.
0303                   ATTN-BUSY from other side will convert
0304                   this to Y-side protocol and the
0305                   ctc_mpc_alloc_channel flow will begin.
0306 
0307 MPCG_STATE_XID0IOWAIX   XID2(0) negotiations are in progress.
0308                   At least 1, but not all, XID2(0)'s
0309                   have been received from partner.
0310 
0311 MPCG_STATE_XID7INITI    XID2(0) complete
0312                   No XID2(7)'s have yet been received.
0313                   XID2(7) negotiations pending.
0314 
0315 MPCG_STATE_XID7INITZ    XID2(7) negotiations in progress.
0316                   At least 1, but not all, XID2(7)'s
0317                   have been received from partner.
0318 
0319 MPCG_STATE_XID7INITF    XID2(7) negotiations complete.
0320                   Transitioning to READY.
0321 
0322 MPCG_STATE_READY          Ready for Data Transfer.
0323 
0324 */
0325 
0326 enum mpcg_events {
0327     MPCG_EVENT_INOP,
0328     MPCG_EVENT_DISCONC,
0329     MPCG_EVENT_XID0DO,
0330     MPCG_EVENT_XID2,
0331     MPCG_EVENT_XID2DONE,
0332     MPCG_EVENT_XID7DONE,
0333     MPCG_EVENT_TIMER,
0334     MPCG_EVENT_DOIO,
0335     MPCG_NR_EVENTS,
0336 };
0337 
0338 enum mpcg_states {
0339     MPCG_STATE_RESET,
0340     MPCG_STATE_INOP,
0341     MPCG_STATE_XID2INITW,
0342     MPCG_STATE_XID2INITX,
0343     MPCG_STATE_XID7INITW,
0344     MPCG_STATE_XID7INITX,
0345     MPCG_STATE_XID0IOWAIT,
0346     MPCG_STATE_XID0IOWAIX,
0347     MPCG_STATE_XID7INITI,
0348     MPCG_STATE_XID7INITZ,
0349     MPCG_STATE_XID7INITF,
0350     MPCG_STATE_FLOWC,
0351     MPCG_STATE_READY,
0352     MPCG_NR_STATES,
0353 };
0354 
0355 #endif
0356 /* --- This is the END my friend --- */