s390/cio/qdio.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright IBM Corp. 2000, 2009
0004  * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
0005  *        Jan Glauber <jang@linux.vnet.ibm.com>
0006  */
0007 #ifndef _CIO_QDIO_H
0008 #define _CIO_QDIO_H
0009
0010 #include <asm/page.h>
0011 #include <asm/schid.h>
0012 #include <asm/debug.h>
0013 #include "chsc.h"
0014
0015 #define QDIO_BUSY_BIT_PATIENCE      (100 << 12) /* 100 microseconds */
0016 #define QDIO_BUSY_BIT_RETRY_DELAY   10      /* 10 milliseconds */
0017 #define QDIO_BUSY_BIT_RETRIES       1000        /* = 10s retry time */
0018
0019 enum qdio_irq_states {
0020     QDIO_IRQ_STATE_INACTIVE,
0021     QDIO_IRQ_STATE_ESTABLISHED,
0022     QDIO_IRQ_STATE_ACTIVE,
0023     QDIO_IRQ_STATE_STOPPED,
0024     QDIO_IRQ_STATE_CLEANUP,
0025     QDIO_IRQ_STATE_ERR,
0026     NR_QDIO_IRQ_STATES,
0027 };
0028
0029 /* used as intparm in do_IO */
0030 #define QDIO_DOING_ESTABLISH    1
0031 #define QDIO_DOING_ACTIVATE 2
0032 #define QDIO_DOING_CLEANUP  3
0033
0034 #define SLSB_STATE_NOT_INIT 0x0
0035 #define SLSB_STATE_EMPTY    0x1
0036 #define SLSB_STATE_PRIMED   0x2
0037 #define SLSB_STATE_PENDING  0x3
0038 #define SLSB_STATE_HALTED   0xe
0039 #define SLSB_STATE_ERROR    0xf
0040 #define SLSB_TYPE_INPUT     0x0
0041 #define SLSB_TYPE_OUTPUT    0x20
0042 #define SLSB_OWNER_PROG     0x80
0043 #define SLSB_OWNER_CU       0x40
0044
0045 #define SLSB_P_INPUT_NOT_INIT   \
0046     (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_NOT_INIT)  /* 0x80 */
0047 #define SLSB_P_INPUT_ACK    \
0048     (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY)     /* 0x81 */
0049 #define SLSB_CU_INPUT_EMPTY \
0050     (SLSB_OWNER_CU | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY)       /* 0x41 */
0051 #define SLSB_P_INPUT_PRIMED \
0052     (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_PRIMED)    /* 0x82 */
0053 #define SLSB_P_INPUT_HALTED \
0054     (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_HALTED)    /* 0x8e */
0055 #define SLSB_P_INPUT_ERROR  \
0056     (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_ERROR)     /* 0x8f */
0057 #define SLSB_P_OUTPUT_NOT_INIT  \
0058     (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_NOT_INIT) /* 0xa0 */
0059 #define SLSB_P_OUTPUT_EMPTY \
0060     (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_EMPTY)    /* 0xa1 */
0061 #define SLSB_P_OUTPUT_PENDING \
0062     (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_PENDING)  /* 0xa3 */
0063 #define SLSB_CU_OUTPUT_PRIMED   \
0064     (SLSB_OWNER_CU | SLSB_TYPE_OUTPUT | SLSB_STATE_PRIMED)     /* 0x62 */
0065 #define SLSB_P_OUTPUT_HALTED    \
0066     (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_HALTED)   /* 0xae */
0067 #define SLSB_P_OUTPUT_ERROR \
0068     (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_ERROR)    /* 0xaf */
0069
0070 #define SLSB_ERROR_DURING_LOOKUP  0xff
0071
0072 /* additional CIWs returned by extended Sense-ID */
0073 #define CIW_TYPE_EQUEUE         0x3 /* establish QDIO queues */
0074 #define CIW_TYPE_AQUEUE         0x4 /* activate QDIO queues */
0075
0076 /* flags for st qdio sch data */
0077 #define CHSC_FLAG_QDIO_CAPABILITY   0x80
0078 #define CHSC_FLAG_VALIDITY      0x40
0079
0080 /* SIGA flags */
0081 #define QDIO_SIGA_WRITE     0x00
0082 #define QDIO_SIGA_READ      0x01
0083 #define QDIO_SIGA_SYNC      0x02
0084 #define QDIO_SIGA_WRITEM    0x03
0085 #define QDIO_SIGA_WRITEQ    0x04
0086 #define QDIO_SIGA_QEBSM_FLAG    0x80
0087
0088 static inline int do_sqbs(u64 token, unsigned char state, int queue,
0089               int *start, int *count)
0090 {
0091     unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
0092     unsigned long _ccq = *count;
0093
0094     asm volatile(
0095         "   lgr 1,%[token]\n"
0096         "   .insn   rsy,0xeb000000008a,%[qs],%[ccq],0(%[state])"
0097         : [ccq] "+&d" (_ccq), [qs] "+&d" (_queuestart)
0098         : [state] "d" ((unsigned long)state), [token] "d" (token)
0099         : "memory", "cc", "1");
0100     *count = _ccq & 0xff;
0101     *start = _queuestart & 0xff;
0102
0103     return (_ccq >> 32) & 0xff;
0104 }
0105
0106 static inline int do_eqbs(u64 token, unsigned char *state, int queue,
0107               int *start, int *count, int ack)
0108 {
0109     unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
0110     unsigned long _state = (unsigned long)ack << 63;
0111     unsigned long _ccq = *count;
0112
0113     asm volatile(
0114         "   lgr 1,%[token]\n"
0115         "   .insn   rrf,0xb99c0000,%[qs],%[state],%[ccq],0"
0116         : [ccq] "+&d" (_ccq), [qs] "+&d" (_queuestart),
0117           [state] "+&d" (_state)
0118         : [token] "d" (token)
0119         : "memory", "cc", "1");
0120     *count = _ccq & 0xff;
0121     *start = _queuestart & 0xff;
0122     *state = _state & 0xff;
0123
0124     return (_ccq >> 32) & 0xff;
0125 }
0126
0127 struct qdio_irq;
0128
0129 struct qdio_dev_perf_stat {
0130     unsigned int adapter_int;
0131     unsigned int qdio_int;
0132
0133     unsigned int siga_read;
0134     unsigned int siga_write;
0135     unsigned int siga_sync;
0136
0137     unsigned int inbound_call;
0138     unsigned int stop_polling;
0139     unsigned int inbound_queue_full;
0140     unsigned int outbound_call;
0141     unsigned int outbound_queue_full;
0142     unsigned int fast_requeue;
0143     unsigned int target_full;
0144     unsigned int eqbs;
0145     unsigned int eqbs_partial;
0146     unsigned int sqbs;
0147     unsigned int sqbs_partial;
0148     unsigned int int_discarded;
0149 } ____cacheline_aligned;
0150
0151 struct qdio_queue_perf_stat {
0152     /* Sorted into order-2 buckets: 1, 2-3, 4-7, ... 64-127, 128. */
0153     unsigned int nr_sbals[8];
0154     unsigned int nr_sbal_error;
0155     unsigned int nr_sbal_nop;
0156     unsigned int nr_sbal_total;
0157 };
0158
0159 enum qdio_irq_poll_states {
0160     QDIO_IRQ_DISABLED,
0161 };
0162
0163 struct qdio_input_q {
0164     /* Batch of SBALs that we processed while polling the queue: */
0165     unsigned int batch_start;
0166     unsigned int batch_count;
0167 };
0168
0169 struct qdio_output_q {
0170 };
0171
0172 /*
0173  * Note on cache alignment: grouped slsb and write mostly data at the beginning
0174  * sbal[] is read-only and starts on a new cacheline followed by read mostly.
0175  */
0176 struct qdio_q {
0177     struct slsb slsb;
0178
0179     union {
0180         struct qdio_input_q in;
0181         struct qdio_output_q out;
0182     } u;
0183
0184     /*
0185      * inbound: next buffer the program should check for
0186      * outbound: next buffer to check if adapter processed it
0187      */
0188     int first_to_check;
0189
0190     /* number of buffers in use by the adapter */
0191     atomic_t nr_buf_used;
0192
0193     /* last scan of the queue */
0194     u64 timestamp;
0195
0196     struct qdio_queue_perf_stat q_stats;
0197
0198     struct qdio_buffer *sbal[QDIO_MAX_BUFFERS_PER_Q] ____cacheline_aligned;
0199
0200     /* queue number */
0201     int nr;
0202
0203     /* bitmask of queue number */
0204     int mask;
0205
0206     /* input or output queue */
0207     int is_input_q;
0208
0209     /* upper-layer program handler */
0210     qdio_handler_t (*handler);
0211
0212     struct qdio_irq *irq_ptr;
0213     struct sl *sl;
0214     /*
0215      * A page is allocated under this pointer and used for slib and sl.
0216      * slib is 2048 bytes big and sl points to offset PAGE_SIZE / 2.
0217      */
0218     struct slib *slib;
0219 } __attribute__ ((aligned(256)));
0220
0221 struct qdio_irq {
0222     struct qib qib;
0223     u32 *dsci;      /* address of device state change indicator */
0224     struct ccw_device *cdev;
0225     struct list_head entry;     /* list of thinint devices */
0226     struct dentry *debugfs_dev;
0227     u64 last_data_irq_time;
0228
0229     unsigned long int_parm;
0230     struct subchannel_id schid;
0231     unsigned long sch_token;    /* QEBSM facility */
0232
0233     enum qdio_irq_states state;
0234     u8 qdioac1;
0235
0236     int nr_input_qs;
0237     int nr_output_qs;
0238
0239     struct ccw1 *ccw;
0240
0241     struct qdio_ssqd_desc ssqd_desc;
0242     void (*orig_handler) (struct ccw_device *, unsigned long, struct irb *);
0243     qdio_handler_t (*error_handler);
0244
0245     int perf_stat_enabled;
0246
0247     struct qdr *qdr;
0248     unsigned long chsc_page;
0249
0250     struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
0251     struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
0252     unsigned int max_input_qs;
0253     unsigned int max_output_qs;
0254
0255     void (*irq_poll)(struct ccw_device *cdev, unsigned long data);
0256     unsigned long poll_state;
0257
0258     debug_info_t *debug_area;
0259     struct mutex setup_mutex;
0260     struct qdio_dev_perf_stat perf_stat;
0261 };
0262
0263 /* helper functions */
0264 #define queue_type(q)   q->irq_ptr->qib.qfmt
0265 #define SCH_NO(q)   (q->irq_ptr->schid.sch_no)
0266
0267 #define is_thinint_irq(irq) \
0268     (irq->qib.qfmt == QDIO_IQDIO_QFMT || \
0269      css_general_characteristics.aif_osa)
0270
0271 #define qperf(__qdev, __attr)   ((__qdev)->perf_stat.(__attr))
0272
0273 #define QDIO_PERF_STAT_INC(__irq, __attr)               \
0274 ({                                  \
0275     struct qdio_irq *qdev = __irq;                  \
0276     if (qdev->perf_stat_enabled)                    \
0277         (qdev->perf_stat.__attr)++;             \
0278 })
0279
0280 #define qperf_inc(__q, __attr)  QDIO_PERF_STAT_INC((__q)->irq_ptr, __attr)
0281
0282 static inline void account_sbals_error(struct qdio_q *q, int count)
0283 {
0284     q->q_stats.nr_sbal_error += count;
0285     q->q_stats.nr_sbal_total += count;
0286 }
0287
0288 /* the highest iqdio queue is used for multicast */
0289 static inline int multicast_outbound(struct qdio_q *q)
0290 {
0291     return (q->irq_ptr->nr_output_qs > 1) &&
0292            (q->nr == q->irq_ptr->nr_output_qs - 1);
0293 }
0294
0295 static inline void qdio_deliver_irq(struct qdio_irq *irq)
0296 {
0297     if (!test_and_set_bit(QDIO_IRQ_DISABLED, &irq->poll_state))
0298         irq->irq_poll(irq->cdev, irq->int_parm);
0299     else
0300         QDIO_PERF_STAT_INC(irq, int_discarded);
0301 }
0302
0303 #define pci_out_supported(irq) ((irq)->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED)
0304 #define is_qebsm(q)         (q->irq_ptr->sch_token != 0)
0305
0306 #define qdio_need_siga_in(irq)      ((irq)->qdioac1 & AC1_SIGA_INPUT_NEEDED)
0307 #define qdio_need_siga_out(irq)     ((irq)->qdioac1 & AC1_SIGA_OUTPUT_NEEDED)
0308 #define qdio_need_siga_sync(irq)    (unlikely((irq)->qdioac1 & AC1_SIGA_SYNC_NEEDED))
0309
0310 #define for_each_input_queue(irq_ptr, q, i)     \
0311     for (i = 0; i < irq_ptr->nr_input_qs &&     \
0312         ({ q = irq_ptr->input_qs[i]; 1; }); i++)
0313 #define for_each_output_queue(irq_ptr, q, i)        \
0314     for (i = 0; i < irq_ptr->nr_output_qs &&    \
0315         ({ q = irq_ptr->output_qs[i]; 1; }); i++)
0316
0317 #define add_buf(bufnr, inc) QDIO_BUFNR((bufnr) + (inc))
0318 #define next_buf(bufnr)     add_buf(bufnr, 1)
0319 #define sub_buf(bufnr, dec) QDIO_BUFNR((bufnr) - (dec))
0320 #define prev_buf(bufnr)     sub_buf(bufnr, 1)
0321
0322 extern u64 last_ai_time;
0323
0324 /* prototypes for thin interrupt */
0325 int qdio_establish_thinint(struct qdio_irq *irq_ptr);
0326 void qdio_shutdown_thinint(struct qdio_irq *irq_ptr);
0327 int qdio_thinint_init(void);
0328 void qdio_thinint_exit(void);
0329 int test_nonshared_ind(struct qdio_irq *);
0330
0331 /* prototypes for setup */
0332 void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
0333               struct irb *irb);
0334 int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs,
0335              int nr_output_qs);
0336 void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr);
0337 int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
0338             struct subchannel_id *schid,
0339             struct qdio_ssqd_desc *data);
0340 void qdio_setup_irq(struct qdio_irq *irq_ptr, struct qdio_initialize *init_data);
0341 void qdio_shutdown_irq(struct qdio_irq *irq);
0342 void qdio_print_subchannel_info(struct qdio_irq *irq_ptr);
0343 void qdio_free_queues(struct qdio_irq *irq_ptr);
0344 int qdio_setup_init(void);
0345 void qdio_setup_exit(void);
0346
0347 int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
0348             unsigned char *state);
0349 #endif /* _CIO_QDIO_H */