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0012 #define KMSG_COMPONENT "cio"
0013 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
0014
0015 #include <linux/ftrace.h>
0016 #include <linux/module.h>
0017 #include <linux/init.h>
0018 #include <linux/slab.h>
0019 #include <linux/device.h>
0020 #include <linux/kernel_stat.h>
0021 #include <linux/interrupt.h>
0022 #include <linux/irq.h>
0023 #include <asm/cio.h>
0024 #include <asm/delay.h>
0025 #include <asm/irq.h>
0026 #include <asm/irq_regs.h>
0027 #include <asm/setup.h>
0028 #include <asm/ipl.h>
0029 #include <asm/chpid.h>
0030 #include <asm/airq.h>
0031 #include <asm/isc.h>
0032 #include <linux/sched/cputime.h>
0033 #include <asm/fcx.h>
0034 #include <asm/nmi.h>
0035 #include <asm/crw.h>
0036 #include "cio.h"
0037 #include "css.h"
0038 #include "chsc.h"
0039 #include "ioasm.h"
0040 #include "io_sch.h"
0041 #include "blacklist.h"
0042 #include "cio_debug.h"
0043 #include "chp.h"
0044 #include "trace.h"
0045
0046 debug_info_t *cio_debug_msg_id;
0047 debug_info_t *cio_debug_trace_id;
0048 debug_info_t *cio_debug_crw_id;
0049
0050 DEFINE_PER_CPU_ALIGNED(struct irb, cio_irb);
0051 EXPORT_PER_CPU_SYMBOL(cio_irb);
0052
0053
0054
0055
0056
0057
0058
0059
0060 static int __init cio_debug_init(void)
0061 {
0062 cio_debug_msg_id = debug_register("cio_msg", 16, 1, 11 * sizeof(long));
0063 if (!cio_debug_msg_id)
0064 goto out_unregister;
0065 debug_register_view(cio_debug_msg_id, &debug_sprintf_view);
0066 debug_set_level(cio_debug_msg_id, 2);
0067 cio_debug_trace_id = debug_register("cio_trace", 16, 1, 16);
0068 if (!cio_debug_trace_id)
0069 goto out_unregister;
0070 debug_register_view(cio_debug_trace_id, &debug_hex_ascii_view);
0071 debug_set_level(cio_debug_trace_id, 2);
0072 cio_debug_crw_id = debug_register("cio_crw", 8, 1, 8 * sizeof(long));
0073 if (!cio_debug_crw_id)
0074 goto out_unregister;
0075 debug_register_view(cio_debug_crw_id, &debug_sprintf_view);
0076 debug_set_level(cio_debug_crw_id, 4);
0077 return 0;
0078
0079 out_unregister:
0080 debug_unregister(cio_debug_msg_id);
0081 debug_unregister(cio_debug_trace_id);
0082 debug_unregister(cio_debug_crw_id);
0083 return -1;
0084 }
0085
0086 arch_initcall (cio_debug_init);
0087
0088 int cio_set_options(struct subchannel *sch, int flags)
0089 {
0090 struct io_subchannel_private *priv = to_io_private(sch);
0091
0092 priv->options.suspend = (flags & DOIO_ALLOW_SUSPEND) != 0;
0093 priv->options.prefetch = (flags & DOIO_DENY_PREFETCH) != 0;
0094 priv->options.inter = (flags & DOIO_SUPPRESS_INTER) != 0;
0095 return 0;
0096 }
0097
0098 static int
0099 cio_start_handle_notoper(struct subchannel *sch, __u8 lpm)
0100 {
0101 char dbf_text[15];
0102
0103 if (lpm != 0)
0104 sch->lpm &= ~lpm;
0105 else
0106 sch->lpm = 0;
0107
0108 CIO_MSG_EVENT(2, "cio_start: 'not oper' status for "
0109 "subchannel 0.%x.%04x!\n", sch->schid.ssid,
0110 sch->schid.sch_no);
0111
0112 if (cio_update_schib(sch))
0113 return -ENODEV;
0114
0115 sprintf(dbf_text, "no%s", dev_name(&sch->dev));
0116 CIO_TRACE_EVENT(0, dbf_text);
0117 CIO_HEX_EVENT(0, &sch->schib, sizeof (struct schib));
0118
0119 return (sch->lpm ? -EACCES : -ENODEV);
0120 }
0121
0122 int
0123 cio_start_key (struct subchannel *sch,
0124 struct ccw1 * cpa,
0125 __u8 lpm,
0126 __u8 key)
0127 {
0128 struct io_subchannel_private *priv = to_io_private(sch);
0129 union orb *orb = &priv->orb;
0130 int ccode;
0131
0132 CIO_TRACE_EVENT(5, "stIO");
0133 CIO_TRACE_EVENT(5, dev_name(&sch->dev));
0134
0135 memset(orb, 0, sizeof(union orb));
0136
0137 orb->cmd.intparm = (u32)(addr_t)sch;
0138 orb->cmd.fmt = 1;
0139
0140 orb->cmd.pfch = priv->options.prefetch == 0;
0141 orb->cmd.spnd = priv->options.suspend;
0142 orb->cmd.ssic = priv->options.suspend && priv->options.inter;
0143 orb->cmd.lpm = (lpm != 0) ? lpm : sch->lpm;
0144
0145
0146
0147 orb->cmd.c64 = 1;
0148 orb->cmd.i2k = 0;
0149 orb->cmd.key = key >> 4;
0150
0151 orb->cmd.cpa = (__u32) __pa(cpa);
0152 ccode = ssch(sch->schid, orb);
0153
0154
0155 CIO_HEX_EVENT(5, &ccode, sizeof(ccode));
0156
0157 switch (ccode) {
0158 case 0:
0159
0160
0161
0162 sch->schib.scsw.cmd.actl |= SCSW_ACTL_START_PEND;
0163 return 0;
0164 case 1:
0165 case 2:
0166 return -EBUSY;
0167 case 3:
0168 return cio_start_handle_notoper(sch, lpm);
0169 default:
0170 return ccode;
0171 }
0172 }
0173 EXPORT_SYMBOL_GPL(cio_start_key);
0174
0175 int
0176 cio_start (struct subchannel *sch, struct ccw1 *cpa, __u8 lpm)
0177 {
0178 return cio_start_key(sch, cpa, lpm, PAGE_DEFAULT_KEY);
0179 }
0180 EXPORT_SYMBOL_GPL(cio_start);
0181
0182
0183
0184
0185 int
0186 cio_resume (struct subchannel *sch)
0187 {
0188 int ccode;
0189
0190 CIO_TRACE_EVENT(4, "resIO");
0191 CIO_TRACE_EVENT(4, dev_name(&sch->dev));
0192
0193 ccode = rsch (sch->schid);
0194
0195 CIO_HEX_EVENT(4, &ccode, sizeof(ccode));
0196
0197 switch (ccode) {
0198 case 0:
0199 sch->schib.scsw.cmd.actl |= SCSW_ACTL_RESUME_PEND;
0200 return 0;
0201 case 1:
0202 return -EBUSY;
0203 case 2:
0204 return -EINVAL;
0205 default:
0206
0207
0208
0209
0210 return -ENODEV;
0211 }
0212 }
0213 EXPORT_SYMBOL_GPL(cio_resume);
0214
0215
0216
0217
0218 int
0219 cio_halt(struct subchannel *sch)
0220 {
0221 int ccode;
0222
0223 if (!sch)
0224 return -ENODEV;
0225
0226 CIO_TRACE_EVENT(2, "haltIO");
0227 CIO_TRACE_EVENT(2, dev_name(&sch->dev));
0228
0229
0230
0231
0232 ccode = hsch (sch->schid);
0233
0234 CIO_HEX_EVENT(2, &ccode, sizeof(ccode));
0235
0236 switch (ccode) {
0237 case 0:
0238 sch->schib.scsw.cmd.actl |= SCSW_ACTL_HALT_PEND;
0239 return 0;
0240 case 1:
0241 case 2:
0242 return -EBUSY;
0243 default:
0244 return -ENODEV;
0245 }
0246 }
0247 EXPORT_SYMBOL_GPL(cio_halt);
0248
0249
0250
0251
0252 int
0253 cio_clear(struct subchannel *sch)
0254 {
0255 int ccode;
0256
0257 if (!sch)
0258 return -ENODEV;
0259
0260 CIO_TRACE_EVENT(2, "clearIO");
0261 CIO_TRACE_EVENT(2, dev_name(&sch->dev));
0262
0263
0264
0265
0266 ccode = csch (sch->schid);
0267
0268 CIO_HEX_EVENT(2, &ccode, sizeof(ccode));
0269
0270 switch (ccode) {
0271 case 0:
0272 sch->schib.scsw.cmd.actl |= SCSW_ACTL_CLEAR_PEND;
0273 return 0;
0274 default:
0275 return -ENODEV;
0276 }
0277 }
0278 EXPORT_SYMBOL_GPL(cio_clear);
0279
0280
0281
0282
0283
0284
0285
0286
0287 int
0288 cio_cancel (struct subchannel *sch)
0289 {
0290 int ccode;
0291
0292 if (!sch)
0293 return -ENODEV;
0294
0295 CIO_TRACE_EVENT(2, "cancelIO");
0296 CIO_TRACE_EVENT(2, dev_name(&sch->dev));
0297
0298 ccode = xsch (sch->schid);
0299
0300 CIO_HEX_EVENT(2, &ccode, sizeof(ccode));
0301
0302 switch (ccode) {
0303 case 0:
0304
0305 if (cio_update_schib(sch))
0306 return -ENODEV;
0307 return 0;
0308 case 1:
0309 return -EBUSY;
0310 case 2:
0311 return -EINVAL;
0312 default:
0313 return -ENODEV;
0314 }
0315 }
0316 EXPORT_SYMBOL_GPL(cio_cancel);
0317
0318
0319
0320
0321
0322
0323
0324
0325
0326
0327
0328
0329
0330
0331
0332
0333
0334 int cio_cancel_halt_clear(struct subchannel *sch, int *iretry)
0335 {
0336 int ret;
0337
0338 if (cio_update_schib(sch))
0339 return -ENODEV;
0340 if (!sch->schib.pmcw.ena)
0341
0342 return 0;
0343
0344 if (!(scsw_actl(&sch->schib.scsw) & SCSW_ACTL_HALT_PEND) &&
0345 !(scsw_actl(&sch->schib.scsw) & SCSW_ACTL_CLEAR_PEND)) {
0346 if (!scsw_is_tm(&sch->schib.scsw)) {
0347 ret = cio_cancel(sch);
0348 if (ret != -EINVAL)
0349 return ret;
0350 }
0351
0352
0353
0354
0355 *iretry = 3;
0356 }
0357
0358 if (!(scsw_actl(&sch->schib.scsw) & SCSW_ACTL_CLEAR_PEND)) {
0359 if (*iretry) {
0360 *iretry -= 1;
0361 ret = cio_halt(sch);
0362 if (ret != -EBUSY)
0363 return (ret == 0) ? -EBUSY : ret;
0364 }
0365
0366 *iretry = 255;
0367 }
0368
0369 if (*iretry) {
0370 *iretry -= 1;
0371 ret = cio_clear(sch);
0372 return (ret == 0) ? -EBUSY : ret;
0373 }
0374
0375 return -EIO;
0376 }
0377 EXPORT_SYMBOL_GPL(cio_cancel_halt_clear);
0378
0379 static void cio_apply_config(struct subchannel *sch, struct schib *schib)
0380 {
0381 schib->pmcw.intparm = sch->config.intparm;
0382 schib->pmcw.mbi = sch->config.mbi;
0383 schib->pmcw.isc = sch->config.isc;
0384 schib->pmcw.ena = sch->config.ena;
0385 schib->pmcw.mme = sch->config.mme;
0386 schib->pmcw.mp = sch->config.mp;
0387 schib->pmcw.csense = sch->config.csense;
0388 schib->pmcw.mbfc = sch->config.mbfc;
0389 if (sch->config.mbfc)
0390 schib->mba = sch->config.mba;
0391 }
0392
0393 static int cio_check_config(struct subchannel *sch, struct schib *schib)
0394 {
0395 return (schib->pmcw.intparm == sch->config.intparm) &&
0396 (schib->pmcw.mbi == sch->config.mbi) &&
0397 (schib->pmcw.isc == sch->config.isc) &&
0398 (schib->pmcw.ena == sch->config.ena) &&
0399 (schib->pmcw.mme == sch->config.mme) &&
0400 (schib->pmcw.mp == sch->config.mp) &&
0401 (schib->pmcw.csense == sch->config.csense) &&
0402 (schib->pmcw.mbfc == sch->config.mbfc) &&
0403 (!sch->config.mbfc || (schib->mba == sch->config.mba));
0404 }
0405
0406
0407
0408
0409 int cio_commit_config(struct subchannel *sch)
0410 {
0411 int ccode, retry, ret = 0;
0412 struct schib schib;
0413 struct irb irb;
0414
0415 if (stsch(sch->schid, &schib) || !css_sch_is_valid(&schib))
0416 return -ENODEV;
0417
0418 for (retry = 0; retry < 5; retry++) {
0419
0420 cio_apply_config(sch, &schib);
0421 ccode = msch(sch->schid, &schib);
0422 if (ccode < 0)
0423 return ccode;
0424 switch (ccode) {
0425 case 0:
0426 if (stsch(sch->schid, &schib) ||
0427 !css_sch_is_valid(&schib))
0428 return -ENODEV;
0429 if (cio_check_config(sch, &schib)) {
0430
0431 memcpy(&sch->schib, &schib, sizeof(schib));
0432 return 0;
0433 }
0434 ret = -EAGAIN;
0435 break;
0436 case 1:
0437 ret = -EBUSY;
0438 if (tsch(sch->schid, &irb))
0439 return ret;
0440 break;
0441 case 2:
0442 udelay(100);
0443 ret = -EBUSY;
0444 break;
0445 case 3:
0446 return -ENODEV;
0447 }
0448 }
0449 return ret;
0450 }
0451 EXPORT_SYMBOL_GPL(cio_commit_config);
0452
0453
0454
0455
0456
0457
0458 int cio_update_schib(struct subchannel *sch)
0459 {
0460 struct schib schib;
0461
0462 if (stsch(sch->schid, &schib) || !css_sch_is_valid(&schib))
0463 return -ENODEV;
0464
0465 memcpy(&sch->schib, &schib, sizeof(schib));
0466 return 0;
0467 }
0468 EXPORT_SYMBOL_GPL(cio_update_schib);
0469
0470
0471
0472
0473
0474
0475 int cio_enable_subchannel(struct subchannel *sch, u32 intparm)
0476 {
0477 int ret;
0478
0479 CIO_TRACE_EVENT(2, "ensch");
0480 CIO_TRACE_EVENT(2, dev_name(&sch->dev));
0481
0482 if (sch_is_pseudo_sch(sch))
0483 return -EINVAL;
0484 if (cio_update_schib(sch))
0485 return -ENODEV;
0486
0487 sch->config.ena = 1;
0488 sch->config.isc = sch->isc;
0489 sch->config.intparm = intparm;
0490
0491 ret = cio_commit_config(sch);
0492 if (ret == -EIO) {
0493
0494
0495
0496
0497 sch->config.csense = 0;
0498 ret = cio_commit_config(sch);
0499 }
0500 CIO_HEX_EVENT(2, &ret, sizeof(ret));
0501 return ret;
0502 }
0503 EXPORT_SYMBOL_GPL(cio_enable_subchannel);
0504
0505
0506
0507
0508
0509 int cio_disable_subchannel(struct subchannel *sch)
0510 {
0511 int ret;
0512
0513 CIO_TRACE_EVENT(2, "dissch");
0514 CIO_TRACE_EVENT(2, dev_name(&sch->dev));
0515
0516 if (sch_is_pseudo_sch(sch))
0517 return 0;
0518 if (cio_update_schib(sch))
0519 return -ENODEV;
0520
0521 sch->config.ena = 0;
0522 ret = cio_commit_config(sch);
0523
0524 CIO_HEX_EVENT(2, &ret, sizeof(ret));
0525 return ret;
0526 }
0527 EXPORT_SYMBOL_GPL(cio_disable_subchannel);
0528
0529
0530
0531
0532 static irqreturn_t do_cio_interrupt(int irq, void *dummy)
0533 {
0534 struct tpi_info *tpi_info;
0535 struct subchannel *sch;
0536 struct irb *irb;
0537
0538 set_cpu_flag(CIF_NOHZ_DELAY);
0539 tpi_info = &get_irq_regs()->tpi_info;
0540 trace_s390_cio_interrupt(tpi_info);
0541 irb = this_cpu_ptr(&cio_irb);
0542 sch = (struct subchannel *)(unsigned long) tpi_info->intparm;
0543 if (!sch) {
0544
0545 inc_irq_stat(IRQIO_CIO);
0546 tsch(tpi_info->schid, irb);
0547 return IRQ_HANDLED;
0548 }
0549 spin_lock(sch->lock);
0550
0551 if (tsch(tpi_info->schid, irb) == 0) {
0552
0553 memcpy (&sch->schib.scsw, &irb->scsw, sizeof (irb->scsw));
0554
0555 if (sch->driver && sch->driver->irq)
0556 sch->driver->irq(sch);
0557 else
0558 inc_irq_stat(IRQIO_CIO);
0559 } else
0560 inc_irq_stat(IRQIO_CIO);
0561 spin_unlock(sch->lock);
0562
0563 return IRQ_HANDLED;
0564 }
0565
0566 void __init init_cio_interrupts(void)
0567 {
0568 irq_set_chip_and_handler(IO_INTERRUPT,
0569 &dummy_irq_chip, handle_percpu_irq);
0570 if (request_irq(IO_INTERRUPT, do_cio_interrupt, 0, "I/O", NULL))
0571 panic("Failed to register I/O interrupt\n");
0572 }
0573
0574 #ifdef CONFIG_CCW_CONSOLE
0575 static struct subchannel *console_sch;
0576 static struct lock_class_key console_sch_key;
0577
0578
0579
0580
0581
0582 void cio_tsch(struct subchannel *sch)
0583 {
0584 struct irb *irb;
0585 int irq_context;
0586
0587 irb = this_cpu_ptr(&cio_irb);
0588
0589 if (tsch(sch->schid, irb) != 0)
0590
0591 return;
0592 memcpy(&sch->schib.scsw, &irb->scsw, sizeof(union scsw));
0593
0594 irq_context = in_interrupt();
0595 if (!irq_context) {
0596 local_bh_disable();
0597 irq_enter();
0598 }
0599 kstat_incr_irq_this_cpu(IO_INTERRUPT);
0600 if (sch->driver && sch->driver->irq)
0601 sch->driver->irq(sch);
0602 else
0603 inc_irq_stat(IRQIO_CIO);
0604 if (!irq_context) {
0605 irq_exit();
0606 _local_bh_enable();
0607 }
0608 }
0609
0610 static int cio_test_for_console(struct subchannel_id schid, void *data)
0611 {
0612 struct schib schib;
0613
0614 if (stsch(schid, &schib) != 0)
0615 return -ENXIO;
0616 if ((schib.pmcw.st == SUBCHANNEL_TYPE_IO) && schib.pmcw.dnv &&
0617 (schib.pmcw.dev == console_devno)) {
0618 console_irq = schid.sch_no;
0619 return 1;
0620 }
0621 return 0;
0622 }
0623
0624 static int cio_get_console_sch_no(void)
0625 {
0626 struct subchannel_id schid;
0627 struct schib schib;
0628
0629 init_subchannel_id(&schid);
0630 if (console_irq != -1) {
0631
0632 schid.sch_no = console_irq;
0633 if (stsch(schid, &schib) != 0 ||
0634 (schib.pmcw.st != SUBCHANNEL_TYPE_IO) || !schib.pmcw.dnv)
0635 return -1;
0636 console_devno = schib.pmcw.dev;
0637 } else if (console_devno != -1) {
0638
0639 for_each_subchannel(cio_test_for_console, NULL);
0640 }
0641 return console_irq;
0642 }
0643
0644 struct subchannel *cio_probe_console(void)
0645 {
0646 struct subchannel_id schid;
0647 struct subchannel *sch;
0648 struct schib schib;
0649 int sch_no, ret;
0650
0651 sch_no = cio_get_console_sch_no();
0652 if (sch_no == -1) {
0653 pr_warn("No CCW console was found\n");
0654 return ERR_PTR(-ENODEV);
0655 }
0656 init_subchannel_id(&schid);
0657 schid.sch_no = sch_no;
0658 ret = stsch(schid, &schib);
0659 if (ret)
0660 return ERR_PTR(-ENODEV);
0661
0662 sch = css_alloc_subchannel(schid, &schib);
0663 if (IS_ERR(sch))
0664 return sch;
0665
0666 lockdep_set_class(sch->lock, &console_sch_key);
0667 isc_register(CONSOLE_ISC);
0668 sch->config.isc = CONSOLE_ISC;
0669 sch->config.intparm = (u32)(addr_t)sch;
0670 ret = cio_commit_config(sch);
0671 if (ret) {
0672 isc_unregister(CONSOLE_ISC);
0673 put_device(&sch->dev);
0674 return ERR_PTR(ret);
0675 }
0676 console_sch = sch;
0677 return sch;
0678 }
0679
0680 int cio_is_console(struct subchannel_id schid)
0681 {
0682 if (!console_sch)
0683 return 0;
0684 return schid_equal(&schid, &console_sch->schid);
0685 }
0686
0687 void cio_register_early_subchannels(void)
0688 {
0689 int ret;
0690
0691 if (!console_sch)
0692 return;
0693
0694 ret = css_register_subchannel(console_sch);
0695 if (ret)
0696 put_device(&console_sch->dev);
0697 }
0698 #endif
0699
0700
0701
0702
0703
0704
0705
0706
0707
0708
0709
0710 int cio_tm_start_key(struct subchannel *sch, struct tcw *tcw, u8 lpm, u8 key)
0711 {
0712 int cc;
0713 union orb *orb = &to_io_private(sch)->orb;
0714
0715 memset(orb, 0, sizeof(union orb));
0716 orb->tm.intparm = (u32) (addr_t) sch;
0717 orb->tm.key = key >> 4;
0718 orb->tm.b = 1;
0719 orb->tm.lpm = lpm ? lpm : sch->lpm;
0720 orb->tm.tcw = (u32) (addr_t) tcw;
0721 cc = ssch(sch->schid, orb);
0722 switch (cc) {
0723 case 0:
0724 return 0;
0725 case 1:
0726 case 2:
0727 return -EBUSY;
0728 default:
0729 return cio_start_handle_notoper(sch, lpm);
0730 }
0731 }
0732 EXPORT_SYMBOL_GPL(cio_tm_start_key);
0733
0734
0735
0736
0737
0738
0739
0740
0741 int cio_tm_intrg(struct subchannel *sch)
0742 {
0743 int cc;
0744
0745 if (!to_io_private(sch)->orb.tm.b)
0746 return -EINVAL;
0747 cc = xsch(sch->schid);
0748 switch (cc) {
0749 case 0:
0750 case 2:
0751 return 0;
0752 case 1:
0753 return -EBUSY;
0754 default:
0755 return -ENODEV;
0756 }
0757 }
0758 EXPORT_SYMBOL_GPL(cio_tm_intrg);