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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * An i2c driver for the Xicor/Intersil X1205 RTC
0004  * Copyright 2004 Karen Spearel
0005  * Copyright 2005 Alessandro Zummo
0006  *
0007  * please send all reports to:
0008  *  Karen Spearel <kas111 at gmail dot com>
0009  *  Alessandro Zummo <a.zummo@towertech.it>
0010  *
0011  * based on a lot of other RTC drivers.
0012  *
0013  * Information and datasheet:
0014  * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
0015  */
0016 
0017 #include <linux/i2c.h>
0018 #include <linux/bcd.h>
0019 #include <linux/rtc.h>
0020 #include <linux/delay.h>
0021 #include <linux/module.h>
0022 #include <linux/bitops.h>
0023 
0024 /* offsets into CCR area */
0025 
0026 #define CCR_SEC         0
0027 #define CCR_MIN         1
0028 #define CCR_HOUR        2
0029 #define CCR_MDAY        3
0030 #define CCR_MONTH       4
0031 #define CCR_YEAR        5
0032 #define CCR_WDAY        6
0033 #define CCR_Y2K         7
0034 
0035 #define X1205_REG_SR        0x3F    /* status register */
0036 #define X1205_REG_Y2K       0x37
0037 #define X1205_REG_DW        0x36
0038 #define X1205_REG_YR        0x35
0039 #define X1205_REG_MO        0x34
0040 #define X1205_REG_DT        0x33
0041 #define X1205_REG_HR        0x32
0042 #define X1205_REG_MN        0x31
0043 #define X1205_REG_SC        0x30
0044 #define X1205_REG_DTR       0x13
0045 #define X1205_REG_ATR       0x12
0046 #define X1205_REG_INT       0x11
0047 #define X1205_REG_0     0x10
0048 #define X1205_REG_Y2K1      0x0F
0049 #define X1205_REG_DWA1      0x0E
0050 #define X1205_REG_YRA1      0x0D
0051 #define X1205_REG_MOA1      0x0C
0052 #define X1205_REG_DTA1      0x0B
0053 #define X1205_REG_HRA1      0x0A
0054 #define X1205_REG_MNA1      0x09
0055 #define X1205_REG_SCA1      0x08
0056 #define X1205_REG_Y2K0      0x07
0057 #define X1205_REG_DWA0      0x06
0058 #define X1205_REG_YRA0      0x05
0059 #define X1205_REG_MOA0      0x04
0060 #define X1205_REG_DTA0      0x03
0061 #define X1205_REG_HRA0      0x02
0062 #define X1205_REG_MNA0      0x01
0063 #define X1205_REG_SCA0      0x00
0064 
0065 #define X1205_CCR_BASE      0x30    /* Base address of CCR */
0066 #define X1205_ALM0_BASE     0x00    /* Base address of ALARM0 */
0067 
0068 #define X1205_SR_RTCF       0x01    /* Clock failure */
0069 #define X1205_SR_WEL        0x02    /* Write Enable Latch */
0070 #define X1205_SR_RWEL       0x04    /* Register Write Enable */
0071 #define X1205_SR_AL0        0x20    /* Alarm 0 match */
0072 
0073 #define X1205_DTR_DTR0      0x01
0074 #define X1205_DTR_DTR1      0x02
0075 #define X1205_DTR_DTR2      0x04
0076 
0077 #define X1205_HR_MIL        0x80    /* Set in ccr.hour for 24 hr mode */
0078 
0079 #define X1205_INT_AL0E      0x20    /* Alarm 0 enable */
0080 
0081 static struct i2c_driver x1205_driver;
0082 
0083 /*
0084  * In the routines that deal directly with the x1205 hardware, we use
0085  * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
0086  * Epoch is initialized as 2000. Time is set to UTC.
0087  */
0088 static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
0089                 unsigned char reg_base)
0090 {
0091     unsigned char dt_addr[2] = { 0, reg_base };
0092     unsigned char buf[8];
0093     int i;
0094 
0095     struct i2c_msg msgs[] = {
0096         {/* setup read ptr */
0097             .addr = client->addr,
0098             .len = 2,
0099             .buf = dt_addr
0100         },
0101         {/* read date */
0102             .addr = client->addr,
0103             .flags = I2C_M_RD,
0104             .len = 8,
0105             .buf = buf
0106         },
0107     };
0108 
0109     /* read date registers */
0110     if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
0111         dev_err(&client->dev, "%s: read error\n", __func__);
0112         return -EIO;
0113     }
0114 
0115     dev_dbg(&client->dev,
0116         "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
0117         "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
0118         __func__,
0119         buf[0], buf[1], buf[2], buf[3],
0120         buf[4], buf[5], buf[6], buf[7]);
0121 
0122     /* Mask out the enable bits if these are alarm registers */
0123     if (reg_base < X1205_CCR_BASE)
0124         for (i = 0; i <= 4; i++)
0125             buf[i] &= 0x7F;
0126 
0127     tm->tm_sec = bcd2bin(buf[CCR_SEC]);
0128     tm->tm_min = bcd2bin(buf[CCR_MIN]);
0129     tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
0130     tm->tm_mday = bcd2bin(buf[CCR_MDAY]);
0131     tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
0132     tm->tm_year = bcd2bin(buf[CCR_YEAR])
0133             + (bcd2bin(buf[CCR_Y2K]) * 100) - 1900;
0134     tm->tm_wday = buf[CCR_WDAY];
0135 
0136     dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
0137         "mday=%d, mon=%d, year=%d, wday=%d\n",
0138         __func__,
0139         tm->tm_sec, tm->tm_min, tm->tm_hour,
0140         tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
0141 
0142     return 0;
0143 }
0144 
0145 static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
0146 {
0147     static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
0148 
0149     struct i2c_msg msgs[] = {
0150         {     /* setup read ptr */
0151             .addr = client->addr,
0152             .len = 2,
0153             .buf = sr_addr
0154         },
0155         {    /* read status */
0156             .addr = client->addr,
0157             .flags = I2C_M_RD,
0158             .len = 1,
0159             .buf = sr
0160         },
0161     };
0162 
0163     /* read status register */
0164     if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
0165         dev_err(&client->dev, "%s: read error\n", __func__);
0166         return -EIO;
0167     }
0168 
0169     return 0;
0170 }
0171 
0172 static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
0173             u8 reg_base, unsigned char alm_enable)
0174 {
0175     int i, xfer;
0176     unsigned char rdata[10] = { 0, reg_base };
0177     unsigned char *buf = rdata + 2;
0178 
0179     static const unsigned char wel[3] = { 0, X1205_REG_SR,
0180                         X1205_SR_WEL };
0181 
0182     static const unsigned char rwel[3] = { 0, X1205_REG_SR,
0183                         X1205_SR_WEL | X1205_SR_RWEL };
0184 
0185     static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
0186 
0187     dev_dbg(&client->dev,
0188         "%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n",
0189         __func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday,
0190         tm->tm_mon, tm->tm_year, tm->tm_wday);
0191 
0192     buf[CCR_SEC] = bin2bcd(tm->tm_sec);
0193     buf[CCR_MIN] = bin2bcd(tm->tm_min);
0194 
0195     /* set hour and 24hr bit */
0196     buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
0197 
0198     buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
0199 
0200     /* month, 1 - 12 */
0201     buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
0202 
0203     /* year, since the rtc epoch*/
0204     buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
0205     buf[CCR_WDAY] = tm->tm_wday & 0x07;
0206     buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
0207 
0208     /* If writing alarm registers, set compare bits on registers 0-4 */
0209     if (reg_base < X1205_CCR_BASE)
0210         for (i = 0; i <= 4; i++)
0211             buf[i] |= 0x80;
0212 
0213     /* this sequence is required to unlock the chip */
0214     xfer = i2c_master_send(client, wel, 3);
0215     if (xfer != 3) {
0216         dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
0217         return -EIO;
0218     }
0219 
0220     xfer = i2c_master_send(client, rwel, 3);
0221     if (xfer != 3) {
0222         dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
0223         return -EIO;
0224     }
0225 
0226     xfer = i2c_master_send(client, rdata, sizeof(rdata));
0227     if (xfer != sizeof(rdata)) {
0228         dev_err(&client->dev,
0229             "%s: result=%d addr=%02x, data=%02x\n",
0230             __func__,
0231              xfer, rdata[1], rdata[2]);
0232         return -EIO;
0233     }
0234 
0235     /* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
0236     if (reg_base < X1205_CCR_BASE) {
0237         unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
0238 
0239         msleep(10);
0240 
0241         /* ...and set or clear the AL0E bit in the INT register */
0242 
0243         /* Need to set RWEL again as the write has cleared it */
0244         xfer = i2c_master_send(client, rwel, 3);
0245         if (xfer != 3) {
0246             dev_err(&client->dev,
0247                 "%s: aloe rwel - %d\n",
0248                 __func__,
0249                 xfer);
0250             return -EIO;
0251         }
0252 
0253         if (alm_enable)
0254             al0e[2] = X1205_INT_AL0E;
0255 
0256         xfer = i2c_master_send(client, al0e, 3);
0257         if (xfer != 3) {
0258             dev_err(&client->dev,
0259                 "%s: al0e - %d\n",
0260                 __func__,
0261                 xfer);
0262             return -EIO;
0263         }
0264 
0265         /* and wait 10msec again for this write to complete */
0266         msleep(10);
0267     }
0268 
0269     /* disable further writes */
0270     xfer = i2c_master_send(client, diswe, 3);
0271     if (xfer != 3) {
0272         dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
0273         return -EIO;
0274     }
0275 
0276     return 0;
0277 }
0278 
0279 static int x1205_fix_osc(struct i2c_client *client)
0280 {
0281     int err;
0282     struct rtc_time tm;
0283 
0284     memset(&tm, 0, sizeof(tm));
0285 
0286     err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0);
0287     if (err < 0)
0288         dev_err(&client->dev, "unable to restart the oscillator\n");
0289 
0290     return err;
0291 }
0292 
0293 static int x1205_get_dtrim(struct i2c_client *client, int *trim)
0294 {
0295     unsigned char dtr;
0296     static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
0297 
0298     struct i2c_msg msgs[] = {
0299         {   /* setup read ptr */
0300             .addr = client->addr,
0301             .len = 2,
0302             .buf = dtr_addr
0303         },
0304         {      /* read dtr */
0305             .addr = client->addr,
0306             .flags = I2C_M_RD,
0307             .len = 1,
0308             .buf = &dtr
0309         },
0310     };
0311 
0312     /* read dtr register */
0313     if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
0314         dev_err(&client->dev, "%s: read error\n", __func__);
0315         return -EIO;
0316     }
0317 
0318     dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
0319 
0320     *trim = 0;
0321 
0322     if (dtr & X1205_DTR_DTR0)
0323         *trim += 20;
0324 
0325     if (dtr & X1205_DTR_DTR1)
0326         *trim += 10;
0327 
0328     if (dtr & X1205_DTR_DTR2)
0329         *trim = -*trim;
0330 
0331     return 0;
0332 }
0333 
0334 static int x1205_get_atrim(struct i2c_client *client, int *trim)
0335 {
0336     s8 atr;
0337     static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
0338 
0339     struct i2c_msg msgs[] = {
0340         {/* setup read ptr */
0341             .addr = client->addr,
0342             .len = 2,
0343             .buf = atr_addr
0344         },
0345         {/* read atr */
0346             .addr = client->addr,
0347             .flags = I2C_M_RD,
0348             .len = 1,
0349             .buf = &atr
0350         },
0351     };
0352 
0353     /* read atr register */
0354     if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
0355         dev_err(&client->dev, "%s: read error\n", __func__);
0356         return -EIO;
0357     }
0358 
0359     dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
0360 
0361     /* atr is a two's complement value on 6 bits,
0362      * perform sign extension. The formula is
0363      * Catr = (atr * 0.25pF) + 11.00pF.
0364      */
0365     atr = sign_extend32(atr, 5);
0366 
0367     dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
0368 
0369     *trim = (atr * 250) + 11000;
0370 
0371     dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
0372 
0373     return 0;
0374 }
0375 
0376 struct x1205_limit {
0377     unsigned char reg, mask, min, max;
0378 };
0379 
0380 static int x1205_validate_client(struct i2c_client *client)
0381 {
0382     int i, xfer;
0383 
0384     /* Probe array. We will read the register at the specified
0385      * address and check if the given bits are zero.
0386      */
0387     static const unsigned char probe_zero_pattern[] = {
0388         /* register, mask */
0389         X1205_REG_SR,   0x18,
0390         X1205_REG_DTR,  0xF8,
0391         X1205_REG_ATR,  0xC0,
0392         X1205_REG_INT,  0x18,
0393         X1205_REG_0,    0xFF,
0394     };
0395 
0396     static const struct x1205_limit probe_limits_pattern[] = {
0397         /* register, mask, min, max */
0398         { X1205_REG_Y2K,    0xFF,   19, 20  },
0399         { X1205_REG_DW,     0xFF,   0,  6   },
0400         { X1205_REG_YR,     0xFF,   0,  99  },
0401         { X1205_REG_MO,     0xFF,   0,  12  },
0402         { X1205_REG_DT,     0xFF,   0,  31  },
0403         { X1205_REG_HR,     0x7F,   0,  23  },
0404         { X1205_REG_MN,     0xFF,   0,  59  },
0405         { X1205_REG_SC,     0xFF,   0,  59  },
0406         { X1205_REG_Y2K1,   0xFF,   19, 20  },
0407         { X1205_REG_Y2K0,   0xFF,   19, 20  },
0408     };
0409 
0410     /* check that registers have bits a 0 where expected */
0411     for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
0412         unsigned char buf;
0413 
0414         unsigned char addr[2] = { 0, probe_zero_pattern[i] };
0415 
0416         struct i2c_msg msgs[2] = {
0417             {
0418                 .addr = client->addr,
0419                 .len = 2,
0420                 .buf = addr
0421             },
0422             {
0423                 .addr = client->addr,
0424                 .flags = I2C_M_RD,
0425                 .len = 1,
0426                 .buf = &buf
0427             },
0428         };
0429 
0430         xfer = i2c_transfer(client->adapter, msgs, 2);
0431         if (xfer != 2) {
0432             dev_err(&client->dev,
0433                 "%s: could not read register %x\n",
0434                 __func__, probe_zero_pattern[i]);
0435 
0436             return -EIO;
0437         }
0438 
0439         if ((buf & probe_zero_pattern[i+1]) != 0) {
0440             dev_err(&client->dev,
0441                 "%s: register=%02x, zero pattern=%d, value=%x\n",
0442                 __func__, probe_zero_pattern[i], i, buf);
0443 
0444             return -ENODEV;
0445         }
0446     }
0447 
0448     /* check limits (only registers with bcd values) */
0449     for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
0450         unsigned char reg, value;
0451 
0452         unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
0453 
0454         struct i2c_msg msgs[2] = {
0455             {
0456                 .addr = client->addr,
0457                 .len = 2,
0458                 .buf = addr
0459             },
0460             {
0461                 .addr = client->addr,
0462                 .flags = I2C_M_RD,
0463                 .len = 1,
0464                 .buf = &reg
0465             },
0466         };
0467 
0468         xfer = i2c_transfer(client->adapter, msgs, 2);
0469         if (xfer != 2) {
0470             dev_err(&client->dev,
0471                 "%s: could not read register %x\n",
0472                 __func__, probe_limits_pattern[i].reg);
0473 
0474             return -EIO;
0475         }
0476 
0477         value = bcd2bin(reg & probe_limits_pattern[i].mask);
0478 
0479         if (value > probe_limits_pattern[i].max ||
0480             value < probe_limits_pattern[i].min) {
0481             dev_dbg(&client->dev,
0482                 "%s: register=%x, lim pattern=%d, value=%d\n",
0483                 __func__, probe_limits_pattern[i].reg,
0484                 i, value);
0485 
0486             return -ENODEV;
0487         }
0488     }
0489 
0490     return 0;
0491 }
0492 
0493 static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0494 {
0495     int err;
0496     unsigned char intreg, status;
0497     static unsigned char int_addr[2] = { 0, X1205_REG_INT };
0498     struct i2c_client *client = to_i2c_client(dev);
0499     struct i2c_msg msgs[] = {
0500         { /* setup read ptr */
0501             .addr = client->addr,
0502             .len = 2,
0503             .buf = int_addr
0504         },
0505         {/* read INT register */
0506 
0507             .addr = client->addr,
0508             .flags = I2C_M_RD,
0509             .len = 1,
0510             .buf = &intreg
0511         },
0512     };
0513 
0514     /* read interrupt register and status register */
0515     if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
0516         dev_err(&client->dev, "%s: read error\n", __func__);
0517         return -EIO;
0518     }
0519     err = x1205_get_status(client, &status);
0520     if (err == 0) {
0521         alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
0522         alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
0523         err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
0524     }
0525     return err;
0526 }
0527 
0528 static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0529 {
0530     return x1205_set_datetime(to_i2c_client(dev),
0531         &alrm->time, X1205_ALM0_BASE, alrm->enabled);
0532 }
0533 
0534 static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
0535 {
0536     return x1205_get_datetime(to_i2c_client(dev),
0537         tm, X1205_CCR_BASE);
0538 }
0539 
0540 static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
0541 {
0542     return x1205_set_datetime(to_i2c_client(dev),
0543         tm, X1205_CCR_BASE, 0);
0544 }
0545 
0546 static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
0547 {
0548     int err, dtrim, atrim;
0549 
0550     err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
0551     if (!err)
0552         seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
0553 
0554     err = x1205_get_atrim(to_i2c_client(dev), &atrim);
0555     if (!err)
0556         seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
0557             atrim / 1000, atrim % 1000);
0558     return 0;
0559 }
0560 
0561 static const struct rtc_class_ops x1205_rtc_ops = {
0562     .proc       = x1205_rtc_proc,
0563     .read_time  = x1205_rtc_read_time,
0564     .set_time   = x1205_rtc_set_time,
0565     .read_alarm = x1205_rtc_read_alarm,
0566     .set_alarm  = x1205_rtc_set_alarm,
0567 };
0568 
0569 static ssize_t x1205_sysfs_show_atrim(struct device *dev,
0570                 struct device_attribute *attr, char *buf)
0571 {
0572     int err, atrim;
0573 
0574     err = x1205_get_atrim(to_i2c_client(dev), &atrim);
0575     if (err)
0576         return err;
0577 
0578     return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
0579 }
0580 static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
0581 
0582 static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
0583                 struct device_attribute *attr, char *buf)
0584 {
0585     int err, dtrim;
0586 
0587     err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
0588     if (err)
0589         return err;
0590 
0591     return sprintf(buf, "%d ppm\n", dtrim);
0592 }
0593 static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
0594 
0595 static int x1205_sysfs_register(struct device *dev)
0596 {
0597     int err;
0598 
0599     err = device_create_file(dev, &dev_attr_atrim);
0600     if (err)
0601         return err;
0602 
0603     err = device_create_file(dev, &dev_attr_dtrim);
0604     if (err)
0605         device_remove_file(dev, &dev_attr_atrim);
0606 
0607     return err;
0608 }
0609 
0610 static void x1205_sysfs_unregister(struct device *dev)
0611 {
0612     device_remove_file(dev, &dev_attr_atrim);
0613     device_remove_file(dev, &dev_attr_dtrim);
0614 }
0615 
0616 
0617 static int x1205_probe(struct i2c_client *client)
0618 {
0619     int err = 0;
0620     unsigned char sr;
0621     struct rtc_device *rtc;
0622 
0623     dev_dbg(&client->dev, "%s\n", __func__);
0624 
0625     if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
0626         return -ENODEV;
0627 
0628     if (x1205_validate_client(client) < 0)
0629         return -ENODEV;
0630 
0631     rtc = devm_rtc_device_register(&client->dev, x1205_driver.driver.name,
0632                     &x1205_rtc_ops, THIS_MODULE);
0633 
0634     if (IS_ERR(rtc))
0635         return PTR_ERR(rtc);
0636 
0637     i2c_set_clientdata(client, rtc);
0638 
0639     /* Check for power failures and eventually enable the osc */
0640     err = x1205_get_status(client, &sr);
0641     if (!err) {
0642         if (sr & X1205_SR_RTCF) {
0643             dev_err(&client->dev,
0644                 "power failure detected, "
0645                 "please set the clock\n");
0646             udelay(50);
0647             x1205_fix_osc(client);
0648         }
0649     } else {
0650         dev_err(&client->dev, "couldn't read status\n");
0651     }
0652 
0653     err = x1205_sysfs_register(&client->dev);
0654     if (err)
0655         dev_err(&client->dev, "Unable to create sysfs entries\n");
0656 
0657     return 0;
0658 }
0659 
0660 static int x1205_remove(struct i2c_client *client)
0661 {
0662     x1205_sysfs_unregister(&client->dev);
0663     return 0;
0664 }
0665 
0666 static const struct i2c_device_id x1205_id[] = {
0667     { "x1205", 0 },
0668     { }
0669 };
0670 MODULE_DEVICE_TABLE(i2c, x1205_id);
0671 
0672 static const struct of_device_id x1205_dt_ids[] = {
0673     { .compatible = "xircom,x1205", },
0674     {},
0675 };
0676 MODULE_DEVICE_TABLE(of, x1205_dt_ids);
0677 
0678 static struct i2c_driver x1205_driver = {
0679     .driver     = {
0680         .name   = "rtc-x1205",
0681         .of_match_table = x1205_dt_ids,
0682     },
0683     .probe_new  = x1205_probe,
0684     .remove     = x1205_remove,
0685     .id_table   = x1205_id,
0686 };
0687 
0688 module_i2c_driver(x1205_driver);
0689 
0690 MODULE_AUTHOR(
0691     "Karen Spearel <kas111 at gmail dot com>, "
0692     "Alessandro Zummo <a.zummo@towertech.it>");
0693 MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
0694 MODULE_LICENSE("GPL");
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