drivers/rtc/rtc-wm831x.c

0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  *  Real Time Clock driver for Wolfson Microelectronics WM831x
0004  *
0005  *  Copyright (C) 2009 Wolfson Microelectronics PLC.
0006  *
0007  *  Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
0008  *
0009  */
0010
0011 #include <linux/module.h>
0012 #include <linux/kernel.h>
0013 #include <linux/time.h>
0014 #include <linux/rtc.h>
0015 #include <linux/slab.h>
0016 #include <linux/bcd.h>
0017 #include <linux/interrupt.h>
0018 #include <linux/ioctl.h>
0019 #include <linux/completion.h>
0020 #include <linux/mfd/wm831x/core.h>
0021 #include <linux/delay.h>
0022 #include <linux/platform_device.h>
0023 #include <linux/random.h>
0024
0025 /*
0026  * R16416 (0x4020) - RTC Write Counter
0027  */
0028 #define WM831X_RTC_WR_CNT_MASK                  0xFFFF  /* RTC_WR_CNT - [15:0] */
0029 #define WM831X_RTC_WR_CNT_SHIFT                      0  /* RTC_WR_CNT - [15:0] */
0030 #define WM831X_RTC_WR_CNT_WIDTH                     16  /* RTC_WR_CNT - [15:0] */
0031
0032 /*
0033  * R16417 (0x4021) - RTC Time 1
0034  */
0035 #define WM831X_RTC_TIME_MASK                    0xFFFF  /* RTC_TIME - [15:0] */
0036 #define WM831X_RTC_TIME_SHIFT                        0  /* RTC_TIME - [15:0] */
0037 #define WM831X_RTC_TIME_WIDTH                       16  /* RTC_TIME - [15:0] */
0038
0039 /*
0040  * R16418 (0x4022) - RTC Time 2
0041  */
0042 #define WM831X_RTC_TIME_MASK                    0xFFFF  /* RTC_TIME - [15:0] */
0043 #define WM831X_RTC_TIME_SHIFT                        0  /* RTC_TIME - [15:0] */
0044 #define WM831X_RTC_TIME_WIDTH                       16  /* RTC_TIME - [15:0] */
0045
0046 /*
0047  * R16419 (0x4023) - RTC Alarm 1
0048  */
0049 #define WM831X_RTC_ALM_MASK                     0xFFFF  /* RTC_ALM - [15:0] */
0050 #define WM831X_RTC_ALM_SHIFT                         0  /* RTC_ALM - [15:0] */
0051 #define WM831X_RTC_ALM_WIDTH                        16  /* RTC_ALM - [15:0] */
0052
0053 /*
0054  * R16420 (0x4024) - RTC Alarm 2
0055  */
0056 #define WM831X_RTC_ALM_MASK                     0xFFFF  /* RTC_ALM - [15:0] */
0057 #define WM831X_RTC_ALM_SHIFT                         0  /* RTC_ALM - [15:0] */
0058 #define WM831X_RTC_ALM_WIDTH                        16  /* RTC_ALM - [15:0] */
0059
0060 /*
0061  * R16421 (0x4025) - RTC Control
0062  */
0063 #define WM831X_RTC_VALID                        0x8000  /* RTC_VALID */
0064 #define WM831X_RTC_VALID_MASK                   0x8000  /* RTC_VALID */
0065 #define WM831X_RTC_VALID_SHIFT                      15  /* RTC_VALID */
0066 #define WM831X_RTC_VALID_WIDTH                       1  /* RTC_VALID */
0067 #define WM831X_RTC_SYNC_BUSY                    0x4000  /* RTC_SYNC_BUSY */
0068 #define WM831X_RTC_SYNC_BUSY_MASK               0x4000  /* RTC_SYNC_BUSY */
0069 #define WM831X_RTC_SYNC_BUSY_SHIFT                  14  /* RTC_SYNC_BUSY */
0070 #define WM831X_RTC_SYNC_BUSY_WIDTH                   1  /* RTC_SYNC_BUSY */
0071 #define WM831X_RTC_ALM_ENA                      0x0400  /* RTC_ALM_ENA */
0072 #define WM831X_RTC_ALM_ENA_MASK                 0x0400  /* RTC_ALM_ENA */
0073 #define WM831X_RTC_ALM_ENA_SHIFT                    10  /* RTC_ALM_ENA */
0074 #define WM831X_RTC_ALM_ENA_WIDTH                     1  /* RTC_ALM_ENA */
0075 #define WM831X_RTC_PINT_FREQ_MASK               0x0070  /* RTC_PINT_FREQ - [6:4] */
0076 #define WM831X_RTC_PINT_FREQ_SHIFT                   4  /* RTC_PINT_FREQ - [6:4] */
0077 #define WM831X_RTC_PINT_FREQ_WIDTH                   3  /* RTC_PINT_FREQ - [6:4] */
0078
0079 /*
0080  * R16422 (0x4026) - RTC Trim
0081  */
0082 #define WM831X_RTC_TRIM_MASK                    0x03FF  /* RTC_TRIM - [9:0] */
0083 #define WM831X_RTC_TRIM_SHIFT                        0  /* RTC_TRIM - [9:0] */
0084 #define WM831X_RTC_TRIM_WIDTH                       10  /* RTC_TRIM - [9:0] */
0085
0086 #define WM831X_SET_TIME_RETRIES 5
0087 #define WM831X_GET_TIME_RETRIES 5
0088
0089 struct wm831x_rtc {
0090     struct wm831x *wm831x;
0091     struct rtc_device *rtc;
0092     unsigned int alarm_enabled:1;
0093 };
0094
0095 static void wm831x_rtc_add_randomness(struct wm831x *wm831x)
0096 {
0097     int ret;
0098     u16 reg;
0099
0100     /*
0101      * The write counter contains a pseudo-random number which is
0102      * regenerated every time we set the RTC so it should be a
0103      * useful per-system source of entropy.
0104      */
0105     ret = wm831x_reg_read(wm831x, WM831X_RTC_WRITE_COUNTER);
0106     if (ret >= 0) {
0107         reg = ret;
0108         add_device_randomness(&reg, sizeof(reg));
0109     } else {
0110         dev_warn(wm831x->dev, "Failed to read RTC write counter: %d\n",
0111              ret);
0112     }
0113 }
0114
0115 /*
0116  * Read current time and date in RTC
0117  */
0118 static int wm831x_rtc_readtime(struct device *dev, struct rtc_time *tm)
0119 {
0120     struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
0121     struct wm831x *wm831x = wm831x_rtc->wm831x;
0122     u16 time1[2], time2[2];
0123     int ret;
0124     int count = 0;
0125
0126     /* Has the RTC been programmed? */
0127     ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
0128     if (ret < 0) {
0129         dev_err(dev, "Failed to read RTC control: %d\n", ret);
0130         return ret;
0131     }
0132     if (!(ret & WM831X_RTC_VALID)) {
0133         dev_dbg(dev, "RTC not yet configured\n");
0134         return -EINVAL;
0135     }
0136
0137     /* Read twice to make sure we don't read a corrupt, partially
0138      * incremented, value.
0139      */
0140     do {
0141         ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,
0142                        2, time1);
0143         if (ret != 0)
0144             continue;
0145
0146         ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,
0147                        2, time2);
0148         if (ret != 0)
0149             continue;
0150
0151         if (memcmp(time1, time2, sizeof(time1)) == 0) {
0152             u32 time = (time1[0] << 16) | time1[1];
0153
0154             rtc_time64_to_tm(time, tm);
0155             return 0;
0156         }
0157
0158     } while (++count < WM831X_GET_TIME_RETRIES);
0159
0160     dev_err(dev, "Timed out reading current time\n");
0161
0162     return -EIO;
0163 }
0164
0165 /*
0166  * Set current time and date in RTC
0167  */
0168 static int wm831x_rtc_settime(struct device *dev, struct rtc_time *tm)
0169 {
0170     struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
0171     struct wm831x *wm831x = wm831x_rtc->wm831x;
0172     struct rtc_time new_tm;
0173     unsigned long time, new_time;
0174     int ret;
0175     int count = 0;
0176
0177     time = rtc_tm_to_time64(tm);
0178
0179     ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_1,
0180                    (time >> 16) & 0xffff);
0181     if (ret < 0) {
0182         dev_err(dev, "Failed to write TIME_1: %d\n", ret);
0183         return ret;
0184     }
0185
0186     ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_2, time & 0xffff);
0187     if (ret < 0) {
0188         dev_err(dev, "Failed to write TIME_2: %d\n", ret);
0189         return ret;
0190     }
0191
0192     /* Wait for the update to complete - should happen first time
0193      * round but be conservative.
0194      */
0195     do {
0196         msleep(1);
0197
0198         ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
0199         if (ret < 0)
0200             ret = WM831X_RTC_SYNC_BUSY;
0201     } while (!(ret & WM831X_RTC_SYNC_BUSY) &&
0202          ++count < WM831X_SET_TIME_RETRIES);
0203
0204     if (ret & WM831X_RTC_SYNC_BUSY) {
0205         dev_err(dev, "Timed out writing RTC update\n");
0206         return -EIO;
0207     }
0208
0209     /* Check that the update was accepted; security features may
0210      * have caused the update to be ignored.
0211      */
0212     ret = wm831x_rtc_readtime(dev, &new_tm);
0213     if (ret < 0)
0214         return ret;
0215
0216     new_time = rtc_tm_to_time64(&new_tm);
0217
0218     /* Allow a second of change in case of tick */
0219     if (new_time - time > 1) {
0220         dev_err(dev, "RTC update not permitted by hardware\n");
0221         return -EPERM;
0222     }
0223
0224     return 0;
0225 }
0226
0227 /*
0228  * Read alarm time and date in RTC
0229  */
0230 static int wm831x_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
0231 {
0232     struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
0233     int ret;
0234     u16 data[2];
0235     u32 time;
0236
0237     ret = wm831x_bulk_read(wm831x_rtc->wm831x, WM831X_RTC_ALARM_1,
0238                    2, data);
0239     if (ret != 0) {
0240         dev_err(dev, "Failed to read alarm time: %d\n", ret);
0241         return ret;
0242     }
0243
0244     time = (data[0] << 16) | data[1];
0245
0246     rtc_time64_to_tm(time, &alrm->time);
0247
0248     ret = wm831x_reg_read(wm831x_rtc->wm831x, WM831X_RTC_CONTROL);
0249     if (ret < 0) {
0250         dev_err(dev, "Failed to read RTC control: %d\n", ret);
0251         return ret;
0252     }
0253
0254     if (ret & WM831X_RTC_ALM_ENA)
0255         alrm->enabled = 1;
0256     else
0257         alrm->enabled = 0;
0258
0259     return 0;
0260 }
0261
0262 static int wm831x_rtc_stop_alarm(struct wm831x_rtc *wm831x_rtc)
0263 {
0264     wm831x_rtc->alarm_enabled = 0;
0265
0266     return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
0267                    WM831X_RTC_ALM_ENA, 0);
0268 }
0269
0270 static int wm831x_rtc_start_alarm(struct wm831x_rtc *wm831x_rtc)
0271 {
0272     wm831x_rtc->alarm_enabled = 1;
0273
0274     return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
0275                    WM831X_RTC_ALM_ENA, WM831X_RTC_ALM_ENA);
0276 }
0277
0278 static int wm831x_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
0279 {
0280     struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
0281     struct wm831x *wm831x = wm831x_rtc->wm831x;
0282     int ret;
0283     unsigned long time;
0284
0285     time = rtc_tm_to_time64(&alrm->time);
0286
0287     ret = wm831x_rtc_stop_alarm(wm831x_rtc);
0288     if (ret < 0) {
0289         dev_err(dev, "Failed to stop alarm: %d\n", ret);
0290         return ret;
0291     }
0292
0293     ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_1,
0294                    (time >> 16) & 0xffff);
0295     if (ret < 0) {
0296         dev_err(dev, "Failed to write ALARM_1: %d\n", ret);
0297         return ret;
0298     }
0299
0300     ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_2, time & 0xffff);
0301     if (ret < 0) {
0302         dev_err(dev, "Failed to write ALARM_2: %d\n", ret);
0303         return ret;
0304     }
0305
0306     if (alrm->enabled) {
0307         ret = wm831x_rtc_start_alarm(wm831x_rtc);
0308         if (ret < 0) {
0309             dev_err(dev, "Failed to start alarm: %d\n", ret);
0310             return ret;
0311         }
0312     }
0313
0314     return 0;
0315 }
0316
0317 static int wm831x_rtc_alarm_irq_enable(struct device *dev,
0318                        unsigned int enabled)
0319 {
0320     struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
0321
0322     if (enabled)
0323         return wm831x_rtc_start_alarm(wm831x_rtc);
0324     else
0325         return wm831x_rtc_stop_alarm(wm831x_rtc);
0326 }
0327
0328 static irqreturn_t wm831x_alm_irq(int irq, void *data)
0329 {
0330     struct wm831x_rtc *wm831x_rtc = data;
0331
0332     rtc_update_irq(wm831x_rtc->rtc, 1, RTC_IRQF | RTC_AF);
0333
0334     return IRQ_HANDLED;
0335 }
0336
0337 static const struct rtc_class_ops wm831x_rtc_ops = {
0338     .read_time = wm831x_rtc_readtime,
0339     .set_time = wm831x_rtc_settime,
0340     .read_alarm = wm831x_rtc_readalarm,
0341     .set_alarm = wm831x_rtc_setalarm,
0342     .alarm_irq_enable = wm831x_rtc_alarm_irq_enable,
0343 };
0344
0345 #ifdef CONFIG_PM
0346 /* Turn off the alarm if it should not be a wake source. */
0347 static int wm831x_rtc_suspend(struct device *dev)
0348 {
0349     struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
0350     int ret, enable;
0351
0352     if (wm831x_rtc->alarm_enabled && device_may_wakeup(dev))
0353         enable = WM831X_RTC_ALM_ENA;
0354     else
0355         enable = 0;
0356
0357     ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
0358                   WM831X_RTC_ALM_ENA, enable);
0359     if (ret != 0)
0360         dev_err(dev, "Failed to update RTC alarm: %d\n", ret);
0361
0362     return 0;
0363 }
0364
0365 /* Enable the alarm if it should be enabled (in case it was disabled to
0366  * prevent use as a wake source).
0367  */
0368 static int wm831x_rtc_resume(struct device *dev)
0369 {
0370     struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
0371     int ret;
0372
0373     if (wm831x_rtc->alarm_enabled) {
0374         ret = wm831x_rtc_start_alarm(wm831x_rtc);
0375         if (ret != 0)
0376             dev_err(dev, "Failed to restart RTC alarm: %d\n", ret);
0377     }
0378
0379     return 0;
0380 }
0381
0382 /* Unconditionally disable the alarm */
0383 static int wm831x_rtc_freeze(struct device *dev)
0384 {
0385     struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
0386     int ret;
0387
0388     ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
0389                   WM831X_RTC_ALM_ENA, 0);
0390     if (ret != 0)
0391         dev_err(dev, "Failed to stop RTC alarm: %d\n", ret);
0392
0393     return 0;
0394 }
0395 #else
0396 #define wm831x_rtc_suspend NULL
0397 #define wm831x_rtc_resume NULL
0398 #define wm831x_rtc_freeze NULL
0399 #endif
0400
0401 static int wm831x_rtc_probe(struct platform_device *pdev)
0402 {
0403     struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
0404     struct wm831x_rtc *wm831x_rtc;
0405     int alm_irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "ALM"));
0406     int ret = 0;
0407
0408     wm831x_rtc = devm_kzalloc(&pdev->dev, sizeof(*wm831x_rtc), GFP_KERNEL);
0409     if (wm831x_rtc == NULL)
0410         return -ENOMEM;
0411
0412     platform_set_drvdata(pdev, wm831x_rtc);
0413     wm831x_rtc->wm831x = wm831x;
0414
0415     ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
0416     if (ret < 0) {
0417         dev_err(&pdev->dev, "Failed to read RTC control: %d\n", ret);
0418         return ret;
0419     }
0420     if (ret & WM831X_RTC_ALM_ENA)
0421         wm831x_rtc->alarm_enabled = 1;
0422
0423     device_init_wakeup(&pdev->dev, 1);
0424
0425     wm831x_rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
0426     if (IS_ERR(wm831x_rtc->rtc))
0427         return PTR_ERR(wm831x_rtc->rtc);
0428
0429     wm831x_rtc->rtc->ops = &wm831x_rtc_ops;
0430     wm831x_rtc->rtc->range_max = U32_MAX;
0431
0432     ret = devm_rtc_register_device(wm831x_rtc->rtc);
0433     if (ret)
0434         return ret;
0435
0436     ret = devm_request_threaded_irq(&pdev->dev, alm_irq, NULL,
0437                 wm831x_alm_irq,
0438                 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
0439                 "RTC alarm",
0440                 wm831x_rtc);
0441     if (ret != 0) {
0442         dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n",
0443             alm_irq, ret);
0444     }
0445
0446     wm831x_rtc_add_randomness(wm831x);
0447
0448     return 0;
0449 }
0450
0451 static const struct dev_pm_ops wm831x_rtc_pm_ops = {
0452     .suspend = wm831x_rtc_suspend,
0453     .resume = wm831x_rtc_resume,
0454
0455     .freeze = wm831x_rtc_freeze,
0456     .thaw = wm831x_rtc_resume,
0457     .restore = wm831x_rtc_resume,
0458
0459     .poweroff = wm831x_rtc_suspend,
0460 };
0461
0462 static struct platform_driver wm831x_rtc_driver = {
0463     .probe = wm831x_rtc_probe,
0464     .driver = {
0465         .name = "wm831x-rtc",
0466         .pm = &wm831x_rtc_pm_ops,
0467     },
0468 };
0469
0470 module_platform_driver(wm831x_rtc_driver);
0471
0472 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
0473 MODULE_DESCRIPTION("RTC driver for the WM831x series PMICs");
0474 MODULE_LICENSE("GPL");
0475 MODULE_ALIAS("platform:wm831x-rtc");