drivers/rtc/rtc-tps65910.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * rtc-tps65910.c -- TPS65910 Real Time Clock interface
0004  *
0005  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
0006  * Author: Venu Byravarasu <vbyravarasu@nvidia.com>
0007  *
0008  * Based on original TI driver rtc-twl.c
0009  *   Copyright (C) 2007 MontaVista Software, Inc
0010  *   Author: Alexandre Rusev <source@mvista.com>
0011  */
0012
0013 #include <linux/kernel.h>
0014 #include <linux/errno.h>
0015 #include <linux/init.h>
0016 #include <linux/module.h>
0017 #include <linux/types.h>
0018 #include <linux/rtc.h>
0019 #include <linux/bcd.h>
0020 #include <linux/math64.h>
0021 #include <linux/property.h>
0022 #include <linux/platform_device.h>
0023 #include <linux/interrupt.h>
0024 #include <linux/mfd/tps65910.h>
0025
0026 struct tps65910_rtc {
0027     struct rtc_device   *rtc;
0028     int irq;
0029 };
0030
0031 /* Total number of RTC registers needed to set time*/
0032 #define NUM_TIME_REGS   (TPS65910_YEARS - TPS65910_SECONDS + 1)
0033
0034 /* Total number of RTC registers needed to set compensation registers */
0035 #define NUM_COMP_REGS   (TPS65910_RTC_COMP_MSB - TPS65910_RTC_COMP_LSB + 1)
0036
0037 /* Min and max values supported with 'offset' interface (swapped sign) */
0038 #define MIN_OFFSET  (-277761)
0039 #define MAX_OFFSET  (277778)
0040
0041 /* Number of ticks per hour */
0042 #define TICKS_PER_HOUR  (32768 * 3600)
0043
0044 /* Multiplier for ppb conversions */
0045 #define PPB_MULT    (1000000000LL)
0046
0047 static int tps65910_rtc_alarm_irq_enable(struct device *dev,
0048                      unsigned int enabled)
0049 {
0050     struct tps65910 *tps = dev_get_drvdata(dev->parent);
0051     u8 val = 0;
0052
0053     if (enabled)
0054         val = TPS65910_RTC_INTERRUPTS_IT_ALARM;
0055
0056     return regmap_write(tps->regmap, TPS65910_RTC_INTERRUPTS, val);
0057 }
0058
0059 /*
0060  * Gets current tps65910 RTC time and date parameters.
0061  *
0062  * The RTC's time/alarm representation is not what gmtime(3) requires
0063  * Linux to use:
0064  *
0065  *  - Months are 1..12 vs Linux 0-11
0066  *  - Years are 0..99 vs Linux 1900..N (we assume 21st century)
0067  */
0068 static int tps65910_rtc_read_time(struct device *dev, struct rtc_time *tm)
0069 {
0070     unsigned char rtc_data[NUM_TIME_REGS];
0071     struct tps65910 *tps = dev_get_drvdata(dev->parent);
0072     int ret;
0073
0074     /* Copy RTC counting registers to static registers or latches */
0075     ret = regmap_update_bits(tps->regmap, TPS65910_RTC_CTRL,
0076         TPS65910_RTC_CTRL_GET_TIME, TPS65910_RTC_CTRL_GET_TIME);
0077     if (ret < 0) {
0078         dev_err(dev, "RTC CTRL reg update failed with err:%d\n", ret);
0079         return ret;
0080     }
0081
0082     ret = regmap_bulk_read(tps->regmap, TPS65910_SECONDS, rtc_data,
0083         NUM_TIME_REGS);
0084     if (ret < 0) {
0085         dev_err(dev, "reading from RTC failed with err:%d\n", ret);
0086         return ret;
0087     }
0088
0089     tm->tm_sec = bcd2bin(rtc_data[0]);
0090     tm->tm_min = bcd2bin(rtc_data[1]);
0091     tm->tm_hour = bcd2bin(rtc_data[2]);
0092     tm->tm_mday = bcd2bin(rtc_data[3]);
0093     tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
0094     tm->tm_year = bcd2bin(rtc_data[5]) + 100;
0095
0096     return ret;
0097 }
0098
0099 static int tps65910_rtc_set_time(struct device *dev, struct rtc_time *tm)
0100 {
0101     unsigned char rtc_data[NUM_TIME_REGS];
0102     struct tps65910 *tps = dev_get_drvdata(dev->parent);
0103     int ret;
0104
0105     rtc_data[0] = bin2bcd(tm->tm_sec);
0106     rtc_data[1] = bin2bcd(tm->tm_min);
0107     rtc_data[2] = bin2bcd(tm->tm_hour);
0108     rtc_data[3] = bin2bcd(tm->tm_mday);
0109     rtc_data[4] = bin2bcd(tm->tm_mon + 1);
0110     rtc_data[5] = bin2bcd(tm->tm_year - 100);
0111
0112     /* Stop RTC while updating the RTC time registers */
0113     ret = regmap_update_bits(tps->regmap, TPS65910_RTC_CTRL,
0114         TPS65910_RTC_CTRL_STOP_RTC, 0);
0115     if (ret < 0) {
0116         dev_err(dev, "RTC stop failed with err:%d\n", ret);
0117         return ret;
0118     }
0119
0120     /* update all the time registers in one shot */
0121     ret = regmap_bulk_write(tps->regmap, TPS65910_SECONDS, rtc_data,
0122         NUM_TIME_REGS);
0123     if (ret < 0) {
0124         dev_err(dev, "rtc_set_time error %d\n", ret);
0125         return ret;
0126     }
0127
0128     /* Start back RTC */
0129     ret = regmap_update_bits(tps->regmap, TPS65910_RTC_CTRL,
0130         TPS65910_RTC_CTRL_STOP_RTC, 1);
0131     if (ret < 0)
0132         dev_err(dev, "RTC start failed with err:%d\n", ret);
0133
0134     return ret;
0135 }
0136
0137 /*
0138  * Gets current tps65910 RTC alarm time.
0139  */
0140 static int tps65910_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
0141 {
0142     unsigned char alarm_data[NUM_TIME_REGS];
0143     u32 int_val;
0144     struct tps65910 *tps = dev_get_drvdata(dev->parent);
0145     int ret;
0146
0147     ret = regmap_bulk_read(tps->regmap, TPS65910_ALARM_SECONDS, alarm_data,
0148         NUM_TIME_REGS);
0149     if (ret < 0) {
0150         dev_err(dev, "rtc_read_alarm error %d\n", ret);
0151         return ret;
0152     }
0153
0154     alm->time.tm_sec = bcd2bin(alarm_data[0]);
0155     alm->time.tm_min = bcd2bin(alarm_data[1]);
0156     alm->time.tm_hour = bcd2bin(alarm_data[2]);
0157     alm->time.tm_mday = bcd2bin(alarm_data[3]);
0158     alm->time.tm_mon = bcd2bin(alarm_data[4]) - 1;
0159     alm->time.tm_year = bcd2bin(alarm_data[5]) + 100;
0160
0161     ret = regmap_read(tps->regmap, TPS65910_RTC_INTERRUPTS, &int_val);
0162     if (ret < 0)
0163         return ret;
0164
0165     if (int_val & TPS65910_RTC_INTERRUPTS_IT_ALARM)
0166         alm->enabled = 1;
0167
0168     return ret;
0169 }
0170
0171 static int tps65910_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
0172 {
0173     unsigned char alarm_data[NUM_TIME_REGS];
0174     struct tps65910 *tps = dev_get_drvdata(dev->parent);
0175     int ret;
0176
0177     ret = tps65910_rtc_alarm_irq_enable(dev, 0);
0178     if (ret)
0179         return ret;
0180
0181     alarm_data[0] = bin2bcd(alm->time.tm_sec);
0182     alarm_data[1] = bin2bcd(alm->time.tm_min);
0183     alarm_data[2] = bin2bcd(alm->time.tm_hour);
0184     alarm_data[3] = bin2bcd(alm->time.tm_mday);
0185     alarm_data[4] = bin2bcd(alm->time.tm_mon + 1);
0186     alarm_data[5] = bin2bcd(alm->time.tm_year - 100);
0187
0188     /* update all the alarm registers in one shot */
0189     ret = regmap_bulk_write(tps->regmap, TPS65910_ALARM_SECONDS,
0190         alarm_data, NUM_TIME_REGS);
0191     if (ret) {
0192         dev_err(dev, "rtc_set_alarm error %d\n", ret);
0193         return ret;
0194     }
0195
0196     if (alm->enabled)
0197         ret = tps65910_rtc_alarm_irq_enable(dev, 1);
0198
0199     return ret;
0200 }
0201
0202 static int tps65910_rtc_set_calibration(struct device *dev, int calibration)
0203 {
0204     unsigned char comp_data[NUM_COMP_REGS];
0205     struct tps65910 *tps = dev_get_drvdata(dev->parent);
0206     s16 value;
0207     int ret;
0208
0209     /*
0210      * TPS65910 uses two's complement 16 bit value for compensation for RTC
0211      * crystal inaccuracies. One time every hour when seconds counter
0212      * increments from 0 to 1 compensation value will be added to internal
0213      * RTC counter value.
0214      *
0215      * Compensation value 0x7FFF is prohibited value.
0216      *
0217      * Valid range for compensation value: [-32768 .. 32766]
0218      */
0219     if ((calibration < -32768) || (calibration > 32766)) {
0220         dev_err(dev, "RTC calibration value out of range: %d\n",
0221             calibration);
0222         return -EINVAL;
0223     }
0224
0225     value = (s16)calibration;
0226
0227     comp_data[0] = (u16)value & 0xFF;
0228     comp_data[1] = ((u16)value >> 8) & 0xFF;
0229
0230     /* Update all the compensation registers in one shot */
0231     ret = regmap_bulk_write(tps->regmap, TPS65910_RTC_COMP_LSB,
0232         comp_data, NUM_COMP_REGS);
0233     if (ret < 0) {
0234         dev_err(dev, "rtc_set_calibration error: %d\n", ret);
0235         return ret;
0236     }
0237
0238     /* Enable automatic compensation */
0239     ret = regmap_update_bits(tps->regmap, TPS65910_RTC_CTRL,
0240         TPS65910_RTC_CTRL_AUTO_COMP, TPS65910_RTC_CTRL_AUTO_COMP);
0241     if (ret < 0)
0242         dev_err(dev, "auto_comp enable failed with error: %d\n", ret);
0243
0244     return ret;
0245 }
0246
0247 static int tps65910_rtc_get_calibration(struct device *dev, int *calibration)
0248 {
0249     unsigned char comp_data[NUM_COMP_REGS];
0250     struct tps65910 *tps = dev_get_drvdata(dev->parent);
0251     unsigned int ctrl;
0252     u16 value;
0253     int ret;
0254
0255     ret = regmap_read(tps->regmap, TPS65910_RTC_CTRL, &ctrl);
0256     if (ret < 0)
0257         return ret;
0258
0259     /* If automatic compensation is not enabled report back zero */
0260     if (!(ctrl & TPS65910_RTC_CTRL_AUTO_COMP)) {
0261         *calibration = 0;
0262         return 0;
0263     }
0264
0265     ret = regmap_bulk_read(tps->regmap, TPS65910_RTC_COMP_LSB, comp_data,
0266         NUM_COMP_REGS);
0267     if (ret < 0) {
0268         dev_err(dev, "rtc_get_calibration error: %d\n", ret);
0269         return ret;
0270     }
0271
0272     value = (u16)comp_data[0] | ((u16)comp_data[1] << 8);
0273
0274     *calibration = (s16)value;
0275
0276     return 0;
0277 }
0278
0279 static int tps65910_read_offset(struct device *dev, long *offset)
0280 {
0281     int calibration;
0282     s64 tmp;
0283     int ret;
0284
0285     ret = tps65910_rtc_get_calibration(dev, &calibration);
0286     if (ret < 0)
0287         return ret;
0288
0289     /* Convert from RTC calibration register format to ppb format */
0290     tmp = calibration * (s64)PPB_MULT;
0291     if (tmp < 0)
0292         tmp -= TICKS_PER_HOUR / 2LL;
0293     else
0294         tmp += TICKS_PER_HOUR / 2LL;
0295     tmp = div_s64(tmp, TICKS_PER_HOUR);
0296
0297     /* Offset value operates in negative way, so swap sign */
0298     *offset = (long)-tmp;
0299
0300     return 0;
0301 }
0302
0303 static int tps65910_set_offset(struct device *dev, long offset)
0304 {
0305     int calibration;
0306     s64 tmp;
0307     int ret;
0308
0309     /* Make sure offset value is within supported range */
0310     if (offset < MIN_OFFSET || offset > MAX_OFFSET)
0311         return -ERANGE;
0312
0313     /* Convert from ppb format to RTC calibration register format */
0314     tmp = offset * (s64)TICKS_PER_HOUR;
0315     if (tmp < 0)
0316         tmp -= PPB_MULT / 2LL;
0317     else
0318         tmp += PPB_MULT / 2LL;
0319     tmp = div_s64(tmp, PPB_MULT);
0320
0321     /* Offset value operates in negative way, so swap sign */
0322     calibration = (int)-tmp;
0323
0324     ret = tps65910_rtc_set_calibration(dev, calibration);
0325
0326     return ret;
0327 }
0328
0329 static irqreturn_t tps65910_rtc_interrupt(int irq, void *rtc)
0330 {
0331     struct device *dev = rtc;
0332     unsigned long events = 0;
0333     struct tps65910 *tps = dev_get_drvdata(dev->parent);
0334     struct tps65910_rtc *tps_rtc = dev_get_drvdata(dev);
0335     int ret;
0336     u32 rtc_reg;
0337
0338     ret = regmap_read(tps->regmap, TPS65910_RTC_STATUS, &rtc_reg);
0339     if (ret)
0340         return IRQ_NONE;
0341
0342     if (rtc_reg & TPS65910_RTC_STATUS_ALARM)
0343         events = RTC_IRQF | RTC_AF;
0344
0345     ret = regmap_write(tps->regmap, TPS65910_RTC_STATUS, rtc_reg);
0346     if (ret)
0347         return IRQ_NONE;
0348
0349     /* Notify RTC core on event */
0350     rtc_update_irq(tps_rtc->rtc, 1, events);
0351
0352     return IRQ_HANDLED;
0353 }
0354
0355 static const struct rtc_class_ops tps65910_rtc_ops = {
0356     .read_time  = tps65910_rtc_read_time,
0357     .set_time   = tps65910_rtc_set_time,
0358     .read_alarm = tps65910_rtc_read_alarm,
0359     .set_alarm  = tps65910_rtc_set_alarm,
0360     .alarm_irq_enable = tps65910_rtc_alarm_irq_enable,
0361     .read_offset    = tps65910_read_offset,
0362     .set_offset = tps65910_set_offset,
0363 };
0364
0365 static int tps65910_rtc_probe(struct platform_device *pdev)
0366 {
0367     struct tps65910 *tps65910 = NULL;
0368     struct tps65910_rtc *tps_rtc = NULL;
0369     int ret;
0370     int irq;
0371     u32 rtc_reg;
0372
0373     tps65910 = dev_get_drvdata(pdev->dev.parent);
0374
0375     tps_rtc = devm_kzalloc(&pdev->dev, sizeof(struct tps65910_rtc),
0376             GFP_KERNEL);
0377     if (!tps_rtc)
0378         return -ENOMEM;
0379
0380     tps_rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
0381     if (IS_ERR(tps_rtc->rtc))
0382         return PTR_ERR(tps_rtc->rtc);
0383
0384     /* Clear pending interrupts */
0385     ret = regmap_read(tps65910->regmap, TPS65910_RTC_STATUS, &rtc_reg);
0386     if (ret < 0)
0387         return ret;
0388
0389     ret = regmap_write(tps65910->regmap, TPS65910_RTC_STATUS, rtc_reg);
0390     if (ret < 0)
0391         return ret;
0392
0393     dev_dbg(&pdev->dev, "Enabling rtc-tps65910.\n");
0394
0395     /* Enable RTC digital power domain */
0396     ret = regmap_update_bits(tps65910->regmap, TPS65910_DEVCTRL,
0397         DEVCTRL_RTC_PWDN_MASK, 0 << DEVCTRL_RTC_PWDN_SHIFT);
0398     if (ret < 0)
0399         return ret;
0400
0401     rtc_reg = TPS65910_RTC_CTRL_STOP_RTC;
0402     ret = regmap_write(tps65910->regmap, TPS65910_RTC_CTRL, rtc_reg);
0403     if (ret < 0)
0404         return ret;
0405
0406     platform_set_drvdata(pdev, tps_rtc);
0407
0408     irq  = platform_get_irq(pdev, 0);
0409     if (irq <= 0) {
0410         dev_warn(&pdev->dev, "Wake up is not possible as irq = %d\n",
0411             irq);
0412         return -ENXIO;
0413     }
0414
0415     ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
0416         tps65910_rtc_interrupt, IRQF_TRIGGER_LOW,
0417         dev_name(&pdev->dev), &pdev->dev);
0418     if (ret < 0)
0419         irq = -1;
0420
0421     tps_rtc->irq = irq;
0422     if (irq != -1) {
0423         if (device_property_present(tps65910->dev, "wakeup-source"))
0424             device_init_wakeup(&pdev->dev, 1);
0425         else
0426             device_set_wakeup_capable(&pdev->dev, 1);
0427     } else {
0428         clear_bit(RTC_FEATURE_ALARM, tps_rtc->rtc->features);
0429     }
0430
0431     tps_rtc->rtc->ops = &tps65910_rtc_ops;
0432     tps_rtc->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
0433     tps_rtc->rtc->range_max = RTC_TIMESTAMP_END_2099;
0434
0435     return devm_rtc_register_device(tps_rtc->rtc);
0436 }
0437
0438 #ifdef CONFIG_PM_SLEEP
0439 static int tps65910_rtc_suspend(struct device *dev)
0440 {
0441     struct tps65910_rtc *tps_rtc = dev_get_drvdata(dev);
0442
0443     if (device_may_wakeup(dev))
0444         enable_irq_wake(tps_rtc->irq);
0445     return 0;
0446 }
0447
0448 static int tps65910_rtc_resume(struct device *dev)
0449 {
0450     struct tps65910_rtc *tps_rtc = dev_get_drvdata(dev);
0451
0452     if (device_may_wakeup(dev))
0453         disable_irq_wake(tps_rtc->irq);
0454     return 0;
0455 }
0456 #endif
0457
0458 static SIMPLE_DEV_PM_OPS(tps65910_rtc_pm_ops, tps65910_rtc_suspend,
0459             tps65910_rtc_resume);
0460
0461 static struct platform_driver tps65910_rtc_driver = {
0462     .probe      = tps65910_rtc_probe,
0463     .driver     = {
0464         .name   = "tps65910-rtc",
0465         .pm = &tps65910_rtc_pm_ops,
0466     },
0467 };
0468
0469 module_platform_driver(tps65910_rtc_driver);
0470 MODULE_ALIAS("platform:tps65910-rtc");
0471 MODULE_AUTHOR("Venu Byravarasu <vbyravarasu@nvidia.com>");
0472 MODULE_LICENSE("GPL");