drivers/rtc/rtc-tps6586x.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * rtc-tps6586x.c: RTC driver for TI PMIC TPS6586X
0004  *
0005  * Copyright (c) 2012, NVIDIA Corporation.
0006  *
0007  * Author: Laxman Dewangan <ldewangan@nvidia.com>
0008  */
0009
0010 #include <linux/device.h>
0011 #include <linux/err.h>
0012 #include <linux/init.h>
0013 #include <linux/irq.h>
0014 #include <linux/kernel.h>
0015 #include <linux/mfd/tps6586x.h>
0016 #include <linux/module.h>
0017 #include <linux/platform_device.h>
0018 #include <linux/pm_runtime.h>
0019 #include <linux/rtc.h>
0020 #include <linux/slab.h>
0021
0022 #define RTC_CTRL            0xc0
0023 #define POR_RESET_N         BIT(7)
0024 #define OSC_SRC_SEL         BIT(6)
0025 #define RTC_ENABLE          BIT(5)  /* enables alarm */
0026 #define RTC_BUF_ENABLE          BIT(4)  /* 32 KHz buffer enable */
0027 #define PRE_BYPASS          BIT(3)  /* 0=1KHz or 1=32KHz updates */
0028 #define CL_SEL_MASK         (BIT(2)|BIT(1))
0029 #define CL_SEL_POS          1
0030 #define RTC_ALARM1_HI           0xc1
0031 #define RTC_COUNT4          0xc6
0032
0033 /* start a PMU RTC access by reading the register prior to the RTC_COUNT4 */
0034 #define RTC_COUNT4_DUMMYREAD        0xc5
0035
0036 /*only 14-bits width in second*/
0037 #define ALM1_VALID_RANGE_IN_SEC     0x3FFF
0038
0039 #define TPS6586X_RTC_CL_SEL_1_5PF   0x0
0040 #define TPS6586X_RTC_CL_SEL_6_5PF   0x1
0041 #define TPS6586X_RTC_CL_SEL_7_5PF   0x2
0042 #define TPS6586X_RTC_CL_SEL_12_5PF  0x3
0043
0044 struct tps6586x_rtc {
0045     struct device       *dev;
0046     struct rtc_device   *rtc;
0047     int         irq;
0048     bool            irq_en;
0049 };
0050
0051 static inline struct device *to_tps6586x_dev(struct device *dev)
0052 {
0053     return dev->parent;
0054 }
0055
0056 static int tps6586x_rtc_read_time(struct device *dev, struct rtc_time *tm)
0057 {
0058     struct device *tps_dev = to_tps6586x_dev(dev);
0059     unsigned long long ticks = 0;
0060     time64_t seconds;
0061     u8 buff[6];
0062     int ret;
0063     int i;
0064
0065     ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD, sizeof(buff), buff);
0066     if (ret < 0) {
0067         dev_err(dev, "read counter failed with err %d\n", ret);
0068         return ret;
0069     }
0070
0071     for (i = 1; i < sizeof(buff); i++) {
0072         ticks <<= 8;
0073         ticks |= buff[i];
0074     }
0075
0076     seconds = ticks >> 10;
0077     rtc_time64_to_tm(seconds, tm);
0078
0079     return 0;
0080 }
0081
0082 static int tps6586x_rtc_set_time(struct device *dev, struct rtc_time *tm)
0083 {
0084     struct device *tps_dev = to_tps6586x_dev(dev);
0085     unsigned long long ticks;
0086     time64_t seconds;
0087     u8 buff[5];
0088     int ret;
0089
0090     seconds = rtc_tm_to_time64(tm);
0091
0092     ticks = (unsigned long long)seconds << 10;
0093     buff[0] = (ticks >> 32) & 0xff;
0094     buff[1] = (ticks >> 24) & 0xff;
0095     buff[2] = (ticks >> 16) & 0xff;
0096     buff[3] = (ticks >> 8) & 0xff;
0097     buff[4] = ticks & 0xff;
0098
0099     /* Disable RTC before changing time */
0100     ret = tps6586x_clr_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
0101     if (ret < 0) {
0102         dev_err(dev, "failed to clear RTC_ENABLE\n");
0103         return ret;
0104     }
0105
0106     ret = tps6586x_writes(tps_dev, RTC_COUNT4, sizeof(buff), buff);
0107     if (ret < 0) {
0108         dev_err(dev, "failed to program new time\n");
0109         return ret;
0110     }
0111
0112     /* Enable RTC */
0113     ret = tps6586x_set_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
0114     if (ret < 0) {
0115         dev_err(dev, "failed to set RTC_ENABLE\n");
0116         return ret;
0117     }
0118     return 0;
0119 }
0120
0121 static int tps6586x_rtc_alarm_irq_enable(struct device *dev,
0122              unsigned int enabled)
0123 {
0124     struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
0125
0126     if (enabled && !rtc->irq_en) {
0127         enable_irq(rtc->irq);
0128         rtc->irq_en = true;
0129     } else if (!enabled && rtc->irq_en)  {
0130         disable_irq(rtc->irq);
0131         rtc->irq_en = false;
0132     }
0133     return 0;
0134 }
0135
0136 static int tps6586x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0137 {
0138     struct device *tps_dev = to_tps6586x_dev(dev);
0139     time64_t seconds;
0140     unsigned long ticks;
0141     unsigned long rtc_current_time;
0142     unsigned long long rticks = 0;
0143     u8 buff[3];
0144     u8 rbuff[6];
0145     int ret;
0146     int i;
0147
0148     seconds = rtc_tm_to_time64(&alrm->time);
0149
0150     ret = tps6586x_rtc_alarm_irq_enable(dev, alrm->enabled);
0151     if (ret < 0) {
0152         dev_err(dev, "can't set alarm irq, err %d\n", ret);
0153         return ret;
0154     }
0155
0156     ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD,
0157             sizeof(rbuff), rbuff);
0158     if (ret < 0) {
0159         dev_err(dev, "read counter failed with err %d\n", ret);
0160         return ret;
0161     }
0162
0163     for (i = 1; i < sizeof(rbuff); i++) {
0164         rticks <<= 8;
0165         rticks |= rbuff[i];
0166     }
0167
0168     rtc_current_time = rticks >> 10;
0169     if ((seconds - rtc_current_time) > ALM1_VALID_RANGE_IN_SEC)
0170         seconds = rtc_current_time - 1;
0171
0172     ticks = (unsigned long long)seconds << 10;
0173     buff[0] = (ticks >> 16) & 0xff;
0174     buff[1] = (ticks >> 8) & 0xff;
0175     buff[2] = ticks & 0xff;
0176
0177     ret = tps6586x_writes(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
0178     if (ret)
0179         dev_err(dev, "programming alarm failed with err %d\n", ret);
0180
0181     return ret;
0182 }
0183
0184 static int tps6586x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0185 {
0186     struct device *tps_dev = to_tps6586x_dev(dev);
0187     unsigned long ticks;
0188     time64_t seconds;
0189     u8 buff[3];
0190     int ret;
0191
0192     ret = tps6586x_reads(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
0193     if (ret) {
0194         dev_err(dev, "read RTC_ALARM1_HI failed with err %d\n", ret);
0195         return ret;
0196     }
0197
0198     ticks = (buff[0] << 16) | (buff[1] << 8) | buff[2];
0199     seconds = ticks >> 10;
0200
0201     rtc_time64_to_tm(seconds, &alrm->time);
0202     return 0;
0203 }
0204
0205 static const struct rtc_class_ops tps6586x_rtc_ops = {
0206     .read_time  = tps6586x_rtc_read_time,
0207     .set_time   = tps6586x_rtc_set_time,
0208     .set_alarm  = tps6586x_rtc_set_alarm,
0209     .read_alarm = tps6586x_rtc_read_alarm,
0210     .alarm_irq_enable = tps6586x_rtc_alarm_irq_enable,
0211 };
0212
0213 static irqreturn_t tps6586x_rtc_irq(int irq, void *data)
0214 {
0215     struct tps6586x_rtc *rtc = data;
0216
0217     rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
0218     return IRQ_HANDLED;
0219 }
0220
0221 static int tps6586x_rtc_probe(struct platform_device *pdev)
0222 {
0223     struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
0224     struct tps6586x_rtc *rtc;
0225     int ret;
0226
0227     rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
0228     if (!rtc)
0229         return -ENOMEM;
0230
0231     rtc->dev = &pdev->dev;
0232     rtc->irq = platform_get_irq(pdev, 0);
0233
0234     /* 1 kHz tick mode, enable tick counting */
0235     ret = tps6586x_update(tps_dev, RTC_CTRL,
0236         RTC_ENABLE | OSC_SRC_SEL |
0237         ((TPS6586X_RTC_CL_SEL_1_5PF << CL_SEL_POS) & CL_SEL_MASK),
0238         RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
0239     if (ret < 0) {
0240         dev_err(&pdev->dev, "unable to start counter\n");
0241         return ret;
0242     }
0243
0244     device_init_wakeup(&pdev->dev, 1);
0245
0246     platform_set_drvdata(pdev, rtc);
0247     rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
0248     if (IS_ERR(rtc->rtc)) {
0249         ret = PTR_ERR(rtc->rtc);
0250         goto fail_rtc_register;
0251     }
0252
0253     rtc->rtc->ops = &tps6586x_rtc_ops;
0254     rtc->rtc->range_max = (1ULL << 30) - 1; /* 30-bit seconds */
0255     rtc->rtc->start_secs = mktime64(2009, 1, 1, 0, 0, 0);
0256     rtc->rtc->set_start_time = true;
0257
0258     irq_set_status_flags(rtc->irq, IRQ_NOAUTOEN);
0259
0260     ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
0261                 tps6586x_rtc_irq,
0262                 IRQF_ONESHOT,
0263                 dev_name(&pdev->dev), rtc);
0264     if (ret < 0) {
0265         dev_err(&pdev->dev, "request IRQ(%d) failed with ret %d\n",
0266                 rtc->irq, ret);
0267         goto fail_rtc_register;
0268     }
0269
0270     ret = devm_rtc_register_device(rtc->rtc);
0271     if (ret)
0272         goto fail_rtc_register;
0273
0274     return 0;
0275
0276 fail_rtc_register:
0277     tps6586x_update(tps_dev, RTC_CTRL, 0,
0278         RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
0279     return ret;
0280 };
0281
0282 static int tps6586x_rtc_remove(struct platform_device *pdev)
0283 {
0284     struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
0285
0286     tps6586x_update(tps_dev, RTC_CTRL, 0,
0287         RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
0288     return 0;
0289 }
0290
0291 #ifdef CONFIG_PM_SLEEP
0292 static int tps6586x_rtc_suspend(struct device *dev)
0293 {
0294     struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
0295
0296     if (device_may_wakeup(dev))
0297         enable_irq_wake(rtc->irq);
0298     return 0;
0299 }
0300
0301 static int tps6586x_rtc_resume(struct device *dev)
0302 {
0303     struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
0304
0305     if (device_may_wakeup(dev))
0306         disable_irq_wake(rtc->irq);
0307     return 0;
0308 }
0309 #endif
0310
0311 static SIMPLE_DEV_PM_OPS(tps6586x_pm_ops, tps6586x_rtc_suspend,
0312             tps6586x_rtc_resume);
0313
0314 static struct platform_driver tps6586x_rtc_driver = {
0315     .driver = {
0316         .name   = "tps6586x-rtc",
0317         .pm = &tps6586x_pm_ops,
0318     },
0319     .probe  = tps6586x_rtc_probe,
0320     .remove = tps6586x_rtc_remove,
0321 };
0322 module_platform_driver(tps6586x_rtc_driver);
0323
0324 MODULE_ALIAS("platform:tps6586x-rtc");
0325 MODULE_DESCRIPTION("TI TPS6586x RTC driver");
0326 MODULE_AUTHOR("Laxman dewangan <ldewangan@nvidia.com>");
0327 MODULE_LICENSE("GPL v2");