Back to home page

OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2017 Spreadtrum Communications Inc.
0004  *
0005  */
0006 
0007 #include <linux/bitops.h>
0008 #include <linux/delay.h>
0009 #include <linux/err.h>
0010 #include <linux/module.h>
0011 #include <linux/of.h>
0012 #include <linux/platform_device.h>
0013 #include <linux/regmap.h>
0014 #include <linux/rtc.h>
0015 
0016 #define SPRD_RTC_SEC_CNT_VALUE      0x0
0017 #define SPRD_RTC_MIN_CNT_VALUE      0x4
0018 #define SPRD_RTC_HOUR_CNT_VALUE     0x8
0019 #define SPRD_RTC_DAY_CNT_VALUE      0xc
0020 #define SPRD_RTC_SEC_CNT_UPD        0x10
0021 #define SPRD_RTC_MIN_CNT_UPD        0x14
0022 #define SPRD_RTC_HOUR_CNT_UPD       0x18
0023 #define SPRD_RTC_DAY_CNT_UPD        0x1c
0024 #define SPRD_RTC_SEC_ALM_UPD        0x20
0025 #define SPRD_RTC_MIN_ALM_UPD        0x24
0026 #define SPRD_RTC_HOUR_ALM_UPD       0x28
0027 #define SPRD_RTC_DAY_ALM_UPD        0x2c
0028 #define SPRD_RTC_INT_EN         0x30
0029 #define SPRD_RTC_INT_RAW_STS        0x34
0030 #define SPRD_RTC_INT_CLR        0x38
0031 #define SPRD_RTC_INT_MASK_STS       0x3C
0032 #define SPRD_RTC_SEC_ALM_VALUE      0x40
0033 #define SPRD_RTC_MIN_ALM_VALUE      0x44
0034 #define SPRD_RTC_HOUR_ALM_VALUE     0x48
0035 #define SPRD_RTC_DAY_ALM_VALUE      0x4c
0036 #define SPRD_RTC_SPG_VALUE      0x50
0037 #define SPRD_RTC_SPG_UPD        0x54
0038 #define SPRD_RTC_PWR_CTRL       0x58
0039 #define SPRD_RTC_PWR_STS        0x5c
0040 #define SPRD_RTC_SEC_AUXALM_UPD     0x60
0041 #define SPRD_RTC_MIN_AUXALM_UPD     0x64
0042 #define SPRD_RTC_HOUR_AUXALM_UPD    0x68
0043 #define SPRD_RTC_DAY_AUXALM_UPD     0x6c
0044 
0045 /* BIT & MASK definition for SPRD_RTC_INT_* registers */
0046 #define SPRD_RTC_SEC_EN         BIT(0)
0047 #define SPRD_RTC_MIN_EN         BIT(1)
0048 #define SPRD_RTC_HOUR_EN        BIT(2)
0049 #define SPRD_RTC_DAY_EN         BIT(3)
0050 #define SPRD_RTC_ALARM_EN       BIT(4)
0051 #define SPRD_RTC_HRS_FORMAT_EN      BIT(5)
0052 #define SPRD_RTC_AUXALM_EN      BIT(6)
0053 #define SPRD_RTC_SPG_UPD_EN     BIT(7)
0054 #define SPRD_RTC_SEC_UPD_EN     BIT(8)
0055 #define SPRD_RTC_MIN_UPD_EN     BIT(9)
0056 #define SPRD_RTC_HOUR_UPD_EN        BIT(10)
0057 #define SPRD_RTC_DAY_UPD_EN     BIT(11)
0058 #define SPRD_RTC_ALMSEC_UPD_EN      BIT(12)
0059 #define SPRD_RTC_ALMMIN_UPD_EN      BIT(13)
0060 #define SPRD_RTC_ALMHOUR_UPD_EN     BIT(14)
0061 #define SPRD_RTC_ALMDAY_UPD_EN      BIT(15)
0062 #define SPRD_RTC_INT_MASK       GENMASK(15, 0)
0063 
0064 #define SPRD_RTC_TIME_INT_MASK              \
0065     (SPRD_RTC_SEC_UPD_EN | SPRD_RTC_MIN_UPD_EN |    \
0066      SPRD_RTC_HOUR_UPD_EN | SPRD_RTC_DAY_UPD_EN)
0067 
0068 #define SPRD_RTC_ALMTIME_INT_MASK               \
0069     (SPRD_RTC_ALMSEC_UPD_EN | SPRD_RTC_ALMMIN_UPD_EN |  \
0070      SPRD_RTC_ALMHOUR_UPD_EN | SPRD_RTC_ALMDAY_UPD_EN)
0071 
0072 #define SPRD_RTC_ALM_INT_MASK           \
0073     (SPRD_RTC_SEC_EN | SPRD_RTC_MIN_EN |    \
0074      SPRD_RTC_HOUR_EN | SPRD_RTC_DAY_EN |   \
0075      SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN)
0076 
0077 /* second/minute/hour/day values mask definition */
0078 #define SPRD_RTC_SEC_MASK       GENMASK(5, 0)
0079 #define SPRD_RTC_MIN_MASK       GENMASK(5, 0)
0080 #define SPRD_RTC_HOUR_MASK      GENMASK(4, 0)
0081 #define SPRD_RTC_DAY_MASK       GENMASK(15, 0)
0082 
0083 /* alarm lock definition for SPRD_RTC_SPG_UPD register */
0084 #define SPRD_RTC_ALMLOCK_MASK       GENMASK(7, 0)
0085 #define SPRD_RTC_ALM_UNLOCK     0xa5
0086 #define SPRD_RTC_ALM_LOCK       (~SPRD_RTC_ALM_UNLOCK & \
0087                      SPRD_RTC_ALMLOCK_MASK)
0088 
0089 /* SPG values definition for SPRD_RTC_SPG_UPD register */
0090 #define SPRD_RTC_POWEROFF_ALM_FLAG  BIT(8)
0091 
0092 /* power control/status definition */
0093 #define SPRD_RTC_POWER_RESET_VALUE  0x96
0094 #define SPRD_RTC_POWER_STS_CLEAR    GENMASK(7, 0)
0095 #define SPRD_RTC_POWER_STS_SHIFT    8
0096 #define SPRD_RTC_POWER_STS_VALID    \
0097     (~SPRD_RTC_POWER_RESET_VALUE << SPRD_RTC_POWER_STS_SHIFT)
0098 
0099 /* timeout of synchronizing time and alarm registers (us) */
0100 #define SPRD_RTC_POLL_TIMEOUT       200000
0101 #define SPRD_RTC_POLL_DELAY_US      20000
0102 
0103 struct sprd_rtc {
0104     struct rtc_device   *rtc;
0105     struct regmap       *regmap;
0106     struct device       *dev;
0107     u32         base;
0108     int         irq;
0109     bool            valid;
0110 };
0111 
0112 /*
0113  * The Spreadtrum RTC controller has 3 groups registers, including time, normal
0114  * alarm and auxiliary alarm. The time group registers are used to set RTC time,
0115  * the normal alarm registers are used to set normal alarm, and the auxiliary
0116  * alarm registers are used to set auxiliary alarm. Both alarm event and
0117  * auxiliary alarm event can wake up system from deep sleep, but only alarm
0118  * event can power up system from power down status.
0119  */
0120 enum sprd_rtc_reg_types {
0121     SPRD_RTC_TIME,
0122     SPRD_RTC_ALARM,
0123     SPRD_RTC_AUX_ALARM,
0124 };
0125 
0126 static int sprd_rtc_clear_alarm_ints(struct sprd_rtc *rtc)
0127 {
0128     return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR,
0129                 SPRD_RTC_ALM_INT_MASK);
0130 }
0131 
0132 static int sprd_rtc_lock_alarm(struct sprd_rtc *rtc, bool lock)
0133 {
0134     int ret;
0135     u32 val;
0136 
0137     ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_SPG_VALUE, &val);
0138     if (ret)
0139         return ret;
0140 
0141     val &= ~SPRD_RTC_ALMLOCK_MASK;
0142     if (lock)
0143         val |= SPRD_RTC_ALM_LOCK;
0144     else
0145         val |= SPRD_RTC_ALM_UNLOCK | SPRD_RTC_POWEROFF_ALM_FLAG;
0146 
0147     ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_SPG_UPD, val);
0148     if (ret)
0149         return ret;
0150 
0151     /* wait until the SPG value is updated successfully */
0152     ret = regmap_read_poll_timeout(rtc->regmap,
0153                        rtc->base + SPRD_RTC_INT_RAW_STS, val,
0154                        (val & SPRD_RTC_SPG_UPD_EN),
0155                        SPRD_RTC_POLL_DELAY_US,
0156                        SPRD_RTC_POLL_TIMEOUT);
0157     if (ret) {
0158         dev_err(rtc->dev, "failed to update SPG value:%d\n", ret);
0159         return ret;
0160     }
0161 
0162     return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR,
0163                 SPRD_RTC_SPG_UPD_EN);
0164 }
0165 
0166 static int sprd_rtc_get_secs(struct sprd_rtc *rtc, enum sprd_rtc_reg_types type,
0167                  time64_t *secs)
0168 {
0169     u32 sec_reg, min_reg, hour_reg, day_reg;
0170     u32 val, sec, min, hour, day;
0171     int ret;
0172 
0173     switch (type) {
0174     case SPRD_RTC_TIME:
0175         sec_reg = SPRD_RTC_SEC_CNT_VALUE;
0176         min_reg = SPRD_RTC_MIN_CNT_VALUE;
0177         hour_reg = SPRD_RTC_HOUR_CNT_VALUE;
0178         day_reg = SPRD_RTC_DAY_CNT_VALUE;
0179         break;
0180     case SPRD_RTC_ALARM:
0181         sec_reg = SPRD_RTC_SEC_ALM_VALUE;
0182         min_reg = SPRD_RTC_MIN_ALM_VALUE;
0183         hour_reg = SPRD_RTC_HOUR_ALM_VALUE;
0184         day_reg = SPRD_RTC_DAY_ALM_VALUE;
0185         break;
0186     case SPRD_RTC_AUX_ALARM:
0187         sec_reg = SPRD_RTC_SEC_AUXALM_UPD;
0188         min_reg = SPRD_RTC_MIN_AUXALM_UPD;
0189         hour_reg = SPRD_RTC_HOUR_AUXALM_UPD;
0190         day_reg = SPRD_RTC_DAY_AUXALM_UPD;
0191         break;
0192     default:
0193         return -EINVAL;
0194     }
0195 
0196     ret = regmap_read(rtc->regmap, rtc->base + sec_reg, &val);
0197     if (ret)
0198         return ret;
0199 
0200     sec = val & SPRD_RTC_SEC_MASK;
0201 
0202     ret = regmap_read(rtc->regmap, rtc->base + min_reg, &val);
0203     if (ret)
0204         return ret;
0205 
0206     min = val & SPRD_RTC_MIN_MASK;
0207 
0208     ret = regmap_read(rtc->regmap, rtc->base + hour_reg, &val);
0209     if (ret)
0210         return ret;
0211 
0212     hour = val & SPRD_RTC_HOUR_MASK;
0213 
0214     ret = regmap_read(rtc->regmap, rtc->base + day_reg, &val);
0215     if (ret)
0216         return ret;
0217 
0218     day = val & SPRD_RTC_DAY_MASK;
0219     *secs = (((time64_t)(day * 24) + hour) * 60 + min) * 60 + sec;
0220     return 0;
0221 }
0222 
0223 static int sprd_rtc_set_secs(struct sprd_rtc *rtc, enum sprd_rtc_reg_types type,
0224                  time64_t secs)
0225 {
0226     u32 sec_reg, min_reg, hour_reg, day_reg, sts_mask;
0227     u32 sec, min, hour, day, val;
0228     int ret, rem;
0229 
0230     /* convert seconds to RTC time format */
0231     day = div_s64_rem(secs, 86400, &rem);
0232     hour = rem / 3600;
0233     rem -= hour * 3600;
0234     min = rem / 60;
0235     sec = rem - min * 60;
0236 
0237     switch (type) {
0238     case SPRD_RTC_TIME:
0239         sec_reg = SPRD_RTC_SEC_CNT_UPD;
0240         min_reg = SPRD_RTC_MIN_CNT_UPD;
0241         hour_reg = SPRD_RTC_HOUR_CNT_UPD;
0242         day_reg = SPRD_RTC_DAY_CNT_UPD;
0243         sts_mask = SPRD_RTC_TIME_INT_MASK;
0244         break;
0245     case SPRD_RTC_ALARM:
0246         sec_reg = SPRD_RTC_SEC_ALM_UPD;
0247         min_reg = SPRD_RTC_MIN_ALM_UPD;
0248         hour_reg = SPRD_RTC_HOUR_ALM_UPD;
0249         day_reg = SPRD_RTC_DAY_ALM_UPD;
0250         sts_mask = SPRD_RTC_ALMTIME_INT_MASK;
0251         break;
0252     case SPRD_RTC_AUX_ALARM:
0253         sec_reg = SPRD_RTC_SEC_AUXALM_UPD;
0254         min_reg = SPRD_RTC_MIN_AUXALM_UPD;
0255         hour_reg = SPRD_RTC_HOUR_AUXALM_UPD;
0256         day_reg = SPRD_RTC_DAY_AUXALM_UPD;
0257         sts_mask = 0;
0258         break;
0259     default:
0260         return -EINVAL;
0261     }
0262 
0263     ret = regmap_write(rtc->regmap, rtc->base + sec_reg, sec);
0264     if (ret)
0265         return ret;
0266 
0267     ret = regmap_write(rtc->regmap, rtc->base + min_reg, min);
0268     if (ret)
0269         return ret;
0270 
0271     ret = regmap_write(rtc->regmap, rtc->base + hour_reg, hour);
0272     if (ret)
0273         return ret;
0274 
0275     ret = regmap_write(rtc->regmap, rtc->base + day_reg, day);
0276     if (ret)
0277         return ret;
0278 
0279     if (type == SPRD_RTC_AUX_ALARM)
0280         return 0;
0281 
0282     /*
0283      * Since the time and normal alarm registers are put in always-power-on
0284      * region supplied by VDDRTC, then these registers changing time will
0285      * be very long, about 125ms. Thus here we should wait until all
0286      * values are updated successfully.
0287      */
0288     ret = regmap_read_poll_timeout(rtc->regmap,
0289                        rtc->base + SPRD_RTC_INT_RAW_STS, val,
0290                        ((val & sts_mask) == sts_mask),
0291                        SPRD_RTC_POLL_DELAY_US,
0292                        SPRD_RTC_POLL_TIMEOUT);
0293     if (ret < 0) {
0294         dev_err(rtc->dev, "set time/alarm values timeout\n");
0295         return ret;
0296     }
0297 
0298     return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR,
0299                 sts_mask);
0300 }
0301 
0302 static int sprd_rtc_set_aux_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0303 {
0304     struct sprd_rtc *rtc = dev_get_drvdata(dev);
0305     time64_t secs = rtc_tm_to_time64(&alrm->time);
0306     int ret;
0307 
0308     /* clear the auxiliary alarm interrupt status */
0309     ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR,
0310                SPRD_RTC_AUXALM_EN);
0311     if (ret)
0312         return ret;
0313 
0314     ret = sprd_rtc_set_secs(rtc, SPRD_RTC_AUX_ALARM, secs);
0315     if (ret)
0316         return ret;
0317 
0318     if (alrm->enabled) {
0319         ret = regmap_update_bits(rtc->regmap,
0320                      rtc->base + SPRD_RTC_INT_EN,
0321                      SPRD_RTC_AUXALM_EN,
0322                      SPRD_RTC_AUXALM_EN);
0323     } else {
0324         ret = regmap_update_bits(rtc->regmap,
0325                      rtc->base + SPRD_RTC_INT_EN,
0326                      SPRD_RTC_AUXALM_EN, 0);
0327     }
0328 
0329     return ret;
0330 }
0331 
0332 static int sprd_rtc_read_time(struct device *dev, struct rtc_time *tm)
0333 {
0334     struct sprd_rtc *rtc = dev_get_drvdata(dev);
0335     time64_t secs;
0336     int ret;
0337 
0338     if (!rtc->valid) {
0339         dev_warn(dev, "RTC values are invalid\n");
0340         return -EINVAL;
0341     }
0342 
0343     ret = sprd_rtc_get_secs(rtc, SPRD_RTC_TIME, &secs);
0344     if (ret)
0345         return ret;
0346 
0347     rtc_time64_to_tm(secs, tm);
0348     return 0;
0349 }
0350 
0351 static int sprd_rtc_set_time(struct device *dev, struct rtc_time *tm)
0352 {
0353     struct sprd_rtc *rtc = dev_get_drvdata(dev);
0354     time64_t secs = rtc_tm_to_time64(tm);
0355     int ret;
0356 
0357     ret = sprd_rtc_set_secs(rtc, SPRD_RTC_TIME, secs);
0358     if (ret)
0359         return ret;
0360 
0361     if (!rtc->valid) {
0362         /* Clear RTC power status firstly */
0363         ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_PWR_CTRL,
0364                    SPRD_RTC_POWER_STS_CLEAR);
0365         if (ret)
0366             return ret;
0367 
0368         /*
0369          * Set RTC power status to indicate now RTC has valid time
0370          * values.
0371          */
0372         ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_PWR_CTRL,
0373                    SPRD_RTC_POWER_STS_VALID);
0374         if (ret)
0375             return ret;
0376 
0377         rtc->valid = true;
0378     }
0379 
0380     return 0;
0381 }
0382 
0383 static int sprd_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0384 {
0385     struct sprd_rtc *rtc = dev_get_drvdata(dev);
0386     time64_t secs;
0387     int ret;
0388     u32 val;
0389 
0390     /*
0391      * The RTC core checks to see if there is an alarm already set in RTC
0392      * hardware, and we always read the normal alarm at this time.
0393      */
0394     ret = sprd_rtc_get_secs(rtc, SPRD_RTC_ALARM, &secs);
0395     if (ret)
0396         return ret;
0397 
0398     rtc_time64_to_tm(secs, &alrm->time);
0399 
0400     ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_INT_EN, &val);
0401     if (ret)
0402         return ret;
0403 
0404     alrm->enabled = !!(val & SPRD_RTC_ALARM_EN);
0405 
0406     ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_INT_RAW_STS, &val);
0407     if (ret)
0408         return ret;
0409 
0410     alrm->pending = !!(val & SPRD_RTC_ALARM_EN);
0411     return 0;
0412 }
0413 
0414 static int sprd_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0415 {
0416     struct sprd_rtc *rtc = dev_get_drvdata(dev);
0417     time64_t secs = rtc_tm_to_time64(&alrm->time);
0418     struct rtc_time aie_time =
0419         rtc_ktime_to_tm(rtc->rtc->aie_timer.node.expires);
0420     int ret;
0421 
0422     /*
0423      * We have 2 groups alarms: normal alarm and auxiliary alarm. Since
0424      * both normal alarm event and auxiliary alarm event can wake up system
0425      * from deep sleep, but only alarm event can power up system from power
0426      * down status. Moreover we do not need to poll about 125ms when
0427      * updating auxiliary alarm registers. Thus we usually set auxiliary
0428      * alarm when wake up system from deep sleep, and for other scenarios,
0429      * we should set normal alarm with polling status.
0430      *
0431      * So here we check if the alarm time is set by aie_timer, if yes, we
0432      * should set normal alarm, if not, we should set auxiliary alarm which
0433      * means it is just a wake event.
0434      */
0435     if (!rtc->rtc->aie_timer.enabled || rtc_tm_sub(&aie_time, &alrm->time))
0436         return sprd_rtc_set_aux_alarm(dev, alrm);
0437 
0438     /* clear the alarm interrupt status firstly */
0439     ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR,
0440                SPRD_RTC_ALARM_EN);
0441     if (ret)
0442         return ret;
0443 
0444     ret = sprd_rtc_set_secs(rtc, SPRD_RTC_ALARM, secs);
0445     if (ret)
0446         return ret;
0447 
0448     if (alrm->enabled) {
0449         ret = regmap_update_bits(rtc->regmap,
0450                      rtc->base + SPRD_RTC_INT_EN,
0451                      SPRD_RTC_ALARM_EN,
0452                      SPRD_RTC_ALARM_EN);
0453         if (ret)
0454             return ret;
0455 
0456         /* unlock the alarm to enable the alarm function. */
0457         ret = sprd_rtc_lock_alarm(rtc, false);
0458     } else {
0459         regmap_update_bits(rtc->regmap,
0460                    rtc->base + SPRD_RTC_INT_EN,
0461                    SPRD_RTC_ALARM_EN, 0);
0462 
0463         /*
0464          * Lock the alarm function in case fake alarm event will power
0465          * up systems.
0466          */
0467         ret = sprd_rtc_lock_alarm(rtc, true);
0468     }
0469 
0470     return ret;
0471 }
0472 
0473 static int sprd_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
0474 {
0475     struct sprd_rtc *rtc = dev_get_drvdata(dev);
0476     int ret;
0477 
0478     if (enabled) {
0479         ret = regmap_update_bits(rtc->regmap,
0480                      rtc->base + SPRD_RTC_INT_EN,
0481                      SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN,
0482                      SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN);
0483         if (ret)
0484             return ret;
0485 
0486         ret = sprd_rtc_lock_alarm(rtc, false);
0487     } else {
0488         regmap_update_bits(rtc->regmap, rtc->base + SPRD_RTC_INT_EN,
0489                    SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN, 0);
0490 
0491         ret = sprd_rtc_lock_alarm(rtc, true);
0492     }
0493 
0494     return ret;
0495 }
0496 
0497 static const struct rtc_class_ops sprd_rtc_ops = {
0498     .read_time = sprd_rtc_read_time,
0499     .set_time = sprd_rtc_set_time,
0500     .read_alarm = sprd_rtc_read_alarm,
0501     .set_alarm = sprd_rtc_set_alarm,
0502     .alarm_irq_enable = sprd_rtc_alarm_irq_enable,
0503 };
0504 
0505 static irqreturn_t sprd_rtc_handler(int irq, void *dev_id)
0506 {
0507     struct sprd_rtc *rtc = dev_id;
0508     int ret;
0509 
0510     ret = sprd_rtc_clear_alarm_ints(rtc);
0511     if (ret)
0512         return IRQ_RETVAL(ret);
0513 
0514     rtc_update_irq(rtc->rtc, 1, RTC_AF | RTC_IRQF);
0515     return IRQ_HANDLED;
0516 }
0517 
0518 static int sprd_rtc_check_power_down(struct sprd_rtc *rtc)
0519 {
0520     u32 val;
0521     int ret;
0522 
0523     ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_PWR_STS, &val);
0524     if (ret)
0525         return ret;
0526 
0527     /*
0528      * If the RTC power status value is SPRD_RTC_POWER_RESET_VALUE, which
0529      * means the RTC has been powered down, so the RTC time values are
0530      * invalid.
0531      */
0532     rtc->valid = val != SPRD_RTC_POWER_RESET_VALUE;
0533     return 0;
0534 }
0535 
0536 static int sprd_rtc_check_alarm_int(struct sprd_rtc *rtc)
0537 {
0538     u32 val;
0539     int ret;
0540 
0541     ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_SPG_VALUE, &val);
0542     if (ret)
0543         return ret;
0544 
0545     /*
0546      * The SPRD_RTC_INT_EN register is not put in always-power-on region
0547      * supplied by VDDRTC, so we should check if we need enable the alarm
0548      * interrupt when system booting.
0549      *
0550      * If we have set SPRD_RTC_POWEROFF_ALM_FLAG which is saved in
0551      * always-power-on region, that means we have set one alarm last time,
0552      * so we should enable the alarm interrupt to help RTC core to see if
0553      * there is an alarm already set in RTC hardware.
0554      */
0555     if (!(val & SPRD_RTC_POWEROFF_ALM_FLAG))
0556         return 0;
0557 
0558     return regmap_update_bits(rtc->regmap, rtc->base + SPRD_RTC_INT_EN,
0559                   SPRD_RTC_ALARM_EN, SPRD_RTC_ALARM_EN);
0560 }
0561 
0562 static int sprd_rtc_probe(struct platform_device *pdev)
0563 {
0564     struct device_node *node = pdev->dev.of_node;
0565     struct sprd_rtc *rtc;
0566     int ret;
0567 
0568     rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
0569     if (!rtc)
0570         return -ENOMEM;
0571 
0572     rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL);
0573     if (!rtc->regmap)
0574         return -ENODEV;
0575 
0576     ret = of_property_read_u32(node, "reg", &rtc->base);
0577     if (ret) {
0578         dev_err(&pdev->dev, "failed to get RTC base address\n");
0579         return ret;
0580     }
0581 
0582     rtc->irq = platform_get_irq(pdev, 0);
0583     if (rtc->irq < 0)
0584         return rtc->irq;
0585 
0586     rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
0587     if (IS_ERR(rtc->rtc))
0588         return PTR_ERR(rtc->rtc);
0589 
0590     rtc->dev = &pdev->dev;
0591     platform_set_drvdata(pdev, rtc);
0592 
0593     /* check if we need set the alarm interrupt */
0594     ret = sprd_rtc_check_alarm_int(rtc);
0595     if (ret) {
0596         dev_err(&pdev->dev, "failed to check RTC alarm interrupt\n");
0597         return ret;
0598     }
0599 
0600     /* check if RTC time values are valid */
0601     ret = sprd_rtc_check_power_down(rtc);
0602     if (ret) {
0603         dev_err(&pdev->dev, "failed to check RTC time values\n");
0604         return ret;
0605     }
0606 
0607     ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
0608                     sprd_rtc_handler,
0609                     IRQF_ONESHOT | IRQF_EARLY_RESUME,
0610                     pdev->name, rtc);
0611     if (ret < 0) {
0612         dev_err(&pdev->dev, "failed to request RTC irq\n");
0613         return ret;
0614     }
0615 
0616     device_init_wakeup(&pdev->dev, 1);
0617 
0618     rtc->rtc->ops = &sprd_rtc_ops;
0619     rtc->rtc->range_min = 0;
0620     rtc->rtc->range_max = 5662310399LL;
0621     ret = devm_rtc_register_device(rtc->rtc);
0622     if (ret) {
0623         device_init_wakeup(&pdev->dev, 0);
0624         return ret;
0625     }
0626 
0627     return 0;
0628 }
0629 
0630 static const struct of_device_id sprd_rtc_of_match[] = {
0631     { .compatible = "sprd,sc2731-rtc", },
0632     { },
0633 };
0634 MODULE_DEVICE_TABLE(of, sprd_rtc_of_match);
0635 
0636 static struct platform_driver sprd_rtc_driver = {
0637     .driver = {
0638         .name = "sprd-rtc",
0639         .of_match_table = sprd_rtc_of_match,
0640     },
0641     .probe  = sprd_rtc_probe,
0642 };
0643 module_platform_driver(sprd_rtc_driver);
0644 
0645 MODULE_LICENSE("GPL v2");
0646 MODULE_DESCRIPTION("Spreadtrum RTC Device Driver");
0647 MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>");
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!