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0011 #include <linux/clk-provider.h>
0012 #include <linux/bcd.h>
0013 #include <linux/bitfield.h>
0014 #include <linux/bitops.h>
0015 #include <linux/i2c.h>
0016 #include <linux/interrupt.h>
0017 #include <linux/kernel.h>
0018 #include <linux/log2.h>
0019 #include <linux/module.h>
0020 #include <linux/of_device.h>
0021 #include <linux/regmap.h>
0022 #include <linux/rtc.h>
0023
0024 #define RV3028_SEC 0x00
0025 #define RV3028_MIN 0x01
0026 #define RV3028_HOUR 0x02
0027 #define RV3028_WDAY 0x03
0028 #define RV3028_DAY 0x04
0029 #define RV3028_MONTH 0x05
0030 #define RV3028_YEAR 0x06
0031 #define RV3028_ALARM_MIN 0x07
0032 #define RV3028_ALARM_HOUR 0x08
0033 #define RV3028_ALARM_DAY 0x09
0034 #define RV3028_STATUS 0x0E
0035 #define RV3028_CTRL1 0x0F
0036 #define RV3028_CTRL2 0x10
0037 #define RV3028_EVT_CTRL 0x13
0038 #define RV3028_TS_COUNT 0x14
0039 #define RV3028_TS_SEC 0x15
0040 #define RV3028_RAM1 0x1F
0041 #define RV3028_EEPROM_ADDR 0x25
0042 #define RV3028_EEPROM_DATA 0x26
0043 #define RV3028_EEPROM_CMD 0x27
0044 #define RV3028_CLKOUT 0x35
0045 #define RV3028_OFFSET 0x36
0046 #define RV3028_BACKUP 0x37
0047
0048 #define RV3028_STATUS_PORF BIT(0)
0049 #define RV3028_STATUS_EVF BIT(1)
0050 #define RV3028_STATUS_AF BIT(2)
0051 #define RV3028_STATUS_TF BIT(3)
0052 #define RV3028_STATUS_UF BIT(4)
0053 #define RV3028_STATUS_BSF BIT(5)
0054 #define RV3028_STATUS_CLKF BIT(6)
0055 #define RV3028_STATUS_EEBUSY BIT(7)
0056
0057 #define RV3028_CLKOUT_FD_MASK GENMASK(2, 0)
0058 #define RV3028_CLKOUT_PORIE BIT(3)
0059 #define RV3028_CLKOUT_CLKSY BIT(6)
0060 #define RV3028_CLKOUT_CLKOE BIT(7)
0061
0062 #define RV3028_CTRL1_EERD BIT(3)
0063 #define RV3028_CTRL1_WADA BIT(5)
0064
0065 #define RV3028_CTRL2_RESET BIT(0)
0066 #define RV3028_CTRL2_12_24 BIT(1)
0067 #define RV3028_CTRL2_EIE BIT(2)
0068 #define RV3028_CTRL2_AIE BIT(3)
0069 #define RV3028_CTRL2_TIE BIT(4)
0070 #define RV3028_CTRL2_UIE BIT(5)
0071 #define RV3028_CTRL2_TSE BIT(7)
0072
0073 #define RV3028_EVT_CTRL_TSR BIT(2)
0074
0075 #define RV3028_EEPROM_CMD_UPDATE 0x11
0076 #define RV3028_EEPROM_CMD_WRITE 0x21
0077 #define RV3028_EEPROM_CMD_READ 0x22
0078
0079 #define RV3028_EEBUSY_POLL 10000
0080 #define RV3028_EEBUSY_TIMEOUT 100000
0081
0082 #define RV3028_BACKUP_TCE BIT(5)
0083 #define RV3028_BACKUP_TCR_MASK GENMASK(1,0)
0084 #define RV3028_BACKUP_BSM GENMASK(3,2)
0085
0086 #define RV3028_BACKUP_BSM_DSM 0x1
0087 #define RV3028_BACKUP_BSM_LSM 0x3
0088
0089 #define OFFSET_STEP_PPT 953674
0090
0091 enum rv3028_type {
0092 rv_3028,
0093 };
0094
0095 struct rv3028_data {
0096 struct regmap *regmap;
0097 struct rtc_device *rtc;
0098 enum rv3028_type type;
0099 #ifdef CONFIG_COMMON_CLK
0100 struct clk_hw clkout_hw;
0101 #endif
0102 };
0103
0104 static u16 rv3028_trickle_resistors[] = {3000, 5000, 9000, 15000};
0105
0106 static ssize_t timestamp0_store(struct device *dev,
0107 struct device_attribute *attr,
0108 const char *buf, size_t count)
0109 {
0110 struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
0111
0112 regmap_update_bits(rv3028->regmap, RV3028_EVT_CTRL, RV3028_EVT_CTRL_TSR,
0113 RV3028_EVT_CTRL_TSR);
0114
0115 return count;
0116 };
0117
0118 static ssize_t timestamp0_show(struct device *dev,
0119 struct device_attribute *attr, char *buf)
0120 {
0121 struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
0122 struct rtc_time tm;
0123 int ret, count;
0124 u8 date[6];
0125
0126 ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count);
0127 if (ret)
0128 return ret;
0129
0130 if (!count)
0131 return 0;
0132
0133 ret = regmap_bulk_read(rv3028->regmap, RV3028_TS_SEC, date,
0134 sizeof(date));
0135 if (ret)
0136 return ret;
0137
0138 tm.tm_sec = bcd2bin(date[0]);
0139 tm.tm_min = bcd2bin(date[1]);
0140 tm.tm_hour = bcd2bin(date[2]);
0141 tm.tm_mday = bcd2bin(date[3]);
0142 tm.tm_mon = bcd2bin(date[4]) - 1;
0143 tm.tm_year = bcd2bin(date[5]) + 100;
0144
0145 ret = rtc_valid_tm(&tm);
0146 if (ret)
0147 return ret;
0148
0149 return sprintf(buf, "%llu\n",
0150 (unsigned long long)rtc_tm_to_time64(&tm));
0151 };
0152
0153 static DEVICE_ATTR_RW(timestamp0);
0154
0155 static ssize_t timestamp0_count_show(struct device *dev,
0156 struct device_attribute *attr, char *buf)
0157 {
0158 struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
0159 int ret, count;
0160
0161 ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count);
0162 if (ret)
0163 return ret;
0164
0165 return sprintf(buf, "%u\n", count);
0166 };
0167
0168 static DEVICE_ATTR_RO(timestamp0_count);
0169
0170 static struct attribute *rv3028_attrs[] = {
0171 &dev_attr_timestamp0.attr,
0172 &dev_attr_timestamp0_count.attr,
0173 NULL
0174 };
0175
0176 static const struct attribute_group rv3028_attr_group = {
0177 .attrs = rv3028_attrs,
0178 };
0179
0180 static int rv3028_exit_eerd(struct rv3028_data *rv3028, u32 eerd)
0181 {
0182 if (eerd)
0183 return 0;
0184
0185 return regmap_update_bits(rv3028->regmap, RV3028_CTRL1, RV3028_CTRL1_EERD, 0);
0186 }
0187
0188 static int rv3028_enter_eerd(struct rv3028_data *rv3028, u32 *eerd)
0189 {
0190 u32 ctrl1, status;
0191 int ret;
0192
0193 ret = regmap_read(rv3028->regmap, RV3028_CTRL1, &ctrl1);
0194 if (ret)
0195 return ret;
0196
0197 *eerd = ctrl1 & RV3028_CTRL1_EERD;
0198 if (*eerd)
0199 return 0;
0200
0201 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1,
0202 RV3028_CTRL1_EERD, RV3028_CTRL1_EERD);
0203 if (ret)
0204 return ret;
0205
0206 ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
0207 !(status & RV3028_STATUS_EEBUSY),
0208 RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
0209 if (ret) {
0210 rv3028_exit_eerd(rv3028, *eerd);
0211
0212 return ret;
0213 }
0214
0215 return 0;
0216 }
0217
0218 static int rv3028_update_eeprom(struct rv3028_data *rv3028, u32 eerd)
0219 {
0220 u32 status;
0221 int ret;
0222
0223 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
0224 if (ret)
0225 goto exit_eerd;
0226
0227 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, RV3028_EEPROM_CMD_UPDATE);
0228 if (ret)
0229 goto exit_eerd;
0230
0231 usleep_range(63000, RV3028_EEBUSY_TIMEOUT);
0232
0233 ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
0234 !(status & RV3028_STATUS_EEBUSY),
0235 RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
0236
0237 exit_eerd:
0238 rv3028_exit_eerd(rv3028, eerd);
0239
0240 return ret;
0241 }
0242
0243 static int rv3028_update_cfg(struct rv3028_data *rv3028, unsigned int reg,
0244 unsigned int mask, unsigned int val)
0245 {
0246 u32 eerd;
0247 int ret;
0248
0249 ret = rv3028_enter_eerd(rv3028, &eerd);
0250 if (ret)
0251 return ret;
0252
0253 ret = regmap_update_bits(rv3028->regmap, reg, mask, val);
0254 if (ret) {
0255 rv3028_exit_eerd(rv3028, eerd);
0256 return ret;
0257 }
0258
0259 return rv3028_update_eeprom(rv3028, eerd);
0260 }
0261
0262 static irqreturn_t rv3028_handle_irq(int irq, void *dev_id)
0263 {
0264 struct rv3028_data *rv3028 = dev_id;
0265 unsigned long events = 0;
0266 u32 status = 0, ctrl = 0;
0267
0268 if (regmap_read(rv3028->regmap, RV3028_STATUS, &status) < 0 ||
0269 status == 0) {
0270 return IRQ_NONE;
0271 }
0272
0273 status &= ~RV3028_STATUS_PORF;
0274
0275 if (status & RV3028_STATUS_TF) {
0276 status |= RV3028_STATUS_TF;
0277 ctrl |= RV3028_CTRL2_TIE;
0278 events |= RTC_PF;
0279 }
0280
0281 if (status & RV3028_STATUS_AF) {
0282 status |= RV3028_STATUS_AF;
0283 ctrl |= RV3028_CTRL2_AIE;
0284 events |= RTC_AF;
0285 }
0286
0287 if (status & RV3028_STATUS_UF) {
0288 status |= RV3028_STATUS_UF;
0289 ctrl |= RV3028_CTRL2_UIE;
0290 events |= RTC_UF;
0291 }
0292
0293 if (events) {
0294 rtc_update_irq(rv3028->rtc, 1, events);
0295 regmap_update_bits(rv3028->regmap, RV3028_STATUS, status, 0);
0296 regmap_update_bits(rv3028->regmap, RV3028_CTRL2, ctrl, 0);
0297 }
0298
0299 if (status & RV3028_STATUS_EVF) {
0300 sysfs_notify(&rv3028->rtc->dev.kobj, NULL,
0301 dev_attr_timestamp0.attr.name);
0302 dev_warn(&rv3028->rtc->dev, "event detected");
0303 }
0304
0305 return IRQ_HANDLED;
0306 }
0307
0308 static int rv3028_get_time(struct device *dev, struct rtc_time *tm)
0309 {
0310 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
0311 u8 date[7];
0312 int ret, status;
0313
0314 ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
0315 if (ret < 0)
0316 return ret;
0317
0318 if (status & RV3028_STATUS_PORF)
0319 return -EINVAL;
0320
0321 ret = regmap_bulk_read(rv3028->regmap, RV3028_SEC, date, sizeof(date));
0322 if (ret)
0323 return ret;
0324
0325 tm->tm_sec = bcd2bin(date[RV3028_SEC] & 0x7f);
0326 tm->tm_min = bcd2bin(date[RV3028_MIN] & 0x7f);
0327 tm->tm_hour = bcd2bin(date[RV3028_HOUR] & 0x3f);
0328 tm->tm_wday = date[RV3028_WDAY] & 0x7f;
0329 tm->tm_mday = bcd2bin(date[RV3028_DAY] & 0x3f);
0330 tm->tm_mon = bcd2bin(date[RV3028_MONTH] & 0x1f) - 1;
0331 tm->tm_year = bcd2bin(date[RV3028_YEAR]) + 100;
0332
0333 return 0;
0334 }
0335
0336 static int rv3028_set_time(struct device *dev, struct rtc_time *tm)
0337 {
0338 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
0339 u8 date[7];
0340 int ret;
0341
0342 date[RV3028_SEC] = bin2bcd(tm->tm_sec);
0343 date[RV3028_MIN] = bin2bcd(tm->tm_min);
0344 date[RV3028_HOUR] = bin2bcd(tm->tm_hour);
0345 date[RV3028_WDAY] = tm->tm_wday;
0346 date[RV3028_DAY] = bin2bcd(tm->tm_mday);
0347 date[RV3028_MONTH] = bin2bcd(tm->tm_mon + 1);
0348 date[RV3028_YEAR] = bin2bcd(tm->tm_year - 100);
0349
0350
0351
0352
0353
0354 ret = regmap_bulk_write(rv3028->regmap, RV3028_SEC, date,
0355 sizeof(date));
0356 if (ret)
0357 return ret;
0358
0359 ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
0360 RV3028_STATUS_PORF, 0);
0361
0362 return ret;
0363 }
0364
0365 static int rv3028_get_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0366 {
0367 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
0368 u8 alarmvals[3];
0369 int status, ctrl, ret;
0370
0371 ret = regmap_bulk_read(rv3028->regmap, RV3028_ALARM_MIN, alarmvals,
0372 sizeof(alarmvals));
0373 if (ret)
0374 return ret;
0375
0376 ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
0377 if (ret < 0)
0378 return ret;
0379
0380 ret = regmap_read(rv3028->regmap, RV3028_CTRL2, &ctrl);
0381 if (ret < 0)
0382 return ret;
0383
0384 alrm->time.tm_sec = 0;
0385 alrm->time.tm_min = bcd2bin(alarmvals[0] & 0x7f);
0386 alrm->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f);
0387 alrm->time.tm_mday = bcd2bin(alarmvals[2] & 0x3f);
0388
0389 alrm->enabled = !!(ctrl & RV3028_CTRL2_AIE);
0390 alrm->pending = (status & RV3028_STATUS_AF) && alrm->enabled;
0391
0392 return 0;
0393 }
0394
0395 static int rv3028_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0396 {
0397 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
0398 u8 alarmvals[3];
0399 u8 ctrl = 0;
0400 int ret;
0401
0402
0403 if (alrm->time.tm_sec) {
0404 time64_t alarm_time = rtc_tm_to_time64(&alrm->time);
0405
0406 alarm_time += 60 - alrm->time.tm_sec;
0407 rtc_time64_to_tm(alarm_time, &alrm->time);
0408 }
0409
0410 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
0411 RV3028_CTRL2_AIE | RV3028_CTRL2_UIE, 0);
0412 if (ret)
0413 return ret;
0414
0415 alarmvals[0] = bin2bcd(alrm->time.tm_min);
0416 alarmvals[1] = bin2bcd(alrm->time.tm_hour);
0417 alarmvals[2] = bin2bcd(alrm->time.tm_mday);
0418
0419 ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
0420 RV3028_STATUS_AF, 0);
0421 if (ret)
0422 return ret;
0423
0424 ret = regmap_bulk_write(rv3028->regmap, RV3028_ALARM_MIN, alarmvals,
0425 sizeof(alarmvals));
0426 if (ret)
0427 return ret;
0428
0429 if (alrm->enabled) {
0430 if (rv3028->rtc->uie_rtctimer.enabled)
0431 ctrl |= RV3028_CTRL2_UIE;
0432 if (rv3028->rtc->aie_timer.enabled)
0433 ctrl |= RV3028_CTRL2_AIE;
0434 }
0435
0436 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
0437 RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl);
0438
0439 return ret;
0440 }
0441
0442 static int rv3028_alarm_irq_enable(struct device *dev, unsigned int enabled)
0443 {
0444 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
0445 int ctrl = 0, ret;
0446
0447 if (enabled) {
0448 if (rv3028->rtc->uie_rtctimer.enabled)
0449 ctrl |= RV3028_CTRL2_UIE;
0450 if (rv3028->rtc->aie_timer.enabled)
0451 ctrl |= RV3028_CTRL2_AIE;
0452 }
0453
0454 ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
0455 RV3028_STATUS_AF | RV3028_STATUS_UF, 0);
0456 if (ret)
0457 return ret;
0458
0459 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
0460 RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl);
0461 if (ret)
0462 return ret;
0463
0464 return 0;
0465 }
0466
0467 static int rv3028_read_offset(struct device *dev, long *offset)
0468 {
0469 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
0470 int ret, value, steps;
0471
0472 ret = regmap_read(rv3028->regmap, RV3028_OFFSET, &value);
0473 if (ret < 0)
0474 return ret;
0475
0476 steps = sign_extend32(value << 1, 8);
0477
0478 ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &value);
0479 if (ret < 0)
0480 return ret;
0481
0482 steps += value >> 7;
0483
0484 *offset = DIV_ROUND_CLOSEST(steps * OFFSET_STEP_PPT, 1000);
0485
0486 return 0;
0487 }
0488
0489 static int rv3028_set_offset(struct device *dev, long offset)
0490 {
0491 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
0492 u32 eerd;
0493 int ret;
0494
0495 offset = clamp(offset, -244141L, 243187L) * 1000;
0496 offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT);
0497
0498 ret = rv3028_enter_eerd(rv3028, &eerd);
0499 if (ret)
0500 return ret;
0501
0502 ret = regmap_write(rv3028->regmap, RV3028_OFFSET, offset >> 1);
0503 if (ret < 0)
0504 goto exit_eerd;
0505
0506 ret = regmap_update_bits(rv3028->regmap, RV3028_BACKUP, BIT(7),
0507 offset << 7);
0508 if (ret < 0)
0509 goto exit_eerd;
0510
0511 return rv3028_update_eeprom(rv3028, eerd);
0512
0513 exit_eerd:
0514 rv3028_exit_eerd(rv3028, eerd);
0515
0516 return ret;
0517
0518 }
0519
0520 static int rv3028_param_get(struct device *dev, struct rtc_param *param)
0521 {
0522 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
0523 int ret;
0524
0525 switch(param->param) {
0526 u32 value;
0527
0528 case RTC_PARAM_BACKUP_SWITCH_MODE:
0529 ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &value);
0530 if (ret < 0)
0531 return ret;
0532
0533 value = FIELD_GET(RV3028_BACKUP_BSM, value);
0534
0535 switch(value) {
0536 case RV3028_BACKUP_BSM_DSM:
0537 param->uvalue = RTC_BSM_DIRECT;
0538 break;
0539 case RV3028_BACKUP_BSM_LSM:
0540 param->uvalue = RTC_BSM_LEVEL;
0541 break;
0542 default:
0543 param->uvalue = RTC_BSM_DISABLED;
0544 }
0545 break;
0546
0547 default:
0548 return -EINVAL;
0549 }
0550
0551 return 0;
0552 }
0553
0554 static int rv3028_param_set(struct device *dev, struct rtc_param *param)
0555 {
0556 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
0557
0558 switch(param->param) {
0559 u8 mode;
0560 case RTC_PARAM_BACKUP_SWITCH_MODE:
0561 switch (param->uvalue) {
0562 case RTC_BSM_DISABLED:
0563 mode = 0;
0564 break;
0565 case RTC_BSM_DIRECT:
0566 mode = RV3028_BACKUP_BSM_DSM;
0567 break;
0568 case RTC_BSM_LEVEL:
0569 mode = RV3028_BACKUP_BSM_LSM;
0570 break;
0571 default:
0572 return -EINVAL;
0573 }
0574
0575 return rv3028_update_cfg(rv3028, RV3028_BACKUP, RV3028_BACKUP_BSM,
0576 FIELD_PREP(RV3028_BACKUP_BSM, mode));
0577
0578 default:
0579 return -EINVAL;
0580 }
0581
0582 return 0;
0583 }
0584
0585 static int rv3028_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
0586 {
0587 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
0588 int status, ret = 0;
0589
0590 switch (cmd) {
0591 case RTC_VL_READ:
0592 ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
0593 if (ret < 0)
0594 return ret;
0595
0596 status = status & RV3028_STATUS_PORF ? RTC_VL_DATA_INVALID : 0;
0597 return put_user(status, (unsigned int __user *)arg);
0598
0599 default:
0600 return -ENOIOCTLCMD;
0601 }
0602 }
0603
0604 static int rv3028_nvram_write(void *priv, unsigned int offset, void *val,
0605 size_t bytes)
0606 {
0607 return regmap_bulk_write(priv, RV3028_RAM1 + offset, val, bytes);
0608 }
0609
0610 static int rv3028_nvram_read(void *priv, unsigned int offset, void *val,
0611 size_t bytes)
0612 {
0613 return regmap_bulk_read(priv, RV3028_RAM1 + offset, val, bytes);
0614 }
0615
0616 static int rv3028_eeprom_write(void *priv, unsigned int offset, void *val,
0617 size_t bytes)
0618 {
0619 struct rv3028_data *rv3028 = priv;
0620 u32 status, eerd;
0621 int i, ret;
0622 u8 *buf = val;
0623
0624 ret = rv3028_enter_eerd(rv3028, &eerd);
0625 if (ret)
0626 return ret;
0627
0628 for (i = 0; i < bytes; i++) {
0629 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i);
0630 if (ret)
0631 goto restore_eerd;
0632
0633 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_DATA, buf[i]);
0634 if (ret)
0635 goto restore_eerd;
0636
0637 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
0638 if (ret)
0639 goto restore_eerd;
0640
0641 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD,
0642 RV3028_EEPROM_CMD_WRITE);
0643 if (ret)
0644 goto restore_eerd;
0645
0646 usleep_range(RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
0647
0648 ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
0649 !(status & RV3028_STATUS_EEBUSY),
0650 RV3028_EEBUSY_POLL,
0651 RV3028_EEBUSY_TIMEOUT);
0652 if (ret)
0653 goto restore_eerd;
0654 }
0655
0656 restore_eerd:
0657 rv3028_exit_eerd(rv3028, eerd);
0658
0659 return ret;
0660 }
0661
0662 static int rv3028_eeprom_read(void *priv, unsigned int offset, void *val,
0663 size_t bytes)
0664 {
0665 struct rv3028_data *rv3028 = priv;
0666 u32 status, eerd, data;
0667 int i, ret;
0668 u8 *buf = val;
0669
0670 ret = rv3028_enter_eerd(rv3028, &eerd);
0671 if (ret)
0672 return ret;
0673
0674 for (i = 0; i < bytes; i++) {
0675 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i);
0676 if (ret)
0677 goto restore_eerd;
0678
0679 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
0680 if (ret)
0681 goto restore_eerd;
0682
0683 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD,
0684 RV3028_EEPROM_CMD_READ);
0685 if (ret)
0686 goto restore_eerd;
0687
0688 ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
0689 !(status & RV3028_STATUS_EEBUSY),
0690 RV3028_EEBUSY_POLL,
0691 RV3028_EEBUSY_TIMEOUT);
0692 if (ret)
0693 goto restore_eerd;
0694
0695 ret = regmap_read(rv3028->regmap, RV3028_EEPROM_DATA, &data);
0696 if (ret)
0697 goto restore_eerd;
0698 buf[i] = data;
0699 }
0700
0701 restore_eerd:
0702 rv3028_exit_eerd(rv3028, eerd);
0703
0704 return ret;
0705 }
0706
0707 #ifdef CONFIG_COMMON_CLK
0708 #define clkout_hw_to_rv3028(hw) container_of(hw, struct rv3028_data, clkout_hw)
0709
0710 static int clkout_rates[] = {
0711 32768,
0712 8192,
0713 1024,
0714 64,
0715 32,
0716 1,
0717 };
0718
0719 static unsigned long rv3028_clkout_recalc_rate(struct clk_hw *hw,
0720 unsigned long parent_rate)
0721 {
0722 int clkout, ret;
0723 struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
0724
0725 ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout);
0726 if (ret < 0)
0727 return 0;
0728
0729 clkout &= RV3028_CLKOUT_FD_MASK;
0730 return clkout_rates[clkout];
0731 }
0732
0733 static long rv3028_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
0734 unsigned long *prate)
0735 {
0736 int i;
0737
0738 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
0739 if (clkout_rates[i] <= rate)
0740 return clkout_rates[i];
0741
0742 return 0;
0743 }
0744
0745 static int rv3028_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
0746 unsigned long parent_rate)
0747 {
0748 int i, ret;
0749 u32 enabled;
0750 struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
0751
0752 ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &enabled);
0753 if (ret < 0)
0754 return ret;
0755
0756 ret = regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0);
0757 if (ret < 0)
0758 return ret;
0759
0760 enabled &= RV3028_CLKOUT_CLKOE;
0761
0762 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
0763 if (clkout_rates[i] == rate)
0764 return rv3028_update_cfg(rv3028, RV3028_CLKOUT, 0xff,
0765 RV3028_CLKOUT_CLKSY | enabled | i);
0766
0767 return -EINVAL;
0768 }
0769
0770 static int rv3028_clkout_prepare(struct clk_hw *hw)
0771 {
0772 struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
0773
0774 return regmap_write(rv3028->regmap, RV3028_CLKOUT,
0775 RV3028_CLKOUT_CLKSY | RV3028_CLKOUT_CLKOE);
0776 }
0777
0778 static void rv3028_clkout_unprepare(struct clk_hw *hw)
0779 {
0780 struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
0781
0782 regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0);
0783 regmap_update_bits(rv3028->regmap, RV3028_STATUS,
0784 RV3028_STATUS_CLKF, 0);
0785 }
0786
0787 static int rv3028_clkout_is_prepared(struct clk_hw *hw)
0788 {
0789 int clkout, ret;
0790 struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
0791
0792 ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout);
0793 if (ret < 0)
0794 return ret;
0795
0796 return !!(clkout & RV3028_CLKOUT_CLKOE);
0797 }
0798
0799 static const struct clk_ops rv3028_clkout_ops = {
0800 .prepare = rv3028_clkout_prepare,
0801 .unprepare = rv3028_clkout_unprepare,
0802 .is_prepared = rv3028_clkout_is_prepared,
0803 .recalc_rate = rv3028_clkout_recalc_rate,
0804 .round_rate = rv3028_clkout_round_rate,
0805 .set_rate = rv3028_clkout_set_rate,
0806 };
0807
0808 static int rv3028_clkout_register_clk(struct rv3028_data *rv3028,
0809 struct i2c_client *client)
0810 {
0811 int ret;
0812 struct clk *clk;
0813 struct clk_init_data init;
0814 struct device_node *node = client->dev.of_node;
0815
0816 ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
0817 RV3028_STATUS_CLKF, 0);
0818 if (ret < 0)
0819 return ret;
0820
0821 init.name = "rv3028-clkout";
0822 init.ops = &rv3028_clkout_ops;
0823 init.flags = 0;
0824 init.parent_names = NULL;
0825 init.num_parents = 0;
0826 rv3028->clkout_hw.init = &init;
0827
0828
0829 of_property_read_string(node, "clock-output-names", &init.name);
0830
0831
0832 clk = devm_clk_register(&client->dev, &rv3028->clkout_hw);
0833 if (!IS_ERR(clk))
0834 of_clk_add_provider(node, of_clk_src_simple_get, clk);
0835
0836 return 0;
0837 }
0838 #endif
0839
0840 static const struct rtc_class_ops rv3028_rtc_ops = {
0841 .read_time = rv3028_get_time,
0842 .set_time = rv3028_set_time,
0843 .read_alarm = rv3028_get_alarm,
0844 .set_alarm = rv3028_set_alarm,
0845 .alarm_irq_enable = rv3028_alarm_irq_enable,
0846 .read_offset = rv3028_read_offset,
0847 .set_offset = rv3028_set_offset,
0848 .ioctl = rv3028_ioctl,
0849 .param_get = rv3028_param_get,
0850 .param_set = rv3028_param_set,
0851 };
0852
0853 static const struct regmap_config regmap_config = {
0854 .reg_bits = 8,
0855 .val_bits = 8,
0856 .max_register = 0x37,
0857 };
0858
0859 static int rv3028_probe(struct i2c_client *client)
0860 {
0861 struct rv3028_data *rv3028;
0862 int ret, status;
0863 u32 ohms;
0864 struct nvmem_config nvmem_cfg = {
0865 .name = "rv3028_nvram",
0866 .word_size = 1,
0867 .stride = 1,
0868 .size = 2,
0869 .type = NVMEM_TYPE_BATTERY_BACKED,
0870 .reg_read = rv3028_nvram_read,
0871 .reg_write = rv3028_nvram_write,
0872 };
0873 struct nvmem_config eeprom_cfg = {
0874 .name = "rv3028_eeprom",
0875 .word_size = 1,
0876 .stride = 1,
0877 .size = 43,
0878 .type = NVMEM_TYPE_EEPROM,
0879 .reg_read = rv3028_eeprom_read,
0880 .reg_write = rv3028_eeprom_write,
0881 };
0882
0883 rv3028 = devm_kzalloc(&client->dev, sizeof(struct rv3028_data),
0884 GFP_KERNEL);
0885 if (!rv3028)
0886 return -ENOMEM;
0887
0888 rv3028->regmap = devm_regmap_init_i2c(client, ®map_config);
0889 if (IS_ERR(rv3028->regmap))
0890 return PTR_ERR(rv3028->regmap);
0891
0892 i2c_set_clientdata(client, rv3028);
0893
0894 ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
0895 if (ret < 0)
0896 return ret;
0897
0898 if (status & RV3028_STATUS_AF)
0899 dev_warn(&client->dev, "An alarm may have been missed.\n");
0900
0901 rv3028->rtc = devm_rtc_allocate_device(&client->dev);
0902 if (IS_ERR(rv3028->rtc))
0903 return PTR_ERR(rv3028->rtc);
0904
0905 if (client->irq > 0) {
0906 ret = devm_request_threaded_irq(&client->dev, client->irq,
0907 NULL, rv3028_handle_irq,
0908 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
0909 "rv3028", rv3028);
0910 if (ret) {
0911 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
0912 client->irq = 0;
0913 }
0914 }
0915 if (!client->irq)
0916 clear_bit(RTC_FEATURE_ALARM, rv3028->rtc->features);
0917
0918 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1,
0919 RV3028_CTRL1_WADA, RV3028_CTRL1_WADA);
0920 if (ret)
0921 return ret;
0922
0923
0924 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
0925 RV3028_CTRL2_EIE | RV3028_CTRL2_TSE,
0926 RV3028_CTRL2_EIE | RV3028_CTRL2_TSE);
0927 if (ret)
0928 return ret;
0929
0930
0931 if (!device_property_read_u32(&client->dev, "trickle-resistor-ohms",
0932 &ohms)) {
0933 int i;
0934
0935 for (i = 0; i < ARRAY_SIZE(rv3028_trickle_resistors); i++)
0936 if (ohms == rv3028_trickle_resistors[i])
0937 break;
0938
0939 if (i < ARRAY_SIZE(rv3028_trickle_resistors)) {
0940 ret = rv3028_update_cfg(rv3028, RV3028_BACKUP, RV3028_BACKUP_TCE |
0941 RV3028_BACKUP_TCR_MASK, RV3028_BACKUP_TCE | i);
0942 if (ret)
0943 return ret;
0944 } else {
0945 dev_warn(&client->dev, "invalid trickle resistor value\n");
0946 }
0947 }
0948
0949 ret = rtc_add_group(rv3028->rtc, &rv3028_attr_group);
0950 if (ret)
0951 return ret;
0952
0953 set_bit(RTC_FEATURE_BACKUP_SWITCH_MODE, rv3028->rtc->features);
0954
0955 rv3028->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
0956 rv3028->rtc->range_max = RTC_TIMESTAMP_END_2099;
0957 rv3028->rtc->ops = &rv3028_rtc_ops;
0958 ret = devm_rtc_register_device(rv3028->rtc);
0959 if (ret)
0960 return ret;
0961
0962 nvmem_cfg.priv = rv3028->regmap;
0963 devm_rtc_nvmem_register(rv3028->rtc, &nvmem_cfg);
0964 eeprom_cfg.priv = rv3028;
0965 devm_rtc_nvmem_register(rv3028->rtc, &eeprom_cfg);
0966
0967 rv3028->rtc->max_user_freq = 1;
0968
0969 #ifdef CONFIG_COMMON_CLK
0970 rv3028_clkout_register_clk(rv3028, client);
0971 #endif
0972 return 0;
0973 }
0974
0975 static const __maybe_unused struct of_device_id rv3028_of_match[] = {
0976 { .compatible = "microcrystal,rv3028", },
0977 { }
0978 };
0979 MODULE_DEVICE_TABLE(of, rv3028_of_match);
0980
0981 static struct i2c_driver rv3028_driver = {
0982 .driver = {
0983 .name = "rtc-rv3028",
0984 .of_match_table = of_match_ptr(rv3028_of_match),
0985 },
0986 .probe_new = rv3028_probe,
0987 };
0988 module_i2c_driver(rv3028_driver);
0989
0990 MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
0991 MODULE_DESCRIPTION("Micro Crystal RV3028 RTC driver");
0992 MODULE_LICENSE("GPL v2");