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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs
0004  *
0005  * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net>
0006  * Copyright (C) 2006 Tower Technologies
0007  * Copyright (C) 2008 Paul Mundt
0008  */
0009 
0010 #include <linux/i2c.h>
0011 #include <linux/rtc.h>
0012 #include <linux/bcd.h>
0013 #include <linux/slab.h>
0014 #include <linux/module.h>
0015 #include <linux/of_device.h>
0016 
0017 /*
0018  * Ricoh has a family of I2C based RTCs, which differ only slightly from
0019  * each other.  Differences center on pinout (e.g. how many interrupts,
0020  * output clock, etc) and how the control registers are used.  The '372
0021  * is significant only because that's the one this driver first supported.
0022  */
0023 #define RS5C372_REG_SECS    0
0024 #define RS5C372_REG_MINS    1
0025 #define RS5C372_REG_HOURS   2
0026 #define RS5C372_REG_WDAY    3
0027 #define RS5C372_REG_DAY     4
0028 #define RS5C372_REG_MONTH   5
0029 #define RS5C372_REG_YEAR    6
0030 #define RS5C372_REG_TRIM    7
0031 #   define RS5C372_TRIM_XSL     0x80        /* only if RS5C372[a|b] */
0032 #   define RS5C372_TRIM_MASK    0x7F
0033 #   define R2221TL_TRIM_DEV     (1 << 7)    /* only if R2221TL */
0034 #   define RS5C372_TRIM_DECR    (1 << 6)
0035 
0036 #define RS5C_REG_ALARM_A_MIN    8           /* or ALARM_W */
0037 #define RS5C_REG_ALARM_A_HOURS  9
0038 #define RS5C_REG_ALARM_A_WDAY   10
0039 
0040 #define RS5C_REG_ALARM_B_MIN    11          /* or ALARM_D */
0041 #define RS5C_REG_ALARM_B_HOURS  12
0042 #define RS5C_REG_ALARM_B_WDAY   13          /* (ALARM_B only) */
0043 
0044 #define RS5C_REG_CTRL1      14
0045 #   define RS5C_CTRL1_AALE      (1 << 7)    /* or WALE */
0046 #   define RS5C_CTRL1_BALE      (1 << 6)    /* or DALE */
0047 #   define RV5C387_CTRL1_24     (1 << 5)
0048 #   define RS5C372A_CTRL1_SL1   (1 << 5)
0049 #   define RS5C_CTRL1_CT_MASK   (7 << 0)
0050 #   define RS5C_CTRL1_CT0       (0 << 0)    /* no periodic irq */
0051 #   define RS5C_CTRL1_CT4       (4 << 0)    /* 1 Hz level irq */
0052 #define RS5C_REG_CTRL2      15
0053 #   define RS5C372_CTRL2_24     (1 << 5)
0054 #   define RS5C_CTRL2_XSTP      (1 << 4)    /* only if !R2x2x */
0055 #   define R2x2x_CTRL2_VDET     (1 << 6)    /* only if  R2x2x */
0056 #   define R2x2x_CTRL2_XSTP     (1 << 5)    /* only if  R2x2x */
0057 #   define R2x2x_CTRL2_PON      (1 << 4)    /* only if  R2x2x */
0058 #   define RS5C_CTRL2_CTFG      (1 << 2)
0059 #   define RS5C_CTRL2_AAFG      (1 << 1)    /* or WAFG */
0060 #   define RS5C_CTRL2_BAFG      (1 << 0)    /* or DAFG */
0061 
0062 
0063 /* to read (style 1) or write registers starting at R */
0064 #define RS5C_ADDR(R)        (((R) << 4) | 0)
0065 
0066 
0067 enum rtc_type {
0068     rtc_undef = 0,
0069     rtc_r2025sd,
0070     rtc_r2221tl,
0071     rtc_rs5c372a,
0072     rtc_rs5c372b,
0073     rtc_rv5c386,
0074     rtc_rv5c387a,
0075 };
0076 
0077 static const struct i2c_device_id rs5c372_id[] = {
0078     { "r2025sd", rtc_r2025sd },
0079     { "r2221tl", rtc_r2221tl },
0080     { "rs5c372a", rtc_rs5c372a },
0081     { "rs5c372b", rtc_rs5c372b },
0082     { "rv5c386", rtc_rv5c386 },
0083     { "rv5c387a", rtc_rv5c387a },
0084     { }
0085 };
0086 MODULE_DEVICE_TABLE(i2c, rs5c372_id);
0087 
0088 static const __maybe_unused struct of_device_id rs5c372_of_match[] = {
0089     {
0090         .compatible = "ricoh,r2025sd",
0091         .data = (void *)rtc_r2025sd
0092     },
0093     {
0094         .compatible = "ricoh,r2221tl",
0095         .data = (void *)rtc_r2221tl
0096     },
0097     {
0098         .compatible = "ricoh,rs5c372a",
0099         .data = (void *)rtc_rs5c372a
0100     },
0101     {
0102         .compatible = "ricoh,rs5c372b",
0103         .data = (void *)rtc_rs5c372b
0104     },
0105     {
0106         .compatible = "ricoh,rv5c386",
0107         .data = (void *)rtc_rv5c386
0108     },
0109     {
0110         .compatible = "ricoh,rv5c387a",
0111         .data = (void *)rtc_rv5c387a
0112     },
0113     { }
0114 };
0115 MODULE_DEVICE_TABLE(of, rs5c372_of_match);
0116 
0117 /* REVISIT:  this assumes that:
0118  *  - we're in the 21st century, so it's safe to ignore the century
0119  *    bit for rv5c38[67] (REG_MONTH bit 7);
0120  *  - we should use ALARM_A not ALARM_B (may be wrong on some boards)
0121  */
0122 struct rs5c372 {
0123     struct i2c_client   *client;
0124     struct rtc_device   *rtc;
0125     enum rtc_type       type;
0126     unsigned        time24:1;
0127     unsigned        has_irq:1;
0128     unsigned        smbus:1;
0129     char            buf[17];
0130     char            *regs;
0131 };
0132 
0133 static int rs5c_get_regs(struct rs5c372 *rs5c)
0134 {
0135     struct i2c_client   *client = rs5c->client;
0136     struct i2c_msg      msgs[] = {
0137         {
0138             .addr = client->addr,
0139             .flags = I2C_M_RD,
0140             .len = sizeof(rs5c->buf),
0141             .buf = rs5c->buf
0142         },
0143     };
0144 
0145     /* This implements the third reading method from the datasheet, using
0146      * an internal address that's reset after each transaction (by STOP)
0147      * to 0x0f ... so we read extra registers, and skip the first one.
0148      *
0149      * The first method doesn't work with the iop3xx adapter driver, on at
0150      * least 80219 chips; this works around that bug.
0151      *
0152      * The third method on the other hand doesn't work for the SMBus-only
0153      * configurations, so we use the the first method there, stripping off
0154      * the extra register in the process.
0155      */
0156     if (rs5c->smbus) {
0157         int addr = RS5C_ADDR(RS5C372_REG_SECS);
0158         int size = sizeof(rs5c->buf) - 1;
0159 
0160         if (i2c_smbus_read_i2c_block_data(client, addr, size,
0161                           rs5c->buf + 1) != size) {
0162             dev_warn(&client->dev, "can't read registers\n");
0163             return -EIO;
0164         }
0165     } else {
0166         if ((i2c_transfer(client->adapter, msgs, 1)) != 1) {
0167             dev_warn(&client->dev, "can't read registers\n");
0168             return -EIO;
0169         }
0170     }
0171 
0172     dev_dbg(&client->dev,
0173         "%3ph (%02x) %3ph (%02x), %3ph, %3ph; %02x %02x\n",
0174         rs5c->regs + 0, rs5c->regs[3],
0175         rs5c->regs + 4, rs5c->regs[7],
0176         rs5c->regs + 8, rs5c->regs + 11,
0177         rs5c->regs[14], rs5c->regs[15]);
0178 
0179     return 0;
0180 }
0181 
0182 static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg)
0183 {
0184     unsigned    hour;
0185 
0186     if (rs5c->time24)
0187         return bcd2bin(reg & 0x3f);
0188 
0189     hour = bcd2bin(reg & 0x1f);
0190     if (hour == 12)
0191         hour = 0;
0192     if (reg & 0x20)
0193         hour += 12;
0194     return hour;
0195 }
0196 
0197 static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour)
0198 {
0199     if (rs5c->time24)
0200         return bin2bcd(hour);
0201 
0202     if (hour > 12)
0203         return 0x20 | bin2bcd(hour - 12);
0204     if (hour == 12)
0205         return 0x20 | bin2bcd(12);
0206     if (hour == 0)
0207         return bin2bcd(12);
0208     return bin2bcd(hour);
0209 }
0210 
0211 static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm)
0212 {
0213     struct i2c_client *client = to_i2c_client(dev);
0214     struct rs5c372  *rs5c = i2c_get_clientdata(client);
0215     int     status = rs5c_get_regs(rs5c);
0216     unsigned char ctrl2 = rs5c->regs[RS5C_REG_CTRL2];
0217 
0218     if (status < 0)
0219         return status;
0220 
0221     switch (rs5c->type) {
0222     case rtc_r2025sd:
0223     case rtc_r2221tl:
0224         if ((rs5c->type == rtc_r2025sd && !(ctrl2 & R2x2x_CTRL2_XSTP)) ||
0225             (rs5c->type == rtc_r2221tl &&  (ctrl2 & R2x2x_CTRL2_XSTP))) {
0226             dev_warn(&client->dev, "rtc oscillator interruption detected. Please reset the rtc clock.\n");
0227             return -EINVAL;
0228         }
0229         break;
0230     default:
0231         if (ctrl2 & RS5C_CTRL2_XSTP) {
0232             dev_warn(&client->dev, "rtc oscillator interruption detected. Please reset the rtc clock.\n");
0233             return -EINVAL;
0234         }
0235     }
0236 
0237     tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f);
0238     tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f);
0239     tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]);
0240 
0241     tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07);
0242     tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f);
0243 
0244     /* tm->tm_mon is zero-based */
0245     tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1;
0246 
0247     /* year is 1900 + tm->tm_year */
0248     tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100;
0249 
0250     dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
0251         "mday=%d, mon=%d, year=%d, wday=%d\n",
0252         __func__,
0253         tm->tm_sec, tm->tm_min, tm->tm_hour,
0254         tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
0255 
0256     return 0;
0257 }
0258 
0259 static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm)
0260 {
0261     struct i2c_client *client = to_i2c_client(dev);
0262     struct rs5c372  *rs5c = i2c_get_clientdata(client);
0263     unsigned char   buf[7];
0264     unsigned char   ctrl2;
0265     int     addr;
0266 
0267     dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d "
0268         "mday=%d, mon=%d, year=%d, wday=%d\n",
0269         __func__,
0270         tm->tm_sec, tm->tm_min, tm->tm_hour,
0271         tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
0272 
0273     addr   = RS5C_ADDR(RS5C372_REG_SECS);
0274     buf[0] = bin2bcd(tm->tm_sec);
0275     buf[1] = bin2bcd(tm->tm_min);
0276     buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour);
0277     buf[3] = bin2bcd(tm->tm_wday);
0278     buf[4] = bin2bcd(tm->tm_mday);
0279     buf[5] = bin2bcd(tm->tm_mon + 1);
0280     buf[6] = bin2bcd(tm->tm_year - 100);
0281 
0282     if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) {
0283         dev_dbg(&client->dev, "%s: write error in line %i\n",
0284             __func__, __LINE__);
0285         return -EIO;
0286     }
0287 
0288     addr = RS5C_ADDR(RS5C_REG_CTRL2);
0289     ctrl2 = i2c_smbus_read_byte_data(client, addr);
0290 
0291     /* clear rtc warning bits */
0292     switch (rs5c->type) {
0293     case rtc_r2025sd:
0294     case rtc_r2221tl:
0295         ctrl2 &= ~(R2x2x_CTRL2_VDET | R2x2x_CTRL2_PON);
0296         if (rs5c->type == rtc_r2025sd)
0297             ctrl2 |= R2x2x_CTRL2_XSTP;
0298         else
0299             ctrl2 &= ~R2x2x_CTRL2_XSTP;
0300         break;
0301     default:
0302         ctrl2 &= ~RS5C_CTRL2_XSTP;
0303         break;
0304     }
0305 
0306     if (i2c_smbus_write_byte_data(client, addr, ctrl2) < 0) {
0307         dev_dbg(&client->dev, "%s: write error in line %i\n",
0308             __func__, __LINE__);
0309         return -EIO;
0310     }
0311 
0312     return 0;
0313 }
0314 
0315 #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
0316 #define NEED_TRIM
0317 #endif
0318 
0319 #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS)
0320 #define NEED_TRIM
0321 #endif
0322 
0323 #ifdef  NEED_TRIM
0324 static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim)
0325 {
0326     struct rs5c372 *rs5c372 = i2c_get_clientdata(client);
0327     u8 tmp = rs5c372->regs[RS5C372_REG_TRIM];
0328 
0329     if (osc) {
0330         if (rs5c372->type == rtc_rs5c372a || rs5c372->type == rtc_rs5c372b)
0331             *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768;
0332         else
0333             *osc = 32768;
0334     }
0335 
0336     if (trim) {
0337         dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp);
0338         tmp &= RS5C372_TRIM_MASK;
0339         if (tmp & 0x3e) {
0340             int t = tmp & 0x3f;
0341 
0342             if (tmp & 0x40)
0343                 t = (~t | (s8)0xc0) + 1;
0344             else
0345                 t = t - 1;
0346 
0347             tmp = t * 2;
0348         } else
0349             tmp = 0;
0350         *trim = tmp;
0351     }
0352 
0353     return 0;
0354 }
0355 #endif
0356 
0357 static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
0358 {
0359     struct i2c_client   *client = to_i2c_client(dev);
0360     struct rs5c372      *rs5c = i2c_get_clientdata(client);
0361     unsigned char       buf;
0362     int         status, addr;
0363 
0364     buf = rs5c->regs[RS5C_REG_CTRL1];
0365 
0366     if (!rs5c->has_irq)
0367         return -EINVAL;
0368 
0369     status = rs5c_get_regs(rs5c);
0370     if (status < 0)
0371         return status;
0372 
0373     addr = RS5C_ADDR(RS5C_REG_CTRL1);
0374     if (enabled)
0375         buf |= RS5C_CTRL1_AALE;
0376     else
0377         buf &= ~RS5C_CTRL1_AALE;
0378 
0379     if (i2c_smbus_write_byte_data(client, addr, buf) < 0) {
0380         dev_warn(dev, "can't update alarm\n");
0381         status = -EIO;
0382     } else
0383         rs5c->regs[RS5C_REG_CTRL1] = buf;
0384 
0385     return status;
0386 }
0387 
0388 
0389 /* NOTE:  Since RTC_WKALM_{RD,SET} were originally defined for EFI,
0390  * which only exposes a polled programming interface; and since
0391  * these calls map directly to those EFI requests; we don't demand
0392  * we have an IRQ for this chip when we go through this API.
0393  *
0394  * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs
0395  * though, managed through RTC_AIE_{ON,OFF} requests.
0396  */
0397 
0398 static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t)
0399 {
0400     struct i2c_client   *client = to_i2c_client(dev);
0401     struct rs5c372      *rs5c = i2c_get_clientdata(client);
0402     int         status;
0403 
0404     status = rs5c_get_regs(rs5c);
0405     if (status < 0)
0406         return status;
0407 
0408     /* report alarm time */
0409     t->time.tm_sec = 0;
0410     t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f);
0411     t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]);
0412 
0413     /* ... and status */
0414     t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE);
0415     t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG);
0416 
0417     return 0;
0418 }
0419 
0420 static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t)
0421 {
0422     struct i2c_client   *client = to_i2c_client(dev);
0423     struct rs5c372      *rs5c = i2c_get_clientdata(client);
0424     int         status, addr, i;
0425     unsigned char       buf[3];
0426 
0427     /* only handle up to 24 hours in the future, like RTC_ALM_SET */
0428     if (t->time.tm_mday != -1
0429             || t->time.tm_mon != -1
0430             || t->time.tm_year != -1)
0431         return -EINVAL;
0432 
0433     /* REVISIT: round up tm_sec */
0434 
0435     /* if needed, disable irq (clears pending status) */
0436     status = rs5c_get_regs(rs5c);
0437     if (status < 0)
0438         return status;
0439     if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) {
0440         addr = RS5C_ADDR(RS5C_REG_CTRL1);
0441         buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE;
0442         if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) {
0443             dev_dbg(dev, "can't disable alarm\n");
0444             return -EIO;
0445         }
0446         rs5c->regs[RS5C_REG_CTRL1] = buf[0];
0447     }
0448 
0449     /* set alarm */
0450     buf[0] = bin2bcd(t->time.tm_min);
0451     buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour);
0452     buf[2] = 0x7f;  /* any/all days */
0453 
0454     for (i = 0; i < sizeof(buf); i++) {
0455         addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i);
0456         if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) {
0457             dev_dbg(dev, "can't set alarm time\n");
0458             return -EIO;
0459         }
0460     }
0461 
0462     /* ... and maybe enable its irq */
0463     if (t->enabled) {
0464         addr = RS5C_ADDR(RS5C_REG_CTRL1);
0465         buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE;
0466         if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0)
0467             dev_warn(dev, "can't enable alarm\n");
0468         rs5c->regs[RS5C_REG_CTRL1] = buf[0];
0469     }
0470 
0471     return 0;
0472 }
0473 
0474 #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
0475 
0476 static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq)
0477 {
0478     int err, osc, trim;
0479 
0480     err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim);
0481     if (err == 0) {
0482         seq_printf(seq, "crystal\t\t: %d.%03d KHz\n",
0483                 osc / 1000, osc % 1000);
0484         seq_printf(seq, "trim\t\t: %d\n", trim);
0485     }
0486 
0487     return 0;
0488 }
0489 
0490 #else
0491 #define rs5c372_rtc_proc    NULL
0492 #endif
0493 
0494 #ifdef CONFIG_RTC_INTF_DEV
0495 static int rs5c372_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
0496 {
0497     struct rs5c372  *rs5c = i2c_get_clientdata(to_i2c_client(dev));
0498     unsigned char   ctrl2;
0499     int     addr;
0500     unsigned int    flags;
0501 
0502     dev_dbg(dev, "%s: cmd=%x\n", __func__, cmd);
0503 
0504     addr = RS5C_ADDR(RS5C_REG_CTRL2);
0505     ctrl2 = i2c_smbus_read_byte_data(rs5c->client, addr);
0506 
0507     switch (cmd) {
0508     case RTC_VL_READ:
0509         flags = 0;
0510 
0511         switch (rs5c->type) {
0512         case rtc_r2025sd:
0513         case rtc_r2221tl:
0514             if ((rs5c->type == rtc_r2025sd && !(ctrl2 & R2x2x_CTRL2_XSTP)) ||
0515                 (rs5c->type == rtc_r2221tl &&  (ctrl2 & R2x2x_CTRL2_XSTP))) {
0516                 flags |= RTC_VL_DATA_INVALID;
0517             }
0518             if (ctrl2 & R2x2x_CTRL2_VDET)
0519                 flags |= RTC_VL_BACKUP_LOW;
0520             break;
0521         default:
0522             if (ctrl2 & RS5C_CTRL2_XSTP)
0523                 flags |= RTC_VL_DATA_INVALID;
0524             break;
0525         }
0526 
0527         return put_user(flags, (unsigned int __user *)arg);
0528     case RTC_VL_CLR:
0529         /* clear VDET bit */
0530         if (rs5c->type == rtc_r2025sd || rs5c->type == rtc_r2221tl) {
0531             ctrl2 &= ~R2x2x_CTRL2_VDET;
0532             if (i2c_smbus_write_byte_data(rs5c->client, addr, ctrl2) < 0) {
0533                 dev_dbg(&rs5c->client->dev, "%s: write error in line %i\n",
0534                         __func__, __LINE__);
0535                 return -EIO;
0536             }
0537         }
0538         return 0;
0539     default:
0540         return -ENOIOCTLCMD;
0541     }
0542     return 0;
0543 }
0544 #else
0545 #define rs5c372_ioctl   NULL
0546 #endif
0547 
0548 static int rs5c372_read_offset(struct device *dev, long *offset)
0549 {
0550     struct rs5c372 *rs5c = i2c_get_clientdata(to_i2c_client(dev));
0551     u8 val = rs5c->regs[RS5C372_REG_TRIM];
0552     long ppb_per_step = 0;
0553     bool decr = val & RS5C372_TRIM_DECR;
0554 
0555     switch (rs5c->type) {
0556     case rtc_r2221tl:
0557         ppb_per_step = val & R2221TL_TRIM_DEV ? 1017 : 3051;
0558         break;
0559     case rtc_rs5c372a:
0560     case rtc_rs5c372b:
0561         ppb_per_step = val & RS5C372_TRIM_XSL ? 3125 : 3051;
0562         break;
0563     default:
0564         ppb_per_step = 3051;
0565         break;
0566     }
0567 
0568     /* Only bits[0:5] repsents the time counts */
0569     val &= 0x3F;
0570 
0571     /* If bits[1:5] are all 0, it means no increment or decrement */
0572     if (!(val & 0x3E)) {
0573         *offset = 0;
0574     } else {
0575         if (decr)
0576             *offset = -(((~val) & 0x3F) + 1) * ppb_per_step;
0577         else
0578             *offset = (val - 1) * ppb_per_step;
0579     }
0580 
0581     return 0;
0582 }
0583 
0584 static int rs5c372_set_offset(struct device *dev, long offset)
0585 {
0586     struct rs5c372 *rs5c = i2c_get_clientdata(to_i2c_client(dev));
0587     int addr = RS5C_ADDR(RS5C372_REG_TRIM);
0588     u8 val = 0;
0589     u8 tmp = 0;
0590     long ppb_per_step = 3051;
0591     long steps = LONG_MIN;
0592 
0593     switch (rs5c->type) {
0594     case rtc_rs5c372a:
0595     case rtc_rs5c372b:
0596         tmp = rs5c->regs[RS5C372_REG_TRIM];
0597         if (tmp & RS5C372_TRIM_XSL) {
0598             ppb_per_step = 3125;
0599             val |= RS5C372_TRIM_XSL;
0600         }
0601         break;
0602     case rtc_r2221tl:
0603         /*
0604          * Check if it is possible to use high resolution mode (DEV=1).
0605          * In this mode, the minimum resolution is 2 / (32768 * 20 * 3),
0606          * which is about 1017 ppb.
0607          */
0608         steps = DIV_ROUND_CLOSEST(offset, 1017);
0609         if (steps >= -0x3E && steps <= 0x3E) {
0610             ppb_per_step = 1017;
0611             val |= R2221TL_TRIM_DEV;
0612         } else {
0613             /*
0614              * offset is out of the range of high resolution mode.
0615              * Try to use low resolution mode (DEV=0). In this mode,
0616              * the minimum resolution is 2 / (32768 * 20), which is
0617              * about 3051 ppb.
0618              */
0619             steps = LONG_MIN;
0620         }
0621         break;
0622     default:
0623         break;
0624     }
0625 
0626     if (steps == LONG_MIN) {
0627         steps = DIV_ROUND_CLOSEST(offset, ppb_per_step);
0628         if (steps > 0x3E || steps < -0x3E)
0629             return -ERANGE;
0630     }
0631 
0632     if (steps > 0) {
0633         val |= steps + 1;
0634     } else {
0635         val |= RS5C372_TRIM_DECR;
0636         val |= (~(-steps - 1)) & 0x3F;
0637     }
0638 
0639     if (!steps || !(val & 0x3E)) {
0640         /*
0641          * if offset is too small, set oscillation adjustment register
0642          * or time trimming register with its default value whic means
0643          * no increment or decrement. But for rs5c372[a|b], the XSL bit
0644          * should be kept unchanged.
0645          */
0646         if (rs5c->type == rtc_rs5c372a || rs5c->type == rtc_rs5c372b)
0647             val &= RS5C372_TRIM_XSL;
0648         else
0649             val = 0;
0650     }
0651 
0652     dev_dbg(&rs5c->client->dev, "write 0x%x for offset %ld\n", val, offset);
0653 
0654     if (i2c_smbus_write_byte_data(rs5c->client, addr, val) < 0) {
0655         dev_err(&rs5c->client->dev, "failed to write 0x%x to reg %d\n", val, addr);
0656         return -EIO;
0657     }
0658 
0659     rs5c->regs[RS5C372_REG_TRIM] = val;
0660 
0661     return 0;
0662 }
0663 
0664 static const struct rtc_class_ops rs5c372_rtc_ops = {
0665     .proc       = rs5c372_rtc_proc,
0666     .read_time  = rs5c372_rtc_read_time,
0667     .set_time   = rs5c372_rtc_set_time,
0668     .read_alarm = rs5c_read_alarm,
0669     .set_alarm  = rs5c_set_alarm,
0670     .alarm_irq_enable = rs5c_rtc_alarm_irq_enable,
0671     .ioctl      = rs5c372_ioctl,
0672     .read_offset    = rs5c372_read_offset,
0673     .set_offset     = rs5c372_set_offset,
0674 };
0675 
0676 #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS)
0677 
0678 static ssize_t rs5c372_sysfs_show_trim(struct device *dev,
0679                 struct device_attribute *attr, char *buf)
0680 {
0681     int err, trim;
0682 
0683     err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim);
0684     if (err)
0685         return err;
0686 
0687     return sprintf(buf, "%d\n", trim);
0688 }
0689 static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL);
0690 
0691 static ssize_t rs5c372_sysfs_show_osc(struct device *dev,
0692                 struct device_attribute *attr, char *buf)
0693 {
0694     int err, osc;
0695 
0696     err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL);
0697     if (err)
0698         return err;
0699 
0700     return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000);
0701 }
0702 static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL);
0703 
0704 static int rs5c_sysfs_register(struct device *dev)
0705 {
0706     int err;
0707 
0708     err = device_create_file(dev, &dev_attr_trim);
0709     if (err)
0710         return err;
0711     err = device_create_file(dev, &dev_attr_osc);
0712     if (err)
0713         device_remove_file(dev, &dev_attr_trim);
0714 
0715     return err;
0716 }
0717 
0718 static void rs5c_sysfs_unregister(struct device *dev)
0719 {
0720     device_remove_file(dev, &dev_attr_trim);
0721     device_remove_file(dev, &dev_attr_osc);
0722 }
0723 
0724 #else
0725 static int rs5c_sysfs_register(struct device *dev)
0726 {
0727     return 0;
0728 }
0729 
0730 static void rs5c_sysfs_unregister(struct device *dev)
0731 {
0732     /* nothing */
0733 }
0734 #endif  /* SYSFS */
0735 
0736 static struct i2c_driver rs5c372_driver;
0737 
0738 static int rs5c_oscillator_setup(struct rs5c372 *rs5c372)
0739 {
0740     unsigned char buf[2];
0741     int addr, i, ret = 0;
0742 
0743     addr   = RS5C_ADDR(RS5C_REG_CTRL1);
0744     buf[0] = rs5c372->regs[RS5C_REG_CTRL1];
0745     buf[1] = rs5c372->regs[RS5C_REG_CTRL2];
0746 
0747     switch (rs5c372->type) {
0748     case rtc_r2025sd:
0749         if (buf[1] & R2x2x_CTRL2_XSTP)
0750             return ret;
0751         break;
0752     case rtc_r2221tl:
0753         if (!(buf[1] & R2x2x_CTRL2_XSTP))
0754             return ret;
0755         break;
0756     default:
0757         if (!(buf[1] & RS5C_CTRL2_XSTP))
0758             return ret;
0759         break;
0760     }
0761 
0762     /* use 24hr mode */
0763     switch (rs5c372->type) {
0764     case rtc_rs5c372a:
0765     case rtc_rs5c372b:
0766         buf[1] |= RS5C372_CTRL2_24;
0767         rs5c372->time24 = 1;
0768         break;
0769     case rtc_r2025sd:
0770     case rtc_r2221tl:
0771     case rtc_rv5c386:
0772     case rtc_rv5c387a:
0773         buf[0] |= RV5C387_CTRL1_24;
0774         rs5c372->time24 = 1;
0775         break;
0776     default:
0777         /* impossible */
0778         break;
0779     }
0780 
0781     for (i = 0; i < sizeof(buf); i++) {
0782         addr = RS5C_ADDR(RS5C_REG_CTRL1 + i);
0783         ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]);
0784         if (unlikely(ret < 0))
0785             return ret;
0786     }
0787 
0788     rs5c372->regs[RS5C_REG_CTRL1] = buf[0];
0789     rs5c372->regs[RS5C_REG_CTRL2] = buf[1];
0790 
0791     return 0;
0792 }
0793 
0794 static int rs5c372_probe(struct i2c_client *client,
0795              const struct i2c_device_id *id)
0796 {
0797     int err = 0;
0798     int smbus_mode = 0;
0799     struct rs5c372 *rs5c372;
0800 
0801     dev_dbg(&client->dev, "%s\n", __func__);
0802 
0803     if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
0804             I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) {
0805         /*
0806          * If we don't have any master mode adapter, try breaking
0807          * it down in to the barest of capabilities.
0808          */
0809         if (i2c_check_functionality(client->adapter,
0810                 I2C_FUNC_SMBUS_BYTE_DATA |
0811                 I2C_FUNC_SMBUS_I2C_BLOCK))
0812             smbus_mode = 1;
0813         else {
0814             /* Still no good, give up */
0815             err = -ENODEV;
0816             goto exit;
0817         }
0818     }
0819 
0820     rs5c372 = devm_kzalloc(&client->dev, sizeof(struct rs5c372),
0821                 GFP_KERNEL);
0822     if (!rs5c372) {
0823         err = -ENOMEM;
0824         goto exit;
0825     }
0826 
0827     rs5c372->client = client;
0828     i2c_set_clientdata(client, rs5c372);
0829     if (client->dev.of_node)
0830         rs5c372->type = (enum rtc_type)
0831             of_device_get_match_data(&client->dev);
0832     else
0833         rs5c372->type = id->driver_data;
0834 
0835     /* we read registers 0x0f then 0x00-0x0f; skip the first one */
0836     rs5c372->regs = &rs5c372->buf[1];
0837     rs5c372->smbus = smbus_mode;
0838 
0839     err = rs5c_get_regs(rs5c372);
0840     if (err < 0)
0841         goto exit;
0842 
0843     /* clock may be set for am/pm or 24 hr time */
0844     switch (rs5c372->type) {
0845     case rtc_rs5c372a:
0846     case rtc_rs5c372b:
0847         /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b.
0848          * so does periodic irq, except some 327a modes.
0849          */
0850         if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24)
0851             rs5c372->time24 = 1;
0852         break;
0853     case rtc_r2025sd:
0854     case rtc_r2221tl:
0855     case rtc_rv5c386:
0856     case rtc_rv5c387a:
0857         if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24)
0858             rs5c372->time24 = 1;
0859         /* alarm uses ALARM_W; and nINTRB for alarm and periodic
0860          * irq, on both 386 and 387
0861          */
0862         break;
0863     default:
0864         dev_err(&client->dev, "unknown RTC type\n");
0865         goto exit;
0866     }
0867 
0868     /* if the oscillator lost power and no other software (like
0869      * the bootloader) set it up, do it here.
0870      *
0871      * The R2025S/D does this a little differently than the other
0872      * parts, so we special case that..
0873      */
0874     err = rs5c_oscillator_setup(rs5c372);
0875     if (unlikely(err < 0)) {
0876         dev_err(&client->dev, "setup error\n");
0877         goto exit;
0878     }
0879 
0880     dev_info(&client->dev, "%s found, %s\n",
0881             ({ char *s; switch (rs5c372->type) {
0882             case rtc_r2025sd:   s = "r2025sd"; break;
0883             case rtc_r2221tl:   s = "r2221tl"; break;
0884             case rtc_rs5c372a:  s = "rs5c372a"; break;
0885             case rtc_rs5c372b:  s = "rs5c372b"; break;
0886             case rtc_rv5c386:   s = "rv5c386"; break;
0887             case rtc_rv5c387a:  s = "rv5c387a"; break;
0888             default:        s = "chip"; break;
0889             }; s;}),
0890             rs5c372->time24 ? "24hr" : "am/pm"
0891             );
0892 
0893     /* REVISIT use client->irq to register alarm irq ... */
0894     rs5c372->rtc = devm_rtc_device_register(&client->dev,
0895                     rs5c372_driver.driver.name,
0896                     &rs5c372_rtc_ops, THIS_MODULE);
0897 
0898     if (IS_ERR(rs5c372->rtc)) {
0899         err = PTR_ERR(rs5c372->rtc);
0900         goto exit;
0901     }
0902 
0903     err = rs5c_sysfs_register(&client->dev);
0904     if (err)
0905         goto exit;
0906 
0907     return 0;
0908 
0909 exit:
0910     return err;
0911 }
0912 
0913 static int rs5c372_remove(struct i2c_client *client)
0914 {
0915     rs5c_sysfs_unregister(&client->dev);
0916     return 0;
0917 }
0918 
0919 static struct i2c_driver rs5c372_driver = {
0920     .driver     = {
0921         .name   = "rtc-rs5c372",
0922         .of_match_table = of_match_ptr(rs5c372_of_match),
0923     },
0924     .probe      = rs5c372_probe,
0925     .remove     = rs5c372_remove,
0926     .id_table   = rs5c372_id,
0927 };
0928 
0929 module_i2c_driver(rs5c372_driver);
0930 
0931 MODULE_AUTHOR(
0932         "Pavel Mironchik <pmironchik@optifacio.net>, "
0933         "Alessandro Zummo <a.zummo@towertech.it>, "
0934         "Paul Mundt <lethal@linux-sh.org>");
0935 MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver");
0936 MODULE_LICENSE("GPL");
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