drivers/rtc/rtc-pcf85363.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * drivers/rtc/rtc-pcf85363.c
0004  *
0005  * Driver for NXP PCF85363 real-time clock.
0006  *
0007  * Copyright (C) 2017 Eric Nelson
0008  */
0009 #include <linux/module.h>
0010 #include <linux/i2c.h>
0011 #include <linux/slab.h>
0012 #include <linux/rtc.h>
0013 #include <linux/init.h>
0014 #include <linux/err.h>
0015 #include <linux/errno.h>
0016 #include <linux/bcd.h>
0017 #include <linux/of.h>
0018 #include <linux/of_device.h>
0019 #include <linux/regmap.h>
0020
0021 /*
0022  * Date/Time registers
0023  */
0024 #define DT_100THS   0x00
0025 #define DT_SECS     0x01
0026 #define DT_MINUTES  0x02
0027 #define DT_HOURS    0x03
0028 #define DT_DAYS     0x04
0029 #define DT_WEEKDAYS 0x05
0030 #define DT_MONTHS   0x06
0031 #define DT_YEARS    0x07
0032
0033 /*
0034  * Alarm registers
0035  */
0036 #define DT_SECOND_ALM1  0x08
0037 #define DT_MINUTE_ALM1  0x09
0038 #define DT_HOUR_ALM1    0x0a
0039 #define DT_DAY_ALM1 0x0b
0040 #define DT_MONTH_ALM1   0x0c
0041 #define DT_MINUTE_ALM2  0x0d
0042 #define DT_HOUR_ALM2    0x0e
0043 #define DT_WEEKDAY_ALM2 0x0f
0044 #define DT_ALARM_EN 0x10
0045
0046 /*
0047  * Time stamp registers
0048  */
0049 #define DT_TIMESTAMP1   0x11
0050 #define DT_TIMESTAMP2   0x17
0051 #define DT_TIMESTAMP3   0x1d
0052 #define DT_TS_MODE  0x23
0053
0054 /*
0055  * control registers
0056  */
0057 #define CTRL_OFFSET 0x24
0058 #define CTRL_OSCILLATOR 0x25
0059 #define CTRL_BATTERY    0x26
0060 #define CTRL_PIN_IO 0x27
0061 #define CTRL_FUNCTION   0x28
0062 #define CTRL_INTA_EN    0x29
0063 #define CTRL_INTB_EN    0x2a
0064 #define CTRL_FLAGS  0x2b
0065 #define CTRL_RAMBYTE    0x2c
0066 #define CTRL_WDOG   0x2d
0067 #define CTRL_STOP_EN    0x2e
0068 #define CTRL_RESETS 0x2f
0069 #define CTRL_RAM    0x40
0070
0071 #define ALRM_SEC_A1E    BIT(0)
0072 #define ALRM_MIN_A1E    BIT(1)
0073 #define ALRM_HR_A1E BIT(2)
0074 #define ALRM_DAY_A1E    BIT(3)
0075 #define ALRM_MON_A1E    BIT(4)
0076 #define ALRM_MIN_A2E    BIT(5)
0077 #define ALRM_HR_A2E BIT(6)
0078 #define ALRM_DAY_A2E    BIT(7)
0079
0080 #define INT_WDIE    BIT(0)
0081 #define INT_BSIE    BIT(1)
0082 #define INT_TSRIE   BIT(2)
0083 #define INT_A2IE    BIT(3)
0084 #define INT_A1IE    BIT(4)
0085 #define INT_OIE     BIT(5)
0086 #define INT_PIE     BIT(6)
0087 #define INT_ILP     BIT(7)
0088
0089 #define FLAGS_TSR1F BIT(0)
0090 #define FLAGS_TSR2F BIT(1)
0091 #define FLAGS_TSR3F BIT(2)
0092 #define FLAGS_BSF   BIT(3)
0093 #define FLAGS_WDF   BIT(4)
0094 #define FLAGS_A1F   BIT(5)
0095 #define FLAGS_A2F   BIT(6)
0096 #define FLAGS_PIF   BIT(7)
0097
0098 #define PIN_IO_INTAPM   GENMASK(1, 0)
0099 #define PIN_IO_INTA_CLK 0
0100 #define PIN_IO_INTA_BAT 1
0101 #define PIN_IO_INTA_OUT 2
0102 #define PIN_IO_INTA_HIZ 3
0103
0104 #define STOP_EN_STOP    BIT(0)
0105
0106 #define RESET_CPR   0xa4
0107
0108 #define NVRAM_SIZE  0x40
0109
0110 struct pcf85363 {
0111     struct rtc_device   *rtc;
0112     struct regmap       *regmap;
0113 };
0114
0115 struct pcf85x63_config {
0116     struct regmap_config regmap;
0117     unsigned int num_nvram;
0118 };
0119
0120 static int pcf85363_rtc_read_time(struct device *dev, struct rtc_time *tm)
0121 {
0122     struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
0123     unsigned char buf[DT_YEARS + 1];
0124     int ret, len = sizeof(buf);
0125
0126     /* read the RTC date and time registers all at once */
0127     ret = regmap_bulk_read(pcf85363->regmap, DT_100THS, buf, len);
0128     if (ret) {
0129         dev_err(dev, "%s: error %d\n", __func__, ret);
0130         return ret;
0131     }
0132
0133     tm->tm_year = bcd2bin(buf[DT_YEARS]);
0134     /* adjust for 1900 base of rtc_time */
0135     tm->tm_year += 100;
0136
0137     tm->tm_wday = buf[DT_WEEKDAYS] & 7;
0138     buf[DT_SECS] &= 0x7F;
0139     tm->tm_sec = bcd2bin(buf[DT_SECS]);
0140     buf[DT_MINUTES] &= 0x7F;
0141     tm->tm_min = bcd2bin(buf[DT_MINUTES]);
0142     tm->tm_hour = bcd2bin(buf[DT_HOURS]);
0143     tm->tm_mday = bcd2bin(buf[DT_DAYS]);
0144     tm->tm_mon = bcd2bin(buf[DT_MONTHS]) - 1;
0145
0146     return 0;
0147 }
0148
0149 static int pcf85363_rtc_set_time(struct device *dev, struct rtc_time *tm)
0150 {
0151     struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
0152     unsigned char tmp[11];
0153     unsigned char *buf = &tmp[2];
0154     int ret;
0155
0156     tmp[0] = STOP_EN_STOP;
0157     tmp[1] = RESET_CPR;
0158
0159     buf[DT_100THS] = 0;
0160     buf[DT_SECS] = bin2bcd(tm->tm_sec);
0161     buf[DT_MINUTES] = bin2bcd(tm->tm_min);
0162     buf[DT_HOURS] = bin2bcd(tm->tm_hour);
0163     buf[DT_DAYS] = bin2bcd(tm->tm_mday);
0164     buf[DT_WEEKDAYS] = tm->tm_wday;
0165     buf[DT_MONTHS] = bin2bcd(tm->tm_mon + 1);
0166     buf[DT_YEARS] = bin2bcd(tm->tm_year % 100);
0167
0168     ret = regmap_bulk_write(pcf85363->regmap, CTRL_STOP_EN,
0169                 tmp, 2);
0170     if (ret)
0171         return ret;
0172
0173     ret = regmap_bulk_write(pcf85363->regmap, DT_100THS,
0174                 buf, sizeof(tmp) - 2);
0175     if (ret)
0176         return ret;
0177
0178     return regmap_write(pcf85363->regmap, CTRL_STOP_EN, 0);
0179 }
0180
0181 static int pcf85363_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0182 {
0183     struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
0184     unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1];
0185     unsigned int val;
0186     int ret;
0187
0188     ret = regmap_bulk_read(pcf85363->regmap, DT_SECOND_ALM1, buf,
0189                    sizeof(buf));
0190     if (ret)
0191         return ret;
0192
0193     alrm->time.tm_sec = bcd2bin(buf[0]);
0194     alrm->time.tm_min = bcd2bin(buf[1]);
0195     alrm->time.tm_hour = bcd2bin(buf[2]);
0196     alrm->time.tm_mday = bcd2bin(buf[3]);
0197     alrm->time.tm_mon = bcd2bin(buf[4]) - 1;
0198
0199     ret = regmap_read(pcf85363->regmap, CTRL_INTA_EN, &val);
0200     if (ret)
0201         return ret;
0202
0203     alrm->enabled =  !!(val & INT_A1IE);
0204
0205     return 0;
0206 }
0207
0208 static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 *pcf85363, unsigned
0209                       int enabled)
0210 {
0211     unsigned int alarm_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E |
0212                    ALRM_DAY_A1E | ALRM_MON_A1E;
0213     int ret;
0214
0215     ret = regmap_update_bits(pcf85363->regmap, DT_ALARM_EN, alarm_flags,
0216                  enabled ? alarm_flags : 0);
0217     if (ret)
0218         return ret;
0219
0220     ret = regmap_update_bits(pcf85363->regmap, CTRL_INTA_EN,
0221                  INT_A1IE, enabled ? INT_A1IE : 0);
0222
0223     if (ret || enabled)
0224         return ret;
0225
0226     /* clear current flags */
0227     return regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0);
0228 }
0229
0230 static int pcf85363_rtc_alarm_irq_enable(struct device *dev,
0231                      unsigned int enabled)
0232 {
0233     struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
0234
0235     return _pcf85363_rtc_alarm_irq_enable(pcf85363, enabled);
0236 }
0237
0238 static int pcf85363_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0239 {
0240     struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
0241     unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1];
0242     int ret;
0243
0244     buf[0] = bin2bcd(alrm->time.tm_sec);
0245     buf[1] = bin2bcd(alrm->time.tm_min);
0246     buf[2] = bin2bcd(alrm->time.tm_hour);
0247     buf[3] = bin2bcd(alrm->time.tm_mday);
0248     buf[4] = bin2bcd(alrm->time.tm_mon + 1);
0249
0250     /*
0251      * Disable the alarm interrupt before changing the value to avoid
0252      * spurious interrupts
0253      */
0254     ret = _pcf85363_rtc_alarm_irq_enable(pcf85363, 0);
0255     if (ret)
0256         return ret;
0257
0258     ret = regmap_bulk_write(pcf85363->regmap, DT_SECOND_ALM1, buf,
0259                 sizeof(buf));
0260     if (ret)
0261         return ret;
0262
0263     return _pcf85363_rtc_alarm_irq_enable(pcf85363, alrm->enabled);
0264 }
0265
0266 static irqreturn_t pcf85363_rtc_handle_irq(int irq, void *dev_id)
0267 {
0268     struct pcf85363 *pcf85363 = i2c_get_clientdata(dev_id);
0269     unsigned int flags;
0270     int err;
0271
0272     err = regmap_read(pcf85363->regmap, CTRL_FLAGS, &flags);
0273     if (err)
0274         return IRQ_NONE;
0275
0276     if (flags & FLAGS_A1F) {
0277         rtc_update_irq(pcf85363->rtc, 1, RTC_IRQF | RTC_AF);
0278         regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0);
0279         return IRQ_HANDLED;
0280     }
0281
0282     return IRQ_NONE;
0283 }
0284
0285 static const struct rtc_class_ops rtc_ops = {
0286     .read_time  = pcf85363_rtc_read_time,
0287     .set_time   = pcf85363_rtc_set_time,
0288     .read_alarm = pcf85363_rtc_read_alarm,
0289     .set_alarm  = pcf85363_rtc_set_alarm,
0290     .alarm_irq_enable = pcf85363_rtc_alarm_irq_enable,
0291 };
0292
0293 static int pcf85363_nvram_read(void *priv, unsigned int offset, void *val,
0294                    size_t bytes)
0295 {
0296     struct pcf85363 *pcf85363 = priv;
0297
0298     return regmap_bulk_read(pcf85363->regmap, CTRL_RAM + offset,
0299                 val, bytes);
0300 }
0301
0302 static int pcf85363_nvram_write(void *priv, unsigned int offset, void *val,
0303                 size_t bytes)
0304 {
0305     struct pcf85363 *pcf85363 = priv;
0306
0307     return regmap_bulk_write(pcf85363->regmap, CTRL_RAM + offset,
0308                  val, bytes);
0309 }
0310
0311 static int pcf85x63_nvram_read(void *priv, unsigned int offset, void *val,
0312                    size_t bytes)
0313 {
0314     struct pcf85363 *pcf85363 = priv;
0315     unsigned int tmp_val;
0316     int ret;
0317
0318     ret = regmap_read(pcf85363->regmap, CTRL_RAMBYTE, &tmp_val);
0319     (*(unsigned char *) val) = (unsigned char) tmp_val;
0320
0321     return ret;
0322 }
0323
0324 static int pcf85x63_nvram_write(void *priv, unsigned int offset, void *val,
0325                 size_t bytes)
0326 {
0327     struct pcf85363 *pcf85363 = priv;
0328     unsigned char tmp_val;
0329
0330     tmp_val = *((unsigned char *)val);
0331     return regmap_write(pcf85363->regmap, CTRL_RAMBYTE,
0332                 (unsigned int)tmp_val);
0333 }
0334
0335 static const struct pcf85x63_config pcf_85263_config = {
0336     .regmap = {
0337         .reg_bits = 8,
0338         .val_bits = 8,
0339         .max_register = 0x2f,
0340     },
0341     .num_nvram = 1
0342 };
0343
0344 static const struct pcf85x63_config pcf_85363_config = {
0345     .regmap = {
0346         .reg_bits = 8,
0347         .val_bits = 8,
0348         .max_register = 0x7f,
0349     },
0350     .num_nvram = 2
0351 };
0352
0353 static int pcf85363_probe(struct i2c_client *client)
0354 {
0355     struct pcf85363 *pcf85363;
0356     const struct pcf85x63_config *config = &pcf_85363_config;
0357     const void *data = of_device_get_match_data(&client->dev);
0358     static struct nvmem_config nvmem_cfg[] = {
0359         {
0360             .name = "pcf85x63-",
0361             .word_size = 1,
0362             .stride = 1,
0363             .size = 1,
0364             .reg_read = pcf85x63_nvram_read,
0365             .reg_write = pcf85x63_nvram_write,
0366         }, {
0367             .name = "pcf85363-",
0368             .word_size = 1,
0369             .stride = 1,
0370             .size = NVRAM_SIZE,
0371             .reg_read = pcf85363_nvram_read,
0372             .reg_write = pcf85363_nvram_write,
0373         },
0374     };
0375     int ret, i;
0376
0377     if (data)
0378         config = data;
0379
0380     pcf85363 = devm_kzalloc(&client->dev, sizeof(struct pcf85363),
0381                 GFP_KERNEL);
0382     if (!pcf85363)
0383         return -ENOMEM;
0384
0385     pcf85363->regmap = devm_regmap_init_i2c(client, &config->regmap);
0386     if (IS_ERR(pcf85363->regmap)) {
0387         dev_err(&client->dev, "regmap allocation failed\n");
0388         return PTR_ERR(pcf85363->regmap);
0389     }
0390
0391     i2c_set_clientdata(client, pcf85363);
0392
0393     pcf85363->rtc = devm_rtc_allocate_device(&client->dev);
0394     if (IS_ERR(pcf85363->rtc))
0395         return PTR_ERR(pcf85363->rtc);
0396
0397     pcf85363->rtc->ops = &rtc_ops;
0398     pcf85363->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
0399     pcf85363->rtc->range_max = RTC_TIMESTAMP_END_2099;
0400     clear_bit(RTC_FEATURE_ALARM, pcf85363->rtc->features);
0401
0402     if (client->irq > 0) {
0403         regmap_write(pcf85363->regmap, CTRL_FLAGS, 0);
0404         regmap_update_bits(pcf85363->regmap, CTRL_PIN_IO,
0405                    PIN_IO_INTA_OUT, PIN_IO_INTAPM);
0406         ret = devm_request_threaded_irq(&client->dev, client->irq,
0407                         NULL, pcf85363_rtc_handle_irq,
0408                         IRQF_TRIGGER_LOW | IRQF_ONESHOT,
0409                         "pcf85363", client);
0410         if (ret)
0411             dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
0412         else
0413             set_bit(RTC_FEATURE_ALARM, pcf85363->rtc->features);
0414     }
0415
0416     ret = devm_rtc_register_device(pcf85363->rtc);
0417
0418     for (i = 0; i < config->num_nvram; i++) {
0419         nvmem_cfg[i].priv = pcf85363;
0420         devm_rtc_nvmem_register(pcf85363->rtc, &nvmem_cfg[i]);
0421     }
0422
0423     return ret;
0424 }
0425
0426 static const __maybe_unused struct of_device_id dev_ids[] = {
0427     { .compatible = "nxp,pcf85263", .data = &pcf_85263_config },
0428     { .compatible = "nxp,pcf85363", .data = &pcf_85363_config },
0429     { /* sentinel */ }
0430 };
0431 MODULE_DEVICE_TABLE(of, dev_ids);
0432
0433 static struct i2c_driver pcf85363_driver = {
0434     .driver = {
0435         .name   = "pcf85363",
0436         .of_match_table = of_match_ptr(dev_ids),
0437     },
0438     .probe_new = pcf85363_probe,
0439 };
0440
0441 module_i2c_driver(pcf85363_driver);
0442
0443 MODULE_AUTHOR("Eric Nelson");
0444 MODULE_DESCRIPTION("pcf85263/pcf85363 I2C RTC driver");
0445 MODULE_LICENSE("GPL");