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0006 #include <linux/bcd.h>
0007 #include <linux/bitfield.h>
0008 #include <linux/i2c.h>
0009 #include <linux/module.h>
0010 #include <linux/regmap.h>
0011 #include <linux/rtc.h>
0012 #include <linux/of.h>
0013 #include <linux/pm_wakeirq.h>
0014
0015 #define PCF8523_REG_CONTROL1 0x00
0016 #define PCF8523_CONTROL1_CAP_SEL BIT(7)
0017 #define PCF8523_CONTROL1_STOP BIT(5)
0018 #define PCF8523_CONTROL1_AIE BIT(1)
0019
0020 #define PCF8523_REG_CONTROL2 0x01
0021 #define PCF8523_CONTROL2_AF BIT(3)
0022
0023 #define PCF8523_REG_CONTROL3 0x02
0024 #define PCF8523_CONTROL3_PM GENMASK(7,5)
0025 #define PCF8523_PM_STANDBY 0x7
0026 #define PCF8523_CONTROL3_BLF BIT(2)
0027 #define PCF8523_CONTROL3_BSF BIT(3)
0028
0029 #define PCF8523_REG_SECONDS 0x03
0030 #define PCF8523_SECONDS_OS BIT(7)
0031
0032 #define PCF8523_REG_MINUTES 0x04
0033 #define PCF8523_REG_HOURS 0x05
0034 #define PCF8523_REG_DAYS 0x06
0035 #define PCF8523_REG_WEEKDAYS 0x07
0036 #define PCF8523_REG_MONTHS 0x08
0037 #define PCF8523_REG_YEARS 0x09
0038
0039 #define PCF8523_REG_MINUTE_ALARM 0x0a
0040 #define PCF8523_REG_HOUR_ALARM 0x0b
0041 #define PCF8523_REG_DAY_ALARM 0x0c
0042 #define PCF8523_REG_WEEKDAY_ALARM 0x0d
0043 #define ALARM_DIS BIT(7)
0044
0045 #define PCF8523_REG_OFFSET 0x0e
0046 #define PCF8523_OFFSET_MODE BIT(7)
0047
0048 #define PCF8523_TMR_CLKOUT_CTRL 0x0f
0049
0050 struct pcf8523 {
0051 struct rtc_device *rtc;
0052 struct regmap *regmap;
0053 };
0054
0055 static int pcf8523_load_capacitance(struct pcf8523 *pcf8523, struct device_node *node)
0056 {
0057 u32 load, value = 0;
0058
0059 load = 12500;
0060 of_property_read_u32(node, "quartz-load-femtofarads", &load);
0061
0062 switch (load) {
0063 default:
0064 dev_warn(&pcf8523->rtc->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 12500",
0065 load);
0066 fallthrough;
0067 case 12500:
0068 value |= PCF8523_CONTROL1_CAP_SEL;
0069 break;
0070 case 7000:
0071 break;
0072 }
0073
0074 return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
0075 PCF8523_CONTROL1_CAP_SEL, value);
0076 }
0077
0078 static irqreturn_t pcf8523_irq(int irq, void *dev_id)
0079 {
0080 struct pcf8523 *pcf8523 = dev_id;
0081 u32 value;
0082 int err;
0083
0084 err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL2, &value);
0085 if (err < 0)
0086 return IRQ_HANDLED;
0087
0088 if (value & PCF8523_CONTROL2_AF) {
0089 value &= ~PCF8523_CONTROL2_AF;
0090 regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL2, value);
0091 rtc_update_irq(pcf8523->rtc, 1, RTC_IRQF | RTC_AF);
0092
0093 return IRQ_HANDLED;
0094 }
0095
0096 return IRQ_NONE;
0097 }
0098
0099 static int pcf8523_rtc_read_time(struct device *dev, struct rtc_time *tm)
0100 {
0101 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
0102 u8 regs[7];
0103 int err;
0104
0105 err = regmap_bulk_read(pcf8523->regmap, PCF8523_REG_SECONDS, regs,
0106 sizeof(regs));
0107 if (err < 0)
0108 return err;
0109
0110 if (regs[0] & PCF8523_SECONDS_OS)
0111 return -EINVAL;
0112
0113 tm->tm_sec = bcd2bin(regs[0] & 0x7f);
0114 tm->tm_min = bcd2bin(regs[1] & 0x7f);
0115 tm->tm_hour = bcd2bin(regs[2] & 0x3f);
0116 tm->tm_mday = bcd2bin(regs[3] & 0x3f);
0117 tm->tm_wday = regs[4] & 0x7;
0118 tm->tm_mon = bcd2bin(regs[5] & 0x1f) - 1;
0119 tm->tm_year = bcd2bin(regs[6]) + 100;
0120
0121 return 0;
0122 }
0123
0124 static int pcf8523_rtc_set_time(struct device *dev, struct rtc_time *tm)
0125 {
0126 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
0127 u8 regs[7];
0128 int err;
0129
0130 err = regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
0131 PCF8523_CONTROL1_STOP, PCF8523_CONTROL1_STOP);
0132 if (err < 0)
0133 return err;
0134
0135
0136 regs[0] = bin2bcd(tm->tm_sec);
0137 regs[1] = bin2bcd(tm->tm_min);
0138 regs[2] = bin2bcd(tm->tm_hour);
0139 regs[3] = bin2bcd(tm->tm_mday);
0140 regs[4] = tm->tm_wday;
0141 regs[5] = bin2bcd(tm->tm_mon + 1);
0142 regs[6] = bin2bcd(tm->tm_year - 100);
0143
0144 err = regmap_bulk_write(pcf8523->regmap, PCF8523_REG_SECONDS, regs,
0145 sizeof(regs));
0146 if (err < 0) {
0147
0148
0149
0150
0151
0152 regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
0153 PCF8523_CONTROL1_STOP, 0);
0154 return err;
0155 }
0156
0157 return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
0158 PCF8523_CONTROL1_STOP, 0);
0159 }
0160
0161 static int pcf8523_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *tm)
0162 {
0163 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
0164 u8 regs[4];
0165 u32 value;
0166 int err;
0167
0168 err = regmap_bulk_read(pcf8523->regmap, PCF8523_REG_MINUTE_ALARM, regs,
0169 sizeof(regs));
0170 if (err < 0)
0171 return err;
0172
0173 tm->time.tm_sec = 0;
0174 tm->time.tm_min = bcd2bin(regs[0] & 0x7F);
0175 tm->time.tm_hour = bcd2bin(regs[1] & 0x3F);
0176 tm->time.tm_mday = bcd2bin(regs[2] & 0x3F);
0177 tm->time.tm_wday = bcd2bin(regs[3] & 0x7);
0178
0179 err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL1, &value);
0180 if (err < 0)
0181 return err;
0182 tm->enabled = !!(value & PCF8523_CONTROL1_AIE);
0183
0184 err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL2, &value);
0185 if (err < 0)
0186 return err;
0187 tm->pending = !!(value & PCF8523_CONTROL2_AF);
0188
0189 return 0;
0190 }
0191
0192 static int pcf8523_irq_enable(struct device *dev, unsigned int enabled)
0193 {
0194 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
0195
0196 return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
0197 PCF8523_CONTROL1_AIE, enabled ?
0198 PCF8523_CONTROL1_AIE : 0);
0199 }
0200
0201 static int pcf8523_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *tm)
0202 {
0203 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
0204 u8 regs[5];
0205 int err;
0206
0207 err = pcf8523_irq_enable(dev, 0);
0208 if (err)
0209 return err;
0210
0211 err = regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL2, 0);
0212 if (err < 0)
0213 return err;
0214
0215 regs[0] = bin2bcd(tm->time.tm_min);
0216 regs[1] = bin2bcd(tm->time.tm_hour);
0217 regs[2] = bin2bcd(tm->time.tm_mday);
0218 regs[3] = ALARM_DIS;
0219
0220 err = regmap_bulk_write(pcf8523->regmap, PCF8523_REG_MINUTE_ALARM, regs,
0221 sizeof(regs));
0222 if (err < 0)
0223 return err;
0224
0225 if (tm->enabled)
0226 return pcf8523_irq_enable(dev, tm->enabled);
0227
0228 return 0;
0229 }
0230
0231 static int pcf8523_param_get(struct device *dev, struct rtc_param *param)
0232 {
0233 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
0234 int ret;
0235 u32 value;
0236
0237 switch(param->param) {
0238
0239 case RTC_PARAM_BACKUP_SWITCH_MODE:
0240 ret = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
0241 if (ret < 0)
0242 return ret;
0243
0244 value = FIELD_GET(PCF8523_CONTROL3_PM, value);
0245
0246 switch(value) {
0247 case 0x0:
0248 case 0x4:
0249 param->uvalue = RTC_BSM_LEVEL;
0250 break;
0251 case 0x1:
0252 case 0x5:
0253 param->uvalue = RTC_BSM_DIRECT;
0254 break;
0255 case PCF8523_PM_STANDBY:
0256 param->uvalue = RTC_BSM_STANDBY;
0257 break;
0258 default:
0259 param->uvalue = RTC_BSM_DISABLED;
0260 }
0261
0262 break;
0263
0264 default:
0265 return -EINVAL;
0266 }
0267
0268 return 0;
0269 }
0270
0271 static int pcf8523_param_set(struct device *dev, struct rtc_param *param)
0272 {
0273 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
0274 u8 mode;
0275
0276 switch(param->param) {
0277 case RTC_PARAM_BACKUP_SWITCH_MODE:
0278 switch (param->uvalue) {
0279 case RTC_BSM_DISABLED:
0280 mode = 0x2;
0281 break;
0282 case RTC_BSM_DIRECT:
0283 mode = 0x1;
0284 break;
0285 case RTC_BSM_LEVEL:
0286 mode = 0x0;
0287 break;
0288 case RTC_BSM_STANDBY:
0289 mode = PCF8523_PM_STANDBY;
0290 break;
0291 default:
0292 return -EINVAL;
0293 }
0294
0295 return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL3,
0296 PCF8523_CONTROL3_PM,
0297 FIELD_PREP(PCF8523_CONTROL3_PM, mode));
0298
0299 break;
0300
0301 default:
0302 return -EINVAL;
0303 }
0304
0305 return 0;
0306 }
0307
0308 static int pcf8523_rtc_ioctl(struct device *dev, unsigned int cmd,
0309 unsigned long arg)
0310 {
0311 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
0312 unsigned int flags = 0;
0313 u32 value;
0314 int ret;
0315
0316 switch (cmd) {
0317 case RTC_VL_READ:
0318 ret = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
0319 if (ret < 0)
0320 return ret;
0321
0322 if (value & PCF8523_CONTROL3_BLF)
0323 flags |= RTC_VL_BACKUP_LOW;
0324
0325 ret = regmap_read(pcf8523->regmap, PCF8523_REG_SECONDS, &value);
0326 if (ret < 0)
0327 return ret;
0328
0329 if (value & PCF8523_SECONDS_OS)
0330 flags |= RTC_VL_DATA_INVALID;
0331
0332 return put_user(flags, (unsigned int __user *)arg);
0333
0334 default:
0335 return -ENOIOCTLCMD;
0336 }
0337 }
0338
0339 static int pcf8523_rtc_read_offset(struct device *dev, long *offset)
0340 {
0341 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
0342 int err;
0343 u32 value;
0344 s8 val;
0345
0346 err = regmap_read(pcf8523->regmap, PCF8523_REG_OFFSET, &value);
0347 if (err < 0)
0348 return err;
0349
0350
0351 val = value << 1;
0352 *offset = (value & PCF8523_OFFSET_MODE ? 4069 : 4340) * (val >> 1);
0353
0354 return 0;
0355 }
0356
0357 static int pcf8523_rtc_set_offset(struct device *dev, long offset)
0358 {
0359 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
0360 long reg_m0, reg_m1;
0361 u32 value;
0362
0363 reg_m0 = clamp(DIV_ROUND_CLOSEST(offset, 4340), -64L, 63L);
0364 reg_m1 = clamp(DIV_ROUND_CLOSEST(offset, 4069), -64L, 63L);
0365
0366 if (abs(reg_m0 * 4340 - offset) < abs(reg_m1 * 4069 - offset))
0367 value = reg_m0 & 0x7f;
0368 else
0369 value = (reg_m1 & 0x7f) | PCF8523_OFFSET_MODE;
0370
0371 return regmap_write(pcf8523->regmap, PCF8523_REG_OFFSET, value);
0372 }
0373
0374 static const struct rtc_class_ops pcf8523_rtc_ops = {
0375 .read_time = pcf8523_rtc_read_time,
0376 .set_time = pcf8523_rtc_set_time,
0377 .read_alarm = pcf8523_rtc_read_alarm,
0378 .set_alarm = pcf8523_rtc_set_alarm,
0379 .alarm_irq_enable = pcf8523_irq_enable,
0380 .ioctl = pcf8523_rtc_ioctl,
0381 .read_offset = pcf8523_rtc_read_offset,
0382 .set_offset = pcf8523_rtc_set_offset,
0383 .param_get = pcf8523_param_get,
0384 .param_set = pcf8523_param_set,
0385 };
0386
0387 static const struct regmap_config regmap_config = {
0388 .reg_bits = 8,
0389 .val_bits = 8,
0390 .max_register = 0x13,
0391 };
0392
0393 static int pcf8523_probe(struct i2c_client *client)
0394 {
0395 struct pcf8523 *pcf8523;
0396 struct rtc_device *rtc;
0397 bool wakeup_source = false;
0398 u32 value;
0399 int err;
0400
0401 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
0402 return -ENODEV;
0403
0404 pcf8523 = devm_kzalloc(&client->dev, sizeof(struct pcf8523), GFP_KERNEL);
0405 if (!pcf8523)
0406 return -ENOMEM;
0407
0408 pcf8523->regmap = devm_regmap_init_i2c(client, ®map_config);
0409 if (IS_ERR(pcf8523->regmap))
0410 return PTR_ERR(pcf8523->regmap);
0411
0412 i2c_set_clientdata(client, pcf8523);
0413
0414 rtc = devm_rtc_allocate_device(&client->dev);
0415 if (IS_ERR(rtc))
0416 return PTR_ERR(rtc);
0417 pcf8523->rtc = rtc;
0418
0419 err = pcf8523_load_capacitance(pcf8523, client->dev.of_node);
0420 if (err < 0)
0421 dev_warn(&client->dev, "failed to set xtal load capacitance: %d",
0422 err);
0423
0424 err = regmap_read(pcf8523->regmap, PCF8523_REG_SECONDS, &value);
0425 if (err < 0)
0426 return err;
0427
0428 if (value & PCF8523_SECONDS_OS) {
0429 err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
0430 if (err < 0)
0431 return err;
0432
0433 if (FIELD_GET(PCF8523_CONTROL3_PM, value) == PCF8523_PM_STANDBY) {
0434 err = regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL3,
0435 value & ~PCF8523_CONTROL3_PM);
0436 if (err < 0)
0437 return err;
0438 }
0439 }
0440
0441 rtc->ops = &pcf8523_rtc_ops;
0442 rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
0443 rtc->range_max = RTC_TIMESTAMP_END_2099;
0444 set_bit(RTC_FEATURE_ALARM_RES_MINUTE, rtc->features);
0445 clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, rtc->features);
0446
0447 if (client->irq > 0) {
0448 err = regmap_write(pcf8523->regmap, PCF8523_TMR_CLKOUT_CTRL, 0x38);
0449 if (err < 0)
0450 return err;
0451
0452 err = devm_request_threaded_irq(&client->dev, client->irq,
0453 NULL, pcf8523_irq,
0454 IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_LOW,
0455 dev_name(&rtc->dev), pcf8523);
0456 if (err)
0457 return err;
0458
0459 dev_pm_set_wake_irq(&client->dev, client->irq);
0460 }
0461
0462 wakeup_source = of_property_read_bool(client->dev.of_node, "wakeup-source");
0463 if (client->irq > 0 || wakeup_source)
0464 device_init_wakeup(&client->dev, true);
0465
0466 return devm_rtc_register_device(rtc);
0467 }
0468
0469 static const struct i2c_device_id pcf8523_id[] = {
0470 { "pcf8523", 0 },
0471 { }
0472 };
0473 MODULE_DEVICE_TABLE(i2c, pcf8523_id);
0474
0475 static const struct of_device_id pcf8523_of_match[] = {
0476 { .compatible = "nxp,pcf8523" },
0477 { .compatible = "microcrystal,rv8523" },
0478 { }
0479 };
0480 MODULE_DEVICE_TABLE(of, pcf8523_of_match);
0481
0482 static struct i2c_driver pcf8523_driver = {
0483 .driver = {
0484 .name = "rtc-pcf8523",
0485 .of_match_table = pcf8523_of_match,
0486 },
0487 .probe_new = pcf8523_probe,
0488 .id_table = pcf8523_id,
0489 };
0490 module_i2c_driver(pcf8523_driver);
0491
0492 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
0493 MODULE_DESCRIPTION("NXP PCF8523 RTC driver");
0494 MODULE_LICENSE("GPL v2");