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0008 #include <linux/clk.h>
0009 #include <linux/interrupt.h>
0010 #include <linux/module.h>
0011 #include <linux/of_address.h>
0012 #include <linux/of_device.h>
0013 #include <linux/platform_device.h>
0014 #include <linux/rtc.h>
0015
0016 #define MTK_RTC_DEV KBUILD_MODNAME
0017
0018 #define MTK_RTC_PWRCHK1 0x4
0019 #define RTC_PWRCHK1_MAGIC 0xc6
0020
0021 #define MTK_RTC_PWRCHK2 0x8
0022 #define RTC_PWRCHK2_MAGIC 0x9a
0023
0024 #define MTK_RTC_KEY 0xc
0025 #define RTC_KEY_MAGIC 0x59
0026
0027 #define MTK_RTC_PROT1 0x10
0028 #define RTC_PROT1_MAGIC 0xa3
0029
0030 #define MTK_RTC_PROT2 0x14
0031 #define RTC_PROT2_MAGIC 0x57
0032
0033 #define MTK_RTC_PROT3 0x18
0034 #define RTC_PROT3_MAGIC 0x67
0035
0036 #define MTK_RTC_PROT4 0x1c
0037 #define RTC_PROT4_MAGIC 0xd2
0038
0039 #define MTK_RTC_CTL 0x20
0040 #define RTC_RC_STOP BIT(0)
0041
0042 #define MTK_RTC_DEBNCE 0x2c
0043 #define RTC_DEBNCE_MASK GENMASK(2, 0)
0044
0045 #define MTK_RTC_INT 0x30
0046 #define RTC_INT_AL_STA BIT(4)
0047
0048
0049
0050
0051
0052 #define MTK_RTC_TREG(_t, _f) (0x40 + (0x4 * (_f)) + ((_t) * 0x20))
0053
0054 #define MTK_RTC_AL_CTL 0x7c
0055 #define RTC_AL_EN BIT(0)
0056 #define RTC_AL_ALL GENMASK(7, 0)
0057
0058
0059
0060
0061
0062 #define MTK_RTC_TM_YR_OFFSET 100
0063
0064
0065
0066
0067
0068
0069 #define MTK_RTC_TM_YR_L (MTK_RTC_TM_YR_OFFSET + 1)
0070
0071
0072
0073
0074
0075 #define MTK_RTC_HW_YR_LIMIT 99
0076
0077
0078 #define MTK_RTC_TM_YR_H (MTK_RTC_TM_YR_OFFSET + MTK_RTC_HW_YR_LIMIT)
0079
0080
0081 #define MTK_RTC_TM_YR_VALID(_y) ((_y) >= MTK_RTC_TM_YR_L && \
0082 (_y) <= MTK_RTC_TM_YR_H)
0083
0084
0085 enum {
0086 MTK_TC,
0087 MTK_AL,
0088 };
0089
0090
0091 enum {
0092 MTK_YEA,
0093 MTK_MON,
0094 MTK_DOM,
0095 MTK_DOW,
0096 MTK_HOU,
0097 MTK_MIN,
0098 MTK_SEC
0099 };
0100
0101 struct mtk_rtc {
0102 struct rtc_device *rtc;
0103 void __iomem *base;
0104 int irq;
0105 struct clk *clk;
0106 };
0107
0108 static void mtk_w32(struct mtk_rtc *rtc, u32 reg, u32 val)
0109 {
0110 writel_relaxed(val, rtc->base + reg);
0111 }
0112
0113 static u32 mtk_r32(struct mtk_rtc *rtc, u32 reg)
0114 {
0115 return readl_relaxed(rtc->base + reg);
0116 }
0117
0118 static void mtk_rmw(struct mtk_rtc *rtc, u32 reg, u32 mask, u32 set)
0119 {
0120 u32 val;
0121
0122 val = mtk_r32(rtc, reg);
0123 val &= ~mask;
0124 val |= set;
0125 mtk_w32(rtc, reg, val);
0126 }
0127
0128 static void mtk_set(struct mtk_rtc *rtc, u32 reg, u32 val)
0129 {
0130 mtk_rmw(rtc, reg, 0, val);
0131 }
0132
0133 static void mtk_clr(struct mtk_rtc *rtc, u32 reg, u32 val)
0134 {
0135 mtk_rmw(rtc, reg, val, 0);
0136 }
0137
0138 static void mtk_rtc_hw_init(struct mtk_rtc *hw)
0139 {
0140
0141 mtk_w32(hw, MTK_RTC_PWRCHK1, RTC_PWRCHK1_MAGIC);
0142 mtk_w32(hw, MTK_RTC_PWRCHK2, RTC_PWRCHK2_MAGIC);
0143 mtk_w32(hw, MTK_RTC_KEY, RTC_KEY_MAGIC);
0144 mtk_w32(hw, MTK_RTC_PROT1, RTC_PROT1_MAGIC);
0145 mtk_w32(hw, MTK_RTC_PROT2, RTC_PROT2_MAGIC);
0146 mtk_w32(hw, MTK_RTC_PROT3, RTC_PROT3_MAGIC);
0147 mtk_w32(hw, MTK_RTC_PROT4, RTC_PROT4_MAGIC);
0148 mtk_rmw(hw, MTK_RTC_DEBNCE, RTC_DEBNCE_MASK, 0);
0149 mtk_clr(hw, MTK_RTC_CTL, RTC_RC_STOP);
0150 }
0151
0152 static void mtk_rtc_get_alarm_or_time(struct mtk_rtc *hw, struct rtc_time *tm,
0153 int time_alarm)
0154 {
0155 u32 year, mon, mday, wday, hour, min, sec;
0156
0157
0158
0159
0160
0161
0162
0163 do {
0164 sec = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_SEC));
0165 min = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_MIN));
0166 hour = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_HOU));
0167 wday = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_DOW));
0168 mday = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_DOM));
0169 mon = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_MON));
0170 year = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_YEA));
0171 } while (sec != mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_SEC)));
0172
0173 tm->tm_sec = sec;
0174 tm->tm_min = min;
0175 tm->tm_hour = hour;
0176 tm->tm_wday = wday;
0177 tm->tm_mday = mday;
0178 tm->tm_mon = mon - 1;
0179
0180
0181 tm->tm_year = year + MTK_RTC_TM_YR_OFFSET;
0182 }
0183
0184 static void mtk_rtc_set_alarm_or_time(struct mtk_rtc *hw, struct rtc_time *tm,
0185 int time_alarm)
0186 {
0187 u32 year;
0188
0189
0190 year = tm->tm_year - MTK_RTC_TM_YR_OFFSET;
0191
0192 mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_YEA), year);
0193 mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_MON), tm->tm_mon + 1);
0194 mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_DOW), tm->tm_wday);
0195 mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_DOM), tm->tm_mday);
0196 mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_HOU), tm->tm_hour);
0197 mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_MIN), tm->tm_min);
0198 mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_SEC), tm->tm_sec);
0199 }
0200
0201 static irqreturn_t mtk_rtc_alarmirq(int irq, void *id)
0202 {
0203 struct mtk_rtc *hw = (struct mtk_rtc *)id;
0204 u32 irq_sta;
0205
0206 irq_sta = mtk_r32(hw, MTK_RTC_INT);
0207 if (irq_sta & RTC_INT_AL_STA) {
0208
0209 mtk_w32(hw, MTK_RTC_AL_CTL, 0);
0210 rtc_update_irq(hw->rtc, 1, RTC_IRQF | RTC_AF);
0211
0212
0213 mtk_w32(hw, MTK_RTC_INT, RTC_INT_AL_STA);
0214 return IRQ_HANDLED;
0215 }
0216
0217 return IRQ_NONE;
0218 }
0219
0220 static int mtk_rtc_gettime(struct device *dev, struct rtc_time *tm)
0221 {
0222 struct mtk_rtc *hw = dev_get_drvdata(dev);
0223
0224 mtk_rtc_get_alarm_or_time(hw, tm, MTK_TC);
0225
0226 return 0;
0227 }
0228
0229 static int mtk_rtc_settime(struct device *dev, struct rtc_time *tm)
0230 {
0231 struct mtk_rtc *hw = dev_get_drvdata(dev);
0232
0233 if (!MTK_RTC_TM_YR_VALID(tm->tm_year))
0234 return -EINVAL;
0235
0236
0237 mtk_set(hw, MTK_RTC_CTL, RTC_RC_STOP);
0238
0239 mtk_rtc_set_alarm_or_time(hw, tm, MTK_TC);
0240
0241
0242 mtk_clr(hw, MTK_RTC_CTL, RTC_RC_STOP);
0243
0244 return 0;
0245 }
0246
0247 static int mtk_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
0248 {
0249 struct mtk_rtc *hw = dev_get_drvdata(dev);
0250 struct rtc_time *alrm_tm = &wkalrm->time;
0251
0252 mtk_rtc_get_alarm_or_time(hw, alrm_tm, MTK_AL);
0253
0254 wkalrm->enabled = !!(mtk_r32(hw, MTK_RTC_AL_CTL) & RTC_AL_EN);
0255 wkalrm->pending = !!(mtk_r32(hw, MTK_RTC_INT) & RTC_INT_AL_STA);
0256
0257 return 0;
0258 }
0259
0260 static int mtk_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
0261 {
0262 struct mtk_rtc *hw = dev_get_drvdata(dev);
0263 struct rtc_time *alrm_tm = &wkalrm->time;
0264
0265 if (!MTK_RTC_TM_YR_VALID(alrm_tm->tm_year))
0266 return -EINVAL;
0267
0268
0269
0270
0271
0272 mtk_clr(hw, MTK_RTC_AL_CTL, RTC_AL_EN);
0273
0274
0275
0276
0277
0278
0279 synchronize_irq(hw->irq);
0280
0281 mtk_rtc_set_alarm_or_time(hw, alrm_tm, MTK_AL);
0282
0283
0284 mtk_w32(hw, MTK_RTC_AL_CTL, RTC_AL_ALL);
0285
0286 return 0;
0287 }
0288
0289 static const struct rtc_class_ops mtk_rtc_ops = {
0290 .read_time = mtk_rtc_gettime,
0291 .set_time = mtk_rtc_settime,
0292 .read_alarm = mtk_rtc_getalarm,
0293 .set_alarm = mtk_rtc_setalarm,
0294 };
0295
0296 static const struct of_device_id mtk_rtc_match[] = {
0297 { .compatible = "mediatek,mt7622-rtc" },
0298 { .compatible = "mediatek,soc-rtc" },
0299 {},
0300 };
0301 MODULE_DEVICE_TABLE(of, mtk_rtc_match);
0302
0303 static int mtk_rtc_probe(struct platform_device *pdev)
0304 {
0305 struct mtk_rtc *hw;
0306 int ret;
0307
0308 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
0309 if (!hw)
0310 return -ENOMEM;
0311
0312 platform_set_drvdata(pdev, hw);
0313
0314 hw->base = devm_platform_ioremap_resource(pdev, 0);
0315 if (IS_ERR(hw->base))
0316 return PTR_ERR(hw->base);
0317
0318 hw->clk = devm_clk_get(&pdev->dev, "rtc");
0319 if (IS_ERR(hw->clk)) {
0320 dev_err(&pdev->dev, "No clock\n");
0321 return PTR_ERR(hw->clk);
0322 }
0323
0324 ret = clk_prepare_enable(hw->clk);
0325 if (ret)
0326 return ret;
0327
0328 hw->irq = platform_get_irq(pdev, 0);
0329 if (hw->irq < 0) {
0330 ret = hw->irq;
0331 goto err;
0332 }
0333
0334 ret = devm_request_irq(&pdev->dev, hw->irq, mtk_rtc_alarmirq,
0335 0, dev_name(&pdev->dev), hw);
0336 if (ret) {
0337 dev_err(&pdev->dev, "Can't request IRQ\n");
0338 goto err;
0339 }
0340
0341 mtk_rtc_hw_init(hw);
0342
0343 device_init_wakeup(&pdev->dev, true);
0344
0345 hw->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
0346 &mtk_rtc_ops, THIS_MODULE);
0347 if (IS_ERR(hw->rtc)) {
0348 ret = PTR_ERR(hw->rtc);
0349 dev_err(&pdev->dev, "Unable to register device\n");
0350 goto err;
0351 }
0352
0353 return 0;
0354 err:
0355 clk_disable_unprepare(hw->clk);
0356
0357 return ret;
0358 }
0359
0360 static int mtk_rtc_remove(struct platform_device *pdev)
0361 {
0362 struct mtk_rtc *hw = platform_get_drvdata(pdev);
0363
0364 clk_disable_unprepare(hw->clk);
0365
0366 return 0;
0367 }
0368
0369 #ifdef CONFIG_PM_SLEEP
0370 static int mtk_rtc_suspend(struct device *dev)
0371 {
0372 struct mtk_rtc *hw = dev_get_drvdata(dev);
0373
0374 if (device_may_wakeup(dev))
0375 enable_irq_wake(hw->irq);
0376
0377 return 0;
0378 }
0379
0380 static int mtk_rtc_resume(struct device *dev)
0381 {
0382 struct mtk_rtc *hw = dev_get_drvdata(dev);
0383
0384 if (device_may_wakeup(dev))
0385 disable_irq_wake(hw->irq);
0386
0387 return 0;
0388 }
0389
0390 static SIMPLE_DEV_PM_OPS(mtk_rtc_pm_ops, mtk_rtc_suspend, mtk_rtc_resume);
0391
0392 #define MTK_RTC_PM_OPS (&mtk_rtc_pm_ops)
0393 #else
0394 #define MTK_RTC_PM_OPS NULL
0395 #endif
0396
0397 static struct platform_driver mtk_rtc_driver = {
0398 .probe = mtk_rtc_probe,
0399 .remove = mtk_rtc_remove,
0400 .driver = {
0401 .name = MTK_RTC_DEV,
0402 .of_match_table = mtk_rtc_match,
0403 .pm = MTK_RTC_PM_OPS,
0404 },
0405 };
0406
0407 module_platform_driver(mtk_rtc_driver);
0408
0409 MODULE_DESCRIPTION("MediaTek SoC based RTC Driver");
0410 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
0411 MODULE_LICENSE("GPL");