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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * ST M48T59 RTC driver
0004  *
0005  * Copyright (c) 2007 Wind River Systems, Inc.
0006  *
0007  * Author: Mark Zhan <rongkai.zhan@windriver.com>
0008  */
0009 
0010 #include <linux/kernel.h>
0011 #include <linux/module.h>
0012 #include <linux/init.h>
0013 #include <linux/io.h>
0014 #include <linux/device.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/rtc.h>
0017 #include <linux/rtc/m48t59.h>
0018 #include <linux/bcd.h>
0019 #include <linux/slab.h>
0020 
0021 #ifndef NO_IRQ
0022 #define NO_IRQ  (-1)
0023 #endif
0024 
0025 #define M48T59_READ(reg) (pdata->read_byte(dev, pdata->offset + reg))
0026 #define M48T59_WRITE(val, reg) \
0027     (pdata->write_byte(dev, pdata->offset + reg, val))
0028 
0029 #define M48T59_SET_BITS(mask, reg)  \
0030     M48T59_WRITE((M48T59_READ(reg) | (mask)), (reg))
0031 #define M48T59_CLEAR_BITS(mask, reg)    \
0032     M48T59_WRITE((M48T59_READ(reg) & ~(mask)), (reg))
0033 
0034 struct m48t59_private {
0035     void __iomem *ioaddr;
0036     int irq;
0037     struct rtc_device *rtc;
0038     spinlock_t lock; /* serialize the NVRAM and RTC access */
0039 };
0040 
0041 /*
0042  * This is the generic access method when the chip is memory-mapped
0043  */
0044 static void
0045 m48t59_mem_writeb(struct device *dev, u32 ofs, u8 val)
0046 {
0047     struct m48t59_private *m48t59 = dev_get_drvdata(dev);
0048 
0049     writeb(val, m48t59->ioaddr+ofs);
0050 }
0051 
0052 static u8
0053 m48t59_mem_readb(struct device *dev, u32 ofs)
0054 {
0055     struct m48t59_private *m48t59 = dev_get_drvdata(dev);
0056 
0057     return readb(m48t59->ioaddr+ofs);
0058 }
0059 
0060 /*
0061  * NOTE: M48T59 only uses BCD mode
0062  */
0063 static int m48t59_rtc_read_time(struct device *dev, struct rtc_time *tm)
0064 {
0065     struct m48t59_plat_data *pdata = dev_get_platdata(dev);
0066     struct m48t59_private *m48t59 = dev_get_drvdata(dev);
0067     unsigned long flags;
0068     u8 val;
0069 
0070     spin_lock_irqsave(&m48t59->lock, flags);
0071     /* Issue the READ command */
0072     M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL);
0073 
0074     tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR));
0075     /* tm_mon is 0-11 */
0076     tm->tm_mon  = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1;
0077     tm->tm_mday = bcd2bin(M48T59_READ(M48T59_MDAY));
0078 
0079     val = M48T59_READ(M48T59_WDAY);
0080     if ((pdata->type == M48T59RTC_TYPE_M48T59) &&
0081         (val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) {
0082         dev_dbg(dev, "Century bit is enabled\n");
0083         tm->tm_year += 100; /* one century */
0084     }
0085 #ifdef CONFIG_SPARC
0086     /* Sun SPARC machines count years since 1968 */
0087     tm->tm_year += 68;
0088 #endif
0089 
0090     tm->tm_wday = bcd2bin(val & 0x07);
0091     tm->tm_hour = bcd2bin(M48T59_READ(M48T59_HOUR) & 0x3F);
0092     tm->tm_min  = bcd2bin(M48T59_READ(M48T59_MIN) & 0x7F);
0093     tm->tm_sec  = bcd2bin(M48T59_READ(M48T59_SEC) & 0x7F);
0094 
0095     /* Clear the READ bit */
0096     M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL);
0097     spin_unlock_irqrestore(&m48t59->lock, flags);
0098 
0099     dev_dbg(dev, "RTC read time %ptR\n", tm);
0100     return 0;
0101 }
0102 
0103 static int m48t59_rtc_set_time(struct device *dev, struct rtc_time *tm)
0104 {
0105     struct m48t59_plat_data *pdata = dev_get_platdata(dev);
0106     struct m48t59_private *m48t59 = dev_get_drvdata(dev);
0107     unsigned long flags;
0108     u8 val = 0;
0109     int year = tm->tm_year;
0110 
0111 #ifdef CONFIG_SPARC
0112     /* Sun SPARC machines count years since 1968 */
0113     year -= 68;
0114 #endif
0115 
0116     dev_dbg(dev, "RTC set time %04d-%02d-%02d %02d/%02d/%02d\n",
0117         year + 1900, tm->tm_mon, tm->tm_mday,
0118         tm->tm_hour, tm->tm_min, tm->tm_sec);
0119 
0120     if (year < 0)
0121         return -EINVAL;
0122 
0123     spin_lock_irqsave(&m48t59->lock, flags);
0124     /* Issue the WRITE command */
0125     M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
0126 
0127     M48T59_WRITE((bin2bcd(tm->tm_sec) & 0x7F), M48T59_SEC);
0128     M48T59_WRITE((bin2bcd(tm->tm_min) & 0x7F), M48T59_MIN);
0129     M48T59_WRITE((bin2bcd(tm->tm_hour) & 0x3F), M48T59_HOUR);
0130     M48T59_WRITE((bin2bcd(tm->tm_mday) & 0x3F), M48T59_MDAY);
0131     /* tm_mon is 0-11 */
0132     M48T59_WRITE((bin2bcd(tm->tm_mon + 1) & 0x1F), M48T59_MONTH);
0133     M48T59_WRITE(bin2bcd(year % 100), M48T59_YEAR);
0134 
0135     if (pdata->type == M48T59RTC_TYPE_M48T59 && (year / 100))
0136         val = (M48T59_WDAY_CEB | M48T59_WDAY_CB);
0137     val |= (bin2bcd(tm->tm_wday) & 0x07);
0138     M48T59_WRITE(val, M48T59_WDAY);
0139 
0140     /* Clear the WRITE bit */
0141     M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
0142     spin_unlock_irqrestore(&m48t59->lock, flags);
0143     return 0;
0144 }
0145 
0146 /*
0147  * Read alarm time and date in RTC
0148  */
0149 static int m48t59_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
0150 {
0151     struct m48t59_plat_data *pdata = dev_get_platdata(dev);
0152     struct m48t59_private *m48t59 = dev_get_drvdata(dev);
0153     struct rtc_time *tm = &alrm->time;
0154     unsigned long flags;
0155     u8 val;
0156 
0157     /* If no irq, we don't support ALARM */
0158     if (m48t59->irq == NO_IRQ)
0159         return -EIO;
0160 
0161     spin_lock_irqsave(&m48t59->lock, flags);
0162     /* Issue the READ command */
0163     M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL);
0164 
0165     tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR));
0166 #ifdef CONFIG_SPARC
0167     /* Sun SPARC machines count years since 1968 */
0168     tm->tm_year += 68;
0169 #endif
0170     /* tm_mon is 0-11 */
0171     tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1;
0172 
0173     val = M48T59_READ(M48T59_WDAY);
0174     if ((val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB))
0175         tm->tm_year += 100; /* one century */
0176 
0177     tm->tm_mday = bcd2bin(M48T59_READ(M48T59_ALARM_DATE));
0178     tm->tm_hour = bcd2bin(M48T59_READ(M48T59_ALARM_HOUR));
0179     tm->tm_min = bcd2bin(M48T59_READ(M48T59_ALARM_MIN));
0180     tm->tm_sec = bcd2bin(M48T59_READ(M48T59_ALARM_SEC));
0181 
0182     /* Clear the READ bit */
0183     M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL);
0184     spin_unlock_irqrestore(&m48t59->lock, flags);
0185 
0186     dev_dbg(dev, "RTC read alarm time %ptR\n", tm);
0187     return rtc_valid_tm(tm);
0188 }
0189 
0190 /*
0191  * Set alarm time and date in RTC
0192  */
0193 static int m48t59_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
0194 {
0195     struct m48t59_plat_data *pdata = dev_get_platdata(dev);
0196     struct m48t59_private *m48t59 = dev_get_drvdata(dev);
0197     struct rtc_time *tm = &alrm->time;
0198     u8 mday, hour, min, sec;
0199     unsigned long flags;
0200     int year = tm->tm_year;
0201 
0202 #ifdef CONFIG_SPARC
0203     /* Sun SPARC machines count years since 1968 */
0204     year -= 68;
0205 #endif
0206 
0207     /* If no irq, we don't support ALARM */
0208     if (m48t59->irq == NO_IRQ)
0209         return -EIO;
0210 
0211     if (year < 0)
0212         return -EINVAL;
0213 
0214     /*
0215      * 0xff means "always match"
0216      */
0217     mday = tm->tm_mday;
0218     mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
0219     if (mday == 0xff)
0220         mday = M48T59_READ(M48T59_MDAY);
0221 
0222     hour = tm->tm_hour;
0223     hour = (hour < 24) ? bin2bcd(hour) : 0x00;
0224 
0225     min = tm->tm_min;
0226     min = (min < 60) ? bin2bcd(min) : 0x00;
0227 
0228     sec = tm->tm_sec;
0229     sec = (sec < 60) ? bin2bcd(sec) : 0x00;
0230 
0231     spin_lock_irqsave(&m48t59->lock, flags);
0232     /* Issue the WRITE command */
0233     M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
0234 
0235     M48T59_WRITE(mday, M48T59_ALARM_DATE);
0236     M48T59_WRITE(hour, M48T59_ALARM_HOUR);
0237     M48T59_WRITE(min, M48T59_ALARM_MIN);
0238     M48T59_WRITE(sec, M48T59_ALARM_SEC);
0239 
0240     /* Clear the WRITE bit */
0241     M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
0242     spin_unlock_irqrestore(&m48t59->lock, flags);
0243 
0244     dev_dbg(dev, "RTC set alarm time %04d-%02d-%02d %02d/%02d/%02d\n",
0245         year + 1900, tm->tm_mon, tm->tm_mday,
0246         tm->tm_hour, tm->tm_min, tm->tm_sec);
0247     return 0;
0248 }
0249 
0250 /*
0251  * Handle commands from user-space
0252  */
0253 static int m48t59_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
0254 {
0255     struct m48t59_plat_data *pdata = dev_get_platdata(dev);
0256     struct m48t59_private *m48t59 = dev_get_drvdata(dev);
0257     unsigned long flags;
0258 
0259     spin_lock_irqsave(&m48t59->lock, flags);
0260     if (enabled)
0261         M48T59_WRITE(M48T59_INTR_AFE, M48T59_INTR);
0262     else
0263         M48T59_WRITE(0x00, M48T59_INTR);
0264     spin_unlock_irqrestore(&m48t59->lock, flags);
0265 
0266     return 0;
0267 }
0268 
0269 static int m48t59_rtc_proc(struct device *dev, struct seq_file *seq)
0270 {
0271     struct m48t59_plat_data *pdata = dev_get_platdata(dev);
0272     struct m48t59_private *m48t59 = dev_get_drvdata(dev);
0273     unsigned long flags;
0274     u8 val;
0275 
0276     spin_lock_irqsave(&m48t59->lock, flags);
0277     val = M48T59_READ(M48T59_FLAGS);
0278     spin_unlock_irqrestore(&m48t59->lock, flags);
0279 
0280     seq_printf(seq, "battery\t\t: %s\n",
0281          (val & M48T59_FLAGS_BF) ? "low" : "normal");
0282     return 0;
0283 }
0284 
0285 /*
0286  * IRQ handler for the RTC
0287  */
0288 static irqreturn_t m48t59_rtc_interrupt(int irq, void *dev_id)
0289 {
0290     struct device *dev = (struct device *)dev_id;
0291     struct m48t59_plat_data *pdata = dev_get_platdata(dev);
0292     struct m48t59_private *m48t59 = dev_get_drvdata(dev);
0293     u8 event;
0294 
0295     spin_lock(&m48t59->lock);
0296     event = M48T59_READ(M48T59_FLAGS);
0297     spin_unlock(&m48t59->lock);
0298 
0299     if (event & M48T59_FLAGS_AF) {
0300         rtc_update_irq(m48t59->rtc, 1, (RTC_AF | RTC_IRQF));
0301         return IRQ_HANDLED;
0302     }
0303 
0304     return IRQ_NONE;
0305 }
0306 
0307 static const struct rtc_class_ops m48t59_rtc_ops = {
0308     .read_time  = m48t59_rtc_read_time,
0309     .set_time   = m48t59_rtc_set_time,
0310     .read_alarm = m48t59_rtc_readalarm,
0311     .set_alarm  = m48t59_rtc_setalarm,
0312     .proc       = m48t59_rtc_proc,
0313     .alarm_irq_enable = m48t59_rtc_alarm_irq_enable,
0314 };
0315 
0316 static int m48t59_nvram_read(void *priv, unsigned int offset, void *val,
0317                  size_t size)
0318 {
0319     struct platform_device *pdev = priv;
0320     struct device *dev = &pdev->dev;
0321     struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev);
0322     struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
0323     ssize_t cnt = 0;
0324     unsigned long flags;
0325     u8 *buf = val;
0326 
0327     spin_lock_irqsave(&m48t59->lock, flags);
0328 
0329     for (; cnt < size; cnt++)
0330         *buf++ = M48T59_READ(cnt);
0331 
0332     spin_unlock_irqrestore(&m48t59->lock, flags);
0333 
0334     return 0;
0335 }
0336 
0337 static int m48t59_nvram_write(void *priv, unsigned int offset, void *val,
0338                   size_t size)
0339 {
0340     struct platform_device *pdev = priv;
0341     struct device *dev = &pdev->dev;
0342     struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev);
0343     struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
0344     ssize_t cnt = 0;
0345     unsigned long flags;
0346     u8 *buf = val;
0347 
0348     spin_lock_irqsave(&m48t59->lock, flags);
0349 
0350     for (; cnt < size; cnt++)
0351         M48T59_WRITE(*buf++, cnt);
0352 
0353     spin_unlock_irqrestore(&m48t59->lock, flags);
0354 
0355     return 0;
0356 }
0357 
0358 static int m48t59_rtc_probe(struct platform_device *pdev)
0359 {
0360     struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev);
0361     struct m48t59_private *m48t59 = NULL;
0362     struct resource *res;
0363     int ret = -ENOMEM;
0364     struct nvmem_config nvmem_cfg = {
0365         .name = "m48t59-",
0366         .word_size = 1,
0367         .stride = 1,
0368         .reg_read = m48t59_nvram_read,
0369         .reg_write = m48t59_nvram_write,
0370         .priv = pdev,
0371     };
0372 
0373     /* This chip could be memory-mapped or I/O-mapped */
0374     res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0375     if (!res) {
0376         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
0377         if (!res)
0378             return -EINVAL;
0379     }
0380 
0381     if (res->flags & IORESOURCE_IO) {
0382         /* If we are I/O-mapped, the platform should provide
0383          * the operations accessing chip registers.
0384          */
0385         if (!pdata || !pdata->write_byte || !pdata->read_byte)
0386             return -EINVAL;
0387     } else if (res->flags & IORESOURCE_MEM) {
0388         /* we are memory-mapped */
0389         if (!pdata) {
0390             pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata),
0391                         GFP_KERNEL);
0392             if (!pdata)
0393                 return -ENOMEM;
0394             /* Ensure we only kmalloc platform data once */
0395             pdev->dev.platform_data = pdata;
0396         }
0397         if (!pdata->type)
0398             pdata->type = M48T59RTC_TYPE_M48T59;
0399 
0400         /* Try to use the generic memory read/write ops */
0401         if (!pdata->write_byte)
0402             pdata->write_byte = m48t59_mem_writeb;
0403         if (!pdata->read_byte)
0404             pdata->read_byte = m48t59_mem_readb;
0405     }
0406 
0407     m48t59 = devm_kzalloc(&pdev->dev, sizeof(*m48t59), GFP_KERNEL);
0408     if (!m48t59)
0409         return -ENOMEM;
0410 
0411     m48t59->ioaddr = pdata->ioaddr;
0412 
0413     if (!m48t59->ioaddr) {
0414         /* ioaddr not mapped externally */
0415         m48t59->ioaddr = devm_ioremap(&pdev->dev, res->start,
0416                         resource_size(res));
0417         if (!m48t59->ioaddr)
0418             return ret;
0419     }
0420 
0421     /* Try to get irq number. We also can work in
0422      * the mode without IRQ.
0423      */
0424     m48t59->irq = platform_get_irq_optional(pdev, 0);
0425     if (m48t59->irq <= 0)
0426         m48t59->irq = NO_IRQ;
0427 
0428     if (m48t59->irq != NO_IRQ) {
0429         ret = devm_request_irq(&pdev->dev, m48t59->irq,
0430                 m48t59_rtc_interrupt, IRQF_SHARED,
0431                 "rtc-m48t59", &pdev->dev);
0432         if (ret)
0433             return ret;
0434     }
0435 
0436     m48t59->rtc = devm_rtc_allocate_device(&pdev->dev);
0437     if (IS_ERR(m48t59->rtc))
0438         return PTR_ERR(m48t59->rtc);
0439 
0440     switch (pdata->type) {
0441     case M48T59RTC_TYPE_M48T59:
0442         pdata->offset = 0x1ff0;
0443         break;
0444     case M48T59RTC_TYPE_M48T02:
0445         clear_bit(RTC_FEATURE_ALARM, m48t59->rtc->features);
0446         pdata->offset = 0x7f0;
0447         break;
0448     case M48T59RTC_TYPE_M48T08:
0449         clear_bit(RTC_FEATURE_ALARM, m48t59->rtc->features);
0450         pdata->offset = 0x1ff0;
0451         break;
0452     default:
0453         dev_err(&pdev->dev, "Unknown RTC type\n");
0454         return -ENODEV;
0455     }
0456 
0457     spin_lock_init(&m48t59->lock);
0458     platform_set_drvdata(pdev, m48t59);
0459 
0460     m48t59->rtc->ops = &m48t59_rtc_ops;
0461 
0462     nvmem_cfg.size = pdata->offset;
0463     ret = devm_rtc_nvmem_register(m48t59->rtc, &nvmem_cfg);
0464     if (ret)
0465         return ret;
0466 
0467     ret = devm_rtc_register_device(m48t59->rtc);
0468     if (ret)
0469         return ret;
0470 
0471     return 0;
0472 }
0473 
0474 /* work with hotplug and coldplug */
0475 MODULE_ALIAS("platform:rtc-m48t59");
0476 
0477 static struct platform_driver m48t59_rtc_driver = {
0478     .driver     = {
0479         .name   = "rtc-m48t59",
0480     },
0481     .probe      = m48t59_rtc_probe,
0482 };
0483 
0484 module_platform_driver(m48t59_rtc_driver);
0485 
0486 MODULE_AUTHOR("Mark Zhan <rongkai.zhan@windriver.com>");
0487 MODULE_DESCRIPTION("M48T59/M48T02/M48T08 RTC driver");
0488 MODULE_LICENSE("GPL");
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