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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * I2C client/driver for the ST M41T80 family of i2c rtc chips.
0004  *
0005  * Author: Alexander Bigga <ab@mycable.de>
0006  *
0007  * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com>
0008  *
0009  * 2006 (c) mycable GmbH
0010  */
0011 
0012 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0013 
0014 #include <linux/bcd.h>
0015 #include <linux/clk-provider.h>
0016 #include <linux/i2c.h>
0017 #include <linux/init.h>
0018 #include <linux/kernel.h>
0019 #include <linux/module.h>
0020 #include <linux/of_device.h>
0021 #include <linux/rtc.h>
0022 #include <linux/slab.h>
0023 #include <linux/mutex.h>
0024 #include <linux/string.h>
0025 #ifdef CONFIG_RTC_DRV_M41T80_WDT
0026 #include <linux/fs.h>
0027 #include <linux/ioctl.h>
0028 #include <linux/miscdevice.h>
0029 #include <linux/reboot.h>
0030 #include <linux/watchdog.h>
0031 #endif
0032 
0033 #define M41T80_REG_SSEC     0x00
0034 #define M41T80_REG_SEC      0x01
0035 #define M41T80_REG_MIN      0x02
0036 #define M41T80_REG_HOUR     0x03
0037 #define M41T80_REG_WDAY     0x04
0038 #define M41T80_REG_DAY      0x05
0039 #define M41T80_REG_MON      0x06
0040 #define M41T80_REG_YEAR     0x07
0041 #define M41T80_REG_ALARM_MON    0x0a
0042 #define M41T80_REG_ALARM_DAY    0x0b
0043 #define M41T80_REG_ALARM_HOUR   0x0c
0044 #define M41T80_REG_ALARM_MIN    0x0d
0045 #define M41T80_REG_ALARM_SEC    0x0e
0046 #define M41T80_REG_FLAGS    0x0f
0047 #define M41T80_REG_SQW      0x13
0048 
0049 #define M41T80_DATETIME_REG_SIZE    (M41T80_REG_YEAR + 1)
0050 #define M41T80_ALARM_REG_SIZE   \
0051     (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON)
0052 
0053 #define M41T80_SQW_MAX_FREQ 32768
0054 
0055 #define M41T80_SEC_ST       BIT(7)  /* ST: Stop Bit */
0056 #define M41T80_ALMON_AFE    BIT(7)  /* AFE: AF Enable Bit */
0057 #define M41T80_ALMON_SQWE   BIT(6)  /* SQWE: SQW Enable Bit */
0058 #define M41T80_ALHOUR_HT    BIT(6)  /* HT: Halt Update Bit */
0059 #define M41T80_FLAGS_OF     BIT(2)  /* OF: Oscillator Failure Bit */
0060 #define M41T80_FLAGS_AF     BIT(6)  /* AF: Alarm Flag Bit */
0061 #define M41T80_FLAGS_BATT_LOW   BIT(4)  /* BL: Battery Low Bit */
0062 #define M41T80_WATCHDOG_RB2 BIT(7)  /* RB: Watchdog resolution */
0063 #define M41T80_WATCHDOG_RB1 BIT(1)  /* RB: Watchdog resolution */
0064 #define M41T80_WATCHDOG_RB0 BIT(0)  /* RB: Watchdog resolution */
0065 
0066 #define M41T80_FEATURE_HT   BIT(0)  /* Halt feature */
0067 #define M41T80_FEATURE_BL   BIT(1)  /* Battery low indicator */
0068 #define M41T80_FEATURE_SQ   BIT(2)  /* Squarewave feature */
0069 #define M41T80_FEATURE_WD   BIT(3)  /* Extra watchdog resolution */
0070 #define M41T80_FEATURE_SQ_ALT   BIT(4)  /* RSx bits are in reg 4 */
0071 
0072 static const struct i2c_device_id m41t80_id[] = {
0073     { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT },
0074     { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD },
0075     { "m41t80", M41T80_FEATURE_SQ },
0076     { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ},
0077     { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
0078     { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
0079     { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
0080     { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
0081     { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
0082     { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
0083     { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT },
0084     { }
0085 };
0086 MODULE_DEVICE_TABLE(i2c, m41t80_id);
0087 
0088 static const __maybe_unused struct of_device_id m41t80_of_match[] = {
0089     {
0090         .compatible = "st,m41t62",
0091         .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT)
0092     },
0093     {
0094         .compatible = "st,m41t65",
0095         .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_WD)
0096     },
0097     {
0098         .compatible = "st,m41t80",
0099         .data = (void *)(M41T80_FEATURE_SQ)
0100     },
0101     {
0102         .compatible = "st,m41t81",
0103         .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ)
0104     },
0105     {
0106         .compatible = "st,m41t81s",
0107         .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
0108     },
0109     {
0110         .compatible = "st,m41t82",
0111         .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
0112     },
0113     {
0114         .compatible = "st,m41t83",
0115         .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
0116     },
0117     {
0118         .compatible = "st,m41t84",
0119         .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
0120     },
0121     {
0122         .compatible = "st,m41t85",
0123         .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
0124     },
0125     {
0126         .compatible = "st,m41t87",
0127         .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
0128     },
0129     {
0130         .compatible = "microcrystal,rv4162",
0131         .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
0132     },
0133     /* DT compatibility only, do not use compatibles below: */
0134     {
0135         .compatible = "st,rv4162",
0136         .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
0137     },
0138     {
0139         .compatible = "rv4162",
0140         .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
0141     },
0142     { }
0143 };
0144 MODULE_DEVICE_TABLE(of, m41t80_of_match);
0145 
0146 struct m41t80_data {
0147     unsigned long features;
0148     struct i2c_client *client;
0149     struct rtc_device *rtc;
0150 #ifdef CONFIG_COMMON_CLK
0151     struct clk_hw sqw;
0152     unsigned long freq;
0153     unsigned int sqwe;
0154 #endif
0155 };
0156 
0157 static irqreturn_t m41t80_handle_irq(int irq, void *dev_id)
0158 {
0159     struct i2c_client *client = dev_id;
0160     struct m41t80_data *m41t80 = i2c_get_clientdata(client);
0161     unsigned long events = 0;
0162     int flags, flags_afe;
0163 
0164     rtc_lock(m41t80->rtc);
0165 
0166     flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
0167     if (flags_afe < 0) {
0168         rtc_unlock(m41t80->rtc);
0169         return IRQ_NONE;
0170     }
0171 
0172     flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
0173     if (flags <= 0) {
0174         rtc_unlock(m41t80->rtc);
0175         return IRQ_NONE;
0176     }
0177 
0178     if (flags & M41T80_FLAGS_AF) {
0179         flags &= ~M41T80_FLAGS_AF;
0180         flags_afe &= ~M41T80_ALMON_AFE;
0181         events |= RTC_AF;
0182     }
0183 
0184     if (events) {
0185         rtc_update_irq(m41t80->rtc, 1, events);
0186         i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags);
0187         i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
0188                       flags_afe);
0189     }
0190 
0191     rtc_unlock(m41t80->rtc);
0192 
0193     return IRQ_HANDLED;
0194 }
0195 
0196 static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm)
0197 {
0198     struct i2c_client *client = to_i2c_client(dev);
0199     unsigned char buf[8];
0200     int err, flags;
0201 
0202     flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
0203     if (flags < 0)
0204         return flags;
0205 
0206     if (flags & M41T80_FLAGS_OF) {
0207         dev_err(&client->dev, "Oscillator failure, data is invalid.\n");
0208         return -EINVAL;
0209     }
0210 
0211     err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC,
0212                         sizeof(buf), buf);
0213     if (err < 0) {
0214         dev_err(&client->dev, "Unable to read date\n");
0215         return err;
0216     }
0217 
0218     tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f);
0219     tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f);
0220     tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f);
0221     tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f);
0222     tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07;
0223     tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1;
0224 
0225     /* assume 20YY not 19YY, and ignore the Century Bit */
0226     tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100;
0227     return 0;
0228 }
0229 
0230 static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm)
0231 {
0232     struct i2c_client *client = to_i2c_client(dev);
0233     struct m41t80_data *clientdata = i2c_get_clientdata(client);
0234     unsigned char buf[8];
0235     int err, flags;
0236 
0237     buf[M41T80_REG_SSEC] = 0;
0238     buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec);
0239     buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min);
0240     buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour);
0241     buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday);
0242     buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1);
0243     buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100);
0244     buf[M41T80_REG_WDAY] = tm->tm_wday;
0245 
0246     /* If the square wave output is controlled in the weekday register */
0247     if (clientdata->features & M41T80_FEATURE_SQ_ALT) {
0248         int val;
0249 
0250         val = i2c_smbus_read_byte_data(client, M41T80_REG_WDAY);
0251         if (val < 0)
0252             return val;
0253 
0254         buf[M41T80_REG_WDAY] |= (val & 0xf0);
0255     }
0256 
0257     err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC,
0258                          sizeof(buf), buf);
0259     if (err < 0) {
0260         dev_err(&client->dev, "Unable to write to date registers\n");
0261         return err;
0262     }
0263 
0264     /* Clear the OF bit of Flags Register */
0265     flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
0266     if (flags < 0)
0267         return flags;
0268 
0269     err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
0270                     flags & ~M41T80_FLAGS_OF);
0271     if (err < 0) {
0272         dev_err(&client->dev, "Unable to write flags register\n");
0273         return err;
0274     }
0275 
0276     return err;
0277 }
0278 
0279 static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq)
0280 {
0281     struct i2c_client *client = to_i2c_client(dev);
0282     struct m41t80_data *clientdata = i2c_get_clientdata(client);
0283     int reg;
0284 
0285     if (clientdata->features & M41T80_FEATURE_BL) {
0286         reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
0287         if (reg < 0)
0288             return reg;
0289         seq_printf(seq, "battery\t\t: %s\n",
0290                (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok");
0291     }
0292     return 0;
0293 }
0294 
0295 static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled)
0296 {
0297     struct i2c_client *client = to_i2c_client(dev);
0298     int flags, retval;
0299 
0300     flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
0301     if (flags < 0)
0302         return flags;
0303 
0304     if (enabled)
0305         flags |= M41T80_ALMON_AFE;
0306     else
0307         flags &= ~M41T80_ALMON_AFE;
0308 
0309     retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags);
0310     if (retval < 0) {
0311         dev_err(dev, "Unable to enable alarm IRQ %d\n", retval);
0312         return retval;
0313     }
0314     return 0;
0315 }
0316 
0317 static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0318 {
0319     struct i2c_client *client = to_i2c_client(dev);
0320     u8 alarmvals[5];
0321     int ret, err;
0322 
0323     alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1);
0324     alarmvals[1] = bin2bcd(alrm->time.tm_mday);
0325     alarmvals[2] = bin2bcd(alrm->time.tm_hour);
0326     alarmvals[3] = bin2bcd(alrm->time.tm_min);
0327     alarmvals[4] = bin2bcd(alrm->time.tm_sec);
0328 
0329     /* Clear AF and AFE flags */
0330     ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
0331     if (ret < 0)
0332         return ret;
0333     err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
0334                     ret & ~(M41T80_ALMON_AFE));
0335     if (err < 0) {
0336         dev_err(dev, "Unable to clear AFE bit\n");
0337         return err;
0338     }
0339 
0340     /* Keep SQWE bit value */
0341     alarmvals[0] |= (ret & M41T80_ALMON_SQWE);
0342 
0343     ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
0344     if (ret < 0)
0345         return ret;
0346 
0347     err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
0348                     ret & ~(M41T80_FLAGS_AF));
0349     if (err < 0) {
0350         dev_err(dev, "Unable to clear AF bit\n");
0351         return err;
0352     }
0353 
0354     /* Write the alarm */
0355     err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON,
0356                          5, alarmvals);
0357     if (err)
0358         return err;
0359 
0360     /* Enable the alarm interrupt */
0361     if (alrm->enabled) {
0362         alarmvals[0] |= M41T80_ALMON_AFE;
0363         err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
0364                         alarmvals[0]);
0365         if (err)
0366             return err;
0367     }
0368 
0369     return 0;
0370 }
0371 
0372 static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0373 {
0374     struct i2c_client *client = to_i2c_client(dev);
0375     u8 alarmvals[5];
0376     int flags, ret;
0377 
0378     ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON,
0379                         5, alarmvals);
0380     if (ret != 5)
0381         return ret < 0 ? ret : -EIO;
0382 
0383     flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
0384     if (flags < 0)
0385         return flags;
0386 
0387     alrm->time.tm_sec  = bcd2bin(alarmvals[4] & 0x7f);
0388     alrm->time.tm_min  = bcd2bin(alarmvals[3] & 0x7f);
0389     alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f);
0390     alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f);
0391     alrm->time.tm_mon  = bcd2bin(alarmvals[0] & 0x3f) - 1;
0392 
0393     alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE);
0394     alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled;
0395 
0396     return 0;
0397 }
0398 
0399 static const struct rtc_class_ops m41t80_rtc_ops = {
0400     .read_time = m41t80_rtc_read_time,
0401     .set_time = m41t80_rtc_set_time,
0402     .proc = m41t80_rtc_proc,
0403     .read_alarm = m41t80_read_alarm,
0404     .set_alarm = m41t80_set_alarm,
0405     .alarm_irq_enable = m41t80_alarm_irq_enable,
0406 };
0407 
0408 #ifdef CONFIG_PM_SLEEP
0409 static int m41t80_suspend(struct device *dev)
0410 {
0411     struct i2c_client *client = to_i2c_client(dev);
0412 
0413     if (client->irq >= 0 && device_may_wakeup(dev))
0414         enable_irq_wake(client->irq);
0415 
0416     return 0;
0417 }
0418 
0419 static int m41t80_resume(struct device *dev)
0420 {
0421     struct i2c_client *client = to_i2c_client(dev);
0422 
0423     if (client->irq >= 0 && device_may_wakeup(dev))
0424         disable_irq_wake(client->irq);
0425 
0426     return 0;
0427 }
0428 #endif
0429 
0430 static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume);
0431 
0432 #ifdef CONFIG_COMMON_CLK
0433 #define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw)
0434 
0435 static unsigned long m41t80_decode_freq(int setting)
0436 {
0437     return (setting == 0) ? 0 : (setting == 1) ? M41T80_SQW_MAX_FREQ :
0438         M41T80_SQW_MAX_FREQ >> setting;
0439 }
0440 
0441 static unsigned long m41t80_get_freq(struct m41t80_data *m41t80)
0442 {
0443     struct i2c_client *client = m41t80->client;
0444     int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
0445         M41T80_REG_WDAY : M41T80_REG_SQW;
0446     int ret = i2c_smbus_read_byte_data(client, reg_sqw);
0447 
0448     if (ret < 0)
0449         return 0;
0450     return m41t80_decode_freq(ret >> 4);
0451 }
0452 
0453 static unsigned long m41t80_sqw_recalc_rate(struct clk_hw *hw,
0454                         unsigned long parent_rate)
0455 {
0456     return sqw_to_m41t80_data(hw)->freq;
0457 }
0458 
0459 static long m41t80_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
0460                   unsigned long *prate)
0461 {
0462     if (rate >= M41T80_SQW_MAX_FREQ)
0463         return M41T80_SQW_MAX_FREQ;
0464     if (rate >= M41T80_SQW_MAX_FREQ / 4)
0465         return M41T80_SQW_MAX_FREQ / 4;
0466     if (!rate)
0467         return 0;
0468     return 1 << ilog2(rate);
0469 }
0470 
0471 static int m41t80_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
0472                    unsigned long parent_rate)
0473 {
0474     struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
0475     struct i2c_client *client = m41t80->client;
0476     int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
0477         M41T80_REG_WDAY : M41T80_REG_SQW;
0478     int reg, ret, val = 0;
0479 
0480     if (rate >= M41T80_SQW_MAX_FREQ)
0481         val = 1;
0482     else if (rate >= M41T80_SQW_MAX_FREQ / 4)
0483         val = 2;
0484     else if (rate)
0485         val = 15 - ilog2(rate);
0486 
0487     reg = i2c_smbus_read_byte_data(client, reg_sqw);
0488     if (reg < 0)
0489         return reg;
0490 
0491     reg = (reg & 0x0f) | (val << 4);
0492 
0493     ret = i2c_smbus_write_byte_data(client, reg_sqw, reg);
0494     if (!ret)
0495         m41t80->freq = m41t80_decode_freq(val);
0496     return ret;
0497 }
0498 
0499 static int m41t80_sqw_control(struct clk_hw *hw, bool enable)
0500 {
0501     struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
0502     struct i2c_client *client = m41t80->client;
0503     int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
0504 
0505     if (ret < 0)
0506         return ret;
0507 
0508     if (enable)
0509         ret |= M41T80_ALMON_SQWE;
0510     else
0511         ret &= ~M41T80_ALMON_SQWE;
0512 
0513     ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, ret);
0514     if (!ret)
0515         m41t80->sqwe = enable;
0516     return ret;
0517 }
0518 
0519 static int m41t80_sqw_prepare(struct clk_hw *hw)
0520 {
0521     return m41t80_sqw_control(hw, 1);
0522 }
0523 
0524 static void m41t80_sqw_unprepare(struct clk_hw *hw)
0525 {
0526     m41t80_sqw_control(hw, 0);
0527 }
0528 
0529 static int m41t80_sqw_is_prepared(struct clk_hw *hw)
0530 {
0531     return sqw_to_m41t80_data(hw)->sqwe;
0532 }
0533 
0534 static const struct clk_ops m41t80_sqw_ops = {
0535     .prepare = m41t80_sqw_prepare,
0536     .unprepare = m41t80_sqw_unprepare,
0537     .is_prepared = m41t80_sqw_is_prepared,
0538     .recalc_rate = m41t80_sqw_recalc_rate,
0539     .round_rate = m41t80_sqw_round_rate,
0540     .set_rate = m41t80_sqw_set_rate,
0541 };
0542 
0543 static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80)
0544 {
0545     struct i2c_client *client = m41t80->client;
0546     struct device_node *node = client->dev.of_node;
0547     struct device_node *fixed_clock;
0548     struct clk *clk;
0549     struct clk_init_data init;
0550     int ret;
0551 
0552     fixed_clock = of_get_child_by_name(node, "clock");
0553     if (fixed_clock) {
0554         /*
0555          * skip registering square wave clock when a fixed
0556          * clock has been registered. The fixed clock is
0557          * registered automatically when being referenced.
0558          */
0559         of_node_put(fixed_clock);
0560         return NULL;
0561     }
0562 
0563     /* First disable the clock */
0564     ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
0565     if (ret < 0)
0566         return ERR_PTR(ret);
0567     ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
0568                     ret & ~(M41T80_ALMON_SQWE));
0569     if (ret < 0)
0570         return ERR_PTR(ret);
0571 
0572     init.name = "m41t80-sqw";
0573     init.ops = &m41t80_sqw_ops;
0574     init.flags = 0;
0575     init.parent_names = NULL;
0576     init.num_parents = 0;
0577     m41t80->sqw.init = &init;
0578     m41t80->freq = m41t80_get_freq(m41t80);
0579 
0580     /* optional override of the clockname */
0581     of_property_read_string(node, "clock-output-names", &init.name);
0582 
0583     /* register the clock */
0584     clk = clk_register(&client->dev, &m41t80->sqw);
0585     if (!IS_ERR(clk))
0586         of_clk_add_provider(node, of_clk_src_simple_get, clk);
0587 
0588     return clk;
0589 }
0590 #endif
0591 
0592 #ifdef CONFIG_RTC_DRV_M41T80_WDT
0593 /*
0594  *****************************************************************************
0595  *
0596  * Watchdog Driver
0597  *
0598  *****************************************************************************
0599  */
0600 static DEFINE_MUTEX(m41t80_rtc_mutex);
0601 static struct i2c_client *save_client;
0602 
0603 /* Default margin */
0604 #define WD_TIMO 60      /* 1..31 seconds */
0605 
0606 static int wdt_margin = WD_TIMO;
0607 module_param(wdt_margin, int, 0);
0608 MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)");
0609 
0610 static unsigned long wdt_is_open;
0611 static int boot_flag;
0612 
0613 /**
0614  *  wdt_ping - Reload counter one with the watchdog timeout.
0615  *  We don't bother reloading the cascade counter.
0616  */
0617 static void wdt_ping(void)
0618 {
0619     unsigned char i2c_data[2];
0620     struct i2c_msg msgs1[1] = {
0621         {
0622             .addr   = save_client->addr,
0623             .flags  = 0,
0624             .len    = 2,
0625             .buf    = i2c_data,
0626         },
0627     };
0628     struct m41t80_data *clientdata = i2c_get_clientdata(save_client);
0629 
0630     i2c_data[0] = 0x09;     /* watchdog register */
0631 
0632     if (wdt_margin > 31)
0633         i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */
0634     else
0635         /*
0636          * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02)
0637          */
0638         i2c_data[1] = wdt_margin << 2 | 0x82;
0639 
0640     /*
0641      * M41T65 has three bits for watchdog resolution.  Don't set bit 7, as
0642      * that would be an invalid resolution.
0643      */
0644     if (clientdata->features & M41T80_FEATURE_WD)
0645         i2c_data[1] &= ~M41T80_WATCHDOG_RB2;
0646 
0647     i2c_transfer(save_client->adapter, msgs1, 1);
0648 }
0649 
0650 /**
0651  *  wdt_disable - disables watchdog.
0652  */
0653 static void wdt_disable(void)
0654 {
0655     unsigned char i2c_data[2], i2c_buf[0x10];
0656     struct i2c_msg msgs0[2] = {
0657         {
0658             .addr   = save_client->addr,
0659             .flags  = 0,
0660             .len    = 1,
0661             .buf    = i2c_data,
0662         },
0663         {
0664             .addr   = save_client->addr,
0665             .flags  = I2C_M_RD,
0666             .len    = 1,
0667             .buf    = i2c_buf,
0668         },
0669     };
0670     struct i2c_msg msgs1[1] = {
0671         {
0672             .addr   = save_client->addr,
0673             .flags  = 0,
0674             .len    = 2,
0675             .buf    = i2c_data,
0676         },
0677     };
0678 
0679     i2c_data[0] = 0x09;
0680     i2c_transfer(save_client->adapter, msgs0, 2);
0681 
0682     i2c_data[0] = 0x09;
0683     i2c_data[1] = 0x00;
0684     i2c_transfer(save_client->adapter, msgs1, 1);
0685 }
0686 
0687 /**
0688  *  wdt_write - write to watchdog.
0689  *  @file: file handle to the watchdog
0690  *  @buf: buffer to write (unused as data does not matter here
0691  *  @count: count of bytes
0692  *  @ppos: pointer to the position to write. No seeks allowed
0693  *
0694  *  A write to a watchdog device is defined as a keepalive signal. Any
0695  *  write of data will do, as we we don't define content meaning.
0696  */
0697 static ssize_t wdt_write(struct file *file, const char __user *buf,
0698              size_t count, loff_t *ppos)
0699 {
0700     if (count) {
0701         wdt_ping();
0702         return 1;
0703     }
0704     return 0;
0705 }
0706 
0707 static ssize_t wdt_read(struct file *file, char __user *buf,
0708             size_t count, loff_t *ppos)
0709 {
0710     return 0;
0711 }
0712 
0713 /**
0714  *  wdt_ioctl - ioctl handler to set watchdog.
0715  *  @file: file handle to the device
0716  *  @cmd: watchdog command
0717  *  @arg: argument pointer
0718  *
0719  *  The watchdog API defines a common set of functions for all watchdogs
0720  *  according to their available features. We only actually usefully support
0721  *  querying capabilities and current status.
0722  */
0723 static int wdt_ioctl(struct file *file, unsigned int cmd,
0724              unsigned long arg)
0725 {
0726     int new_margin, rv;
0727     static struct watchdog_info ident = {
0728         .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING |
0729             WDIOF_SETTIMEOUT,
0730         .firmware_version = 1,
0731         .identity = "M41T80 WTD"
0732     };
0733 
0734     switch (cmd) {
0735     case WDIOC_GETSUPPORT:
0736         return copy_to_user((struct watchdog_info __user *)arg, &ident,
0737                     sizeof(ident)) ? -EFAULT : 0;
0738 
0739     case WDIOC_GETSTATUS:
0740     case WDIOC_GETBOOTSTATUS:
0741         return put_user(boot_flag, (int __user *)arg);
0742     case WDIOC_KEEPALIVE:
0743         wdt_ping();
0744         return 0;
0745     case WDIOC_SETTIMEOUT:
0746         if (get_user(new_margin, (int __user *)arg))
0747             return -EFAULT;
0748         /* Arbitrary, can't find the card's limits */
0749         if (new_margin < 1 || new_margin > 124)
0750             return -EINVAL;
0751         wdt_margin = new_margin;
0752         wdt_ping();
0753         fallthrough;
0754     case WDIOC_GETTIMEOUT:
0755         return put_user(wdt_margin, (int __user *)arg);
0756 
0757     case WDIOC_SETOPTIONS:
0758         if (copy_from_user(&rv, (int __user *)arg, sizeof(int)))
0759             return -EFAULT;
0760 
0761         if (rv & WDIOS_DISABLECARD) {
0762             pr_info("disable watchdog\n");
0763             wdt_disable();
0764         }
0765 
0766         if (rv & WDIOS_ENABLECARD) {
0767             pr_info("enable watchdog\n");
0768             wdt_ping();
0769         }
0770 
0771         return -EINVAL;
0772     }
0773     return -ENOTTY;
0774 }
0775 
0776 static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd,
0777                    unsigned long arg)
0778 {
0779     int ret;
0780 
0781     mutex_lock(&m41t80_rtc_mutex);
0782     ret = wdt_ioctl(file, cmd, arg);
0783     mutex_unlock(&m41t80_rtc_mutex);
0784 
0785     return ret;
0786 }
0787 
0788 /**
0789  *  wdt_open - open a watchdog.
0790  *  @inode: inode of device
0791  *  @file: file handle to device
0792  *
0793  */
0794 static int wdt_open(struct inode *inode, struct file *file)
0795 {
0796     if (iminor(inode) == WATCHDOG_MINOR) {
0797         mutex_lock(&m41t80_rtc_mutex);
0798         if (test_and_set_bit(0, &wdt_is_open)) {
0799             mutex_unlock(&m41t80_rtc_mutex);
0800             return -EBUSY;
0801         }
0802         /*
0803          *  Activate
0804          */
0805         wdt_is_open = 1;
0806         mutex_unlock(&m41t80_rtc_mutex);
0807         return stream_open(inode, file);
0808     }
0809     return -ENODEV;
0810 }
0811 
0812 /**
0813  *  wdt_release - release a watchdog.
0814  *  @inode: inode to board
0815  *  @file: file handle to board
0816  *
0817  */
0818 static int wdt_release(struct inode *inode, struct file *file)
0819 {
0820     if (iminor(inode) == WATCHDOG_MINOR)
0821         clear_bit(0, &wdt_is_open);
0822     return 0;
0823 }
0824 
0825 /**
0826  *  wdt_notify_sys - notify to watchdog.
0827  *  @this: our notifier block
0828  *  @code: the event being reported
0829  *  @unused: unused
0830  *
0831  *  Our notifier is called on system shutdowns. We want to turn the card
0832  *  off at reboot otherwise the machine will reboot again during memory
0833  *  test or worse yet during the following fsck. This would suck, in fact
0834  *  trust me - if it happens it does suck.
0835  */
0836 static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
0837               void *unused)
0838 {
0839     if (code == SYS_DOWN || code == SYS_HALT)
0840         /* Disable Watchdog */
0841         wdt_disable();
0842     return NOTIFY_DONE;
0843 }
0844 
0845 static const struct file_operations wdt_fops = {
0846     .owner  = THIS_MODULE,
0847     .read   = wdt_read,
0848     .unlocked_ioctl = wdt_unlocked_ioctl,
0849     .compat_ioctl = compat_ptr_ioctl,
0850     .write  = wdt_write,
0851     .open   = wdt_open,
0852     .release = wdt_release,
0853     .llseek = no_llseek,
0854 };
0855 
0856 static struct miscdevice wdt_dev = {
0857     .minor = WATCHDOG_MINOR,
0858     .name = "watchdog",
0859     .fops = &wdt_fops,
0860 };
0861 
0862 /*
0863  *  The WDT card needs to learn about soft shutdowns in order to
0864  *  turn the timebomb registers off.
0865  */
0866 static struct notifier_block wdt_notifier = {
0867     .notifier_call = wdt_notify_sys,
0868 };
0869 #endif /* CONFIG_RTC_DRV_M41T80_WDT */
0870 
0871 /*
0872  *****************************************************************************
0873  *
0874  *  Driver Interface
0875  *
0876  *****************************************************************************
0877  */
0878 
0879 static int m41t80_probe(struct i2c_client *client,
0880             const struct i2c_device_id *id)
0881 {
0882     struct i2c_adapter *adapter = client->adapter;
0883     int rc = 0;
0884     struct rtc_time tm;
0885     struct m41t80_data *m41t80_data = NULL;
0886     bool wakeup_source = false;
0887 
0888     if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK |
0889                      I2C_FUNC_SMBUS_BYTE_DATA)) {
0890         dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n");
0891         return -ENODEV;
0892     }
0893 
0894     m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data),
0895                    GFP_KERNEL);
0896     if (!m41t80_data)
0897         return -ENOMEM;
0898 
0899     m41t80_data->client = client;
0900     if (client->dev.of_node)
0901         m41t80_data->features = (unsigned long)
0902             of_device_get_match_data(&client->dev);
0903     else
0904         m41t80_data->features = id->driver_data;
0905     i2c_set_clientdata(client, m41t80_data);
0906 
0907     m41t80_data->rtc =  devm_rtc_allocate_device(&client->dev);
0908     if (IS_ERR(m41t80_data->rtc))
0909         return PTR_ERR(m41t80_data->rtc);
0910 
0911 #ifdef CONFIG_OF
0912     wakeup_source = of_property_read_bool(client->dev.of_node,
0913                           "wakeup-source");
0914 #endif
0915     if (client->irq > 0) {
0916         rc = devm_request_threaded_irq(&client->dev, client->irq,
0917                            NULL, m41t80_handle_irq,
0918                            IRQF_TRIGGER_LOW | IRQF_ONESHOT,
0919                            "m41t80", client);
0920         if (rc) {
0921             dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
0922             client->irq = 0;
0923             wakeup_source = false;
0924         }
0925     }
0926     if (client->irq > 0 || wakeup_source)
0927         device_init_wakeup(&client->dev, true);
0928     else
0929         clear_bit(RTC_FEATURE_ALARM, m41t80_data->rtc->features);
0930 
0931     m41t80_data->rtc->ops = &m41t80_rtc_ops;
0932     m41t80_data->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
0933     m41t80_data->rtc->range_max = RTC_TIMESTAMP_END_2099;
0934 
0935     if (client->irq <= 0)
0936         clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, m41t80_data->rtc->features);
0937 
0938     /* Make sure HT (Halt Update) bit is cleared */
0939     rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR);
0940 
0941     if (rc >= 0 && rc & M41T80_ALHOUR_HT) {
0942         if (m41t80_data->features & M41T80_FEATURE_HT) {
0943             m41t80_rtc_read_time(&client->dev, &tm);
0944             dev_info(&client->dev, "HT bit was set!\n");
0945             dev_info(&client->dev, "Power Down at %ptR\n", &tm);
0946         }
0947         rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR,
0948                            rc & ~M41T80_ALHOUR_HT);
0949     }
0950 
0951     if (rc < 0) {
0952         dev_err(&client->dev, "Can't clear HT bit\n");
0953         return rc;
0954     }
0955 
0956     /* Make sure ST (stop) bit is cleared */
0957     rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC);
0958 
0959     if (rc >= 0 && rc & M41T80_SEC_ST)
0960         rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC,
0961                            rc & ~M41T80_SEC_ST);
0962     if (rc < 0) {
0963         dev_err(&client->dev, "Can't clear ST bit\n");
0964         return rc;
0965     }
0966 
0967 #ifdef CONFIG_RTC_DRV_M41T80_WDT
0968     if (m41t80_data->features & M41T80_FEATURE_HT) {
0969         save_client = client;
0970         rc = misc_register(&wdt_dev);
0971         if (rc)
0972             return rc;
0973         rc = register_reboot_notifier(&wdt_notifier);
0974         if (rc) {
0975             misc_deregister(&wdt_dev);
0976             return rc;
0977         }
0978     }
0979 #endif
0980 #ifdef CONFIG_COMMON_CLK
0981     if (m41t80_data->features & M41T80_FEATURE_SQ)
0982         m41t80_sqw_register_clk(m41t80_data);
0983 #endif
0984 
0985     rc = devm_rtc_register_device(m41t80_data->rtc);
0986     if (rc)
0987         return rc;
0988 
0989     return 0;
0990 }
0991 
0992 static int m41t80_remove(struct i2c_client *client)
0993 {
0994 #ifdef CONFIG_RTC_DRV_M41T80_WDT
0995     struct m41t80_data *clientdata = i2c_get_clientdata(client);
0996 
0997     if (clientdata->features & M41T80_FEATURE_HT) {
0998         misc_deregister(&wdt_dev);
0999         unregister_reboot_notifier(&wdt_notifier);
1000     }
1001 #endif
1002 
1003     return 0;
1004 }
1005 
1006 static struct i2c_driver m41t80_driver = {
1007     .driver = {
1008         .name = "rtc-m41t80",
1009         .of_match_table = of_match_ptr(m41t80_of_match),
1010         .pm = &m41t80_pm,
1011     },
1012     .probe = m41t80_probe,
1013     .remove = m41t80_remove,
1014     .id_table = m41t80_id,
1015 };
1016 
1017 module_i2c_driver(m41t80_driver);
1018 
1019 MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>");
1020 MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver");
1021 MODULE_LICENSE("GPL");
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