drivers/rtc/rtc-ls1x.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (c) 2011 Zhao Zhang <zhzhl555@gmail.com>
0004  *
0005  * Derived from driver/rtc/rtc-au1xxx.c
0006  */
0007
0008 #include <linux/module.h>
0009 #include <linux/kernel.h>
0010 #include <linux/rtc.h>
0011 #include <linux/init.h>
0012 #include <linux/platform_device.h>
0013 #include <linux/delay.h>
0014 #include <linux/types.h>
0015 #include <linux/io.h>
0016 #include <loongson1.h>
0017
0018 #define LS1X_RTC_REG_OFFSET (LS1X_RTC_BASE + 0x20)
0019 #define LS1X_RTC_REGS(x) \
0020         ((void __iomem *)KSEG1ADDR(LS1X_RTC_REG_OFFSET + (x)))
0021
0022 /*RTC programmable counters 0 and 1*/
0023 #define SYS_COUNTER_CNTRL       (LS1X_RTC_REGS(0x20))
0024 #define SYS_CNTRL_ERS           (1 << 23)
0025 #define SYS_CNTRL_RTS           (1 << 20)
0026 #define SYS_CNTRL_RM2           (1 << 19)
0027 #define SYS_CNTRL_RM1           (1 << 18)
0028 #define SYS_CNTRL_RM0           (1 << 17)
0029 #define SYS_CNTRL_RS            (1 << 16)
0030 #define SYS_CNTRL_BP            (1 << 14)
0031 #define SYS_CNTRL_REN           (1 << 13)
0032 #define SYS_CNTRL_BRT           (1 << 12)
0033 #define SYS_CNTRL_TEN           (1 << 11)
0034 #define SYS_CNTRL_BTT           (1 << 10)
0035 #define SYS_CNTRL_E0            (1 << 8)
0036 #define SYS_CNTRL_ETS           (1 << 7)
0037 #define SYS_CNTRL_32S           (1 << 5)
0038 #define SYS_CNTRL_TTS           (1 << 4)
0039 #define SYS_CNTRL_TM2           (1 << 3)
0040 #define SYS_CNTRL_TM1           (1 << 2)
0041 #define SYS_CNTRL_TM0           (1 << 1)
0042 #define SYS_CNTRL_TS            (1 << 0)
0043
0044 /* Programmable Counter 0 Registers */
0045 #define SYS_TOYTRIM     (LS1X_RTC_REGS(0))
0046 #define SYS_TOYWRITE0       (LS1X_RTC_REGS(4))
0047 #define SYS_TOYWRITE1       (LS1X_RTC_REGS(8))
0048 #define SYS_TOYREAD0        (LS1X_RTC_REGS(0xC))
0049 #define SYS_TOYREAD1        (LS1X_RTC_REGS(0x10))
0050 #define SYS_TOYMATCH0       (LS1X_RTC_REGS(0x14))
0051 #define SYS_TOYMATCH1       (LS1X_RTC_REGS(0x18))
0052 #define SYS_TOYMATCH2       (LS1X_RTC_REGS(0x1C))
0053
0054 /* Programmable Counter 1 Registers */
0055 #define SYS_RTCTRIM     (LS1X_RTC_REGS(0x40))
0056 #define SYS_RTCWRITE0       (LS1X_RTC_REGS(0x44))
0057 #define SYS_RTCREAD0        (LS1X_RTC_REGS(0x48))
0058 #define SYS_RTCMATCH0       (LS1X_RTC_REGS(0x4C))
0059 #define SYS_RTCMATCH1       (LS1X_RTC_REGS(0x50))
0060 #define SYS_RTCMATCH2       (LS1X_RTC_REGS(0x54))
0061
0062 #define LS1X_SEC_OFFSET     (4)
0063 #define LS1X_MIN_OFFSET     (10)
0064 #define LS1X_HOUR_OFFSET    (16)
0065 #define LS1X_DAY_OFFSET     (21)
0066 #define LS1X_MONTH_OFFSET   (26)
0067
0068
0069 #define LS1X_SEC_MASK       (0x3f)
0070 #define LS1X_MIN_MASK       (0x3f)
0071 #define LS1X_HOUR_MASK      (0x1f)
0072 #define LS1X_DAY_MASK       (0x1f)
0073 #define LS1X_MONTH_MASK     (0x3f)
0074 #define LS1X_YEAR_MASK      (0xffffffff)
0075
0076 #define ls1x_get_sec(t)     (((t) >> LS1X_SEC_OFFSET) & LS1X_SEC_MASK)
0077 #define ls1x_get_min(t)     (((t) >> LS1X_MIN_OFFSET) & LS1X_MIN_MASK)
0078 #define ls1x_get_hour(t)    (((t) >> LS1X_HOUR_OFFSET) & LS1X_HOUR_MASK)
0079 #define ls1x_get_day(t)     (((t) >> LS1X_DAY_OFFSET) & LS1X_DAY_MASK)
0080 #define ls1x_get_month(t)   (((t) >> LS1X_MONTH_OFFSET) & LS1X_MONTH_MASK)
0081
0082 #define RTC_CNTR_OK (SYS_CNTRL_E0 | SYS_CNTRL_32S)
0083
0084 static int ls1x_rtc_read_time(struct device *dev, struct rtc_time *rtm)
0085 {
0086     unsigned long v;
0087     time64_t t;
0088
0089     v = readl(SYS_TOYREAD0);
0090     t = readl(SYS_TOYREAD1);
0091
0092     memset(rtm, 0, sizeof(struct rtc_time));
0093     t  = mktime64((t & LS1X_YEAR_MASK), ls1x_get_month(v),
0094             ls1x_get_day(v), ls1x_get_hour(v),
0095             ls1x_get_min(v), ls1x_get_sec(v));
0096     rtc_time64_to_tm(t, rtm);
0097
0098     return 0;
0099 }
0100
0101 static int ls1x_rtc_set_time(struct device *dev, struct  rtc_time *rtm)
0102 {
0103     unsigned long v, t, c;
0104     int ret = -ETIMEDOUT;
0105
0106     v = ((rtm->tm_mon + 1)  << LS1X_MONTH_OFFSET)
0107         | (rtm->tm_mday << LS1X_DAY_OFFSET)
0108         | (rtm->tm_hour << LS1X_HOUR_OFFSET)
0109         | (rtm->tm_min  << LS1X_MIN_OFFSET)
0110         | (rtm->tm_sec  << LS1X_SEC_OFFSET);
0111
0112     writel(v, SYS_TOYWRITE0);
0113     c = 0x10000;
0114     /* add timeout check counter, for more safe */
0115     while ((readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TS) && --c)
0116         usleep_range(1000, 3000);
0117
0118     if (!c) {
0119         dev_err(dev, "set time timeout!\n");
0120         goto err;
0121     }
0122
0123     t = rtm->tm_year + 1900;
0124     writel(t, SYS_TOYWRITE1);
0125     c = 0x10000;
0126     while ((readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TS) && --c)
0127         usleep_range(1000, 3000);
0128
0129     if (!c) {
0130         dev_err(dev, "set time timeout!\n");
0131         goto err;
0132     }
0133     return 0;
0134 err:
0135     return ret;
0136 }
0137
0138 static const struct rtc_class_ops  ls1x_rtc_ops = {
0139     .read_time  = ls1x_rtc_read_time,
0140     .set_time   = ls1x_rtc_set_time,
0141 };
0142
0143 static int ls1x_rtc_probe(struct platform_device *pdev)
0144 {
0145     struct rtc_device *rtcdev;
0146     unsigned long v;
0147
0148     v = readl(SYS_COUNTER_CNTRL);
0149     if (!(v & RTC_CNTR_OK)) {
0150         dev_err(&pdev->dev, "rtc counters not working\n");
0151         return -ENODEV;
0152     }
0153
0154     /* set to 1 HZ if needed */
0155     if (readl(SYS_TOYTRIM) != 32767) {
0156         v = 0x100000;
0157         while ((readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TTS) && --v)
0158             usleep_range(1000, 3000);
0159
0160         if (!v) {
0161             dev_err(&pdev->dev, "time out\n");
0162             return -ETIMEDOUT;
0163         }
0164         writel(32767, SYS_TOYTRIM);
0165     }
0166     /* this loop coundn't be endless */
0167     while (readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TTS)
0168         usleep_range(1000, 3000);
0169
0170     rtcdev = devm_rtc_allocate_device(&pdev->dev);
0171     if (IS_ERR(rtcdev))
0172         return PTR_ERR(rtcdev);
0173
0174     platform_set_drvdata(pdev, rtcdev);
0175     rtcdev->ops = &ls1x_rtc_ops;
0176     rtcdev->range_min = RTC_TIMESTAMP_BEGIN_1900;
0177     rtcdev->range_max = RTC_TIMESTAMP_END_2099;
0178
0179     return devm_rtc_register_device(rtcdev);
0180 }
0181
0182 static struct platform_driver  ls1x_rtc_driver = {
0183     .driver     = {
0184         .name   = "ls1x-rtc",
0185     },
0186     .probe      = ls1x_rtc_probe,
0187 };
0188
0189 module_platform_driver(ls1x_rtc_driver);
0190
0191 MODULE_AUTHOR("zhao zhang <zhzhl555@gmail.com>");
0192 MODULE_LICENSE("GPL");