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0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Freescale FlexTimer Module (FTM) alarm device driver.
0004  *
0005  * Copyright 2014 Freescale Semiconductor, Inc.
0006  * Copyright 2019-2020 NXP
0007  *
0008  */
0009 
0010 #include <linux/device.h>
0011 #include <linux/err.h>
0012 #include <linux/interrupt.h>
0013 #include <linux/io.h>
0014 #include <linux/of_address.h>
0015 #include <linux/of_irq.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/of.h>
0018 #include <linux/of_device.h>
0019 #include <linux/module.h>
0020 #include <linux/fsl/ftm.h>
0021 #include <linux/rtc.h>
0022 #include <linux/time.h>
0023 #include <linux/acpi.h>
0024 #include <linux/pm_wakeirq.h>
0025 
0026 #define FTM_SC_CLK(c)       ((c) << FTM_SC_CLK_MASK_SHIFT)
0027 
0028 /*
0029  * Select Fixed frequency clock (32KHz) as clock source
0030  * of FlexTimer Module
0031  */
0032 #define FTM_SC_CLKS_FIXED_FREQ  0x02
0033 #define FIXED_FREQ_CLK      32000
0034 
0035 /* Select 128 (2^7) as divider factor */
0036 #define MAX_FREQ_DIV        (1 << FTM_SC_PS_MASK)
0037 
0038 /* Maximum counter value in FlexTimer's CNT registers */
0039 #define MAX_COUNT_VAL       0xffff
0040 
0041 struct ftm_rtc {
0042     struct rtc_device *rtc_dev;
0043     void __iomem *base;
0044     bool big_endian;
0045     u32 alarm_freq;
0046 };
0047 
0048 static inline u32 rtc_readl(struct ftm_rtc *dev, u32 reg)
0049 {
0050     if (dev->big_endian)
0051         return ioread32be(dev->base + reg);
0052     else
0053         return ioread32(dev->base + reg);
0054 }
0055 
0056 static inline void rtc_writel(struct ftm_rtc *dev, u32 reg, u32 val)
0057 {
0058     if (dev->big_endian)
0059         iowrite32be(val, dev->base + reg);
0060     else
0061         iowrite32(val, dev->base + reg);
0062 }
0063 
0064 static inline void ftm_counter_enable(struct ftm_rtc *rtc)
0065 {
0066     u32 val;
0067 
0068     /* select and enable counter clock source */
0069     val = rtc_readl(rtc, FTM_SC);
0070     val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
0071     val |= (FTM_SC_PS_MASK | FTM_SC_CLK(FTM_SC_CLKS_FIXED_FREQ));
0072     rtc_writel(rtc, FTM_SC, val);
0073 }
0074 
0075 static inline void ftm_counter_disable(struct ftm_rtc *rtc)
0076 {
0077     u32 val;
0078 
0079     /* disable counter clock source */
0080     val = rtc_readl(rtc, FTM_SC);
0081     val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
0082     rtc_writel(rtc, FTM_SC, val);
0083 }
0084 
0085 static inline void ftm_irq_acknowledge(struct ftm_rtc *rtc)
0086 {
0087     unsigned int timeout = 100;
0088 
0089     /*
0090      *Fix errata A-007728 for flextimer
0091      *  If the FTM counter reaches the FTM_MOD value between
0092      *  the reading of the TOF bit and the writing of 0 to
0093      *  the TOF bit, the process of clearing the TOF bit
0094      *  does not work as expected when FTMx_CONF[NUMTOF] != 0
0095      *  and the current TOF count is less than FTMx_CONF[NUMTOF].
0096      *  If the above condition is met, the TOF bit remains set.
0097      *  If the TOF interrupt is enabled (FTMx_SC[TOIE] = 1),the
0098      *  TOF interrupt also remains asserted.
0099      *
0100      *  Above is the errata discription
0101      *
0102      *  In one word: software clearing TOF bit not works when
0103      *  FTMx_CONF[NUMTOF] was seted as nonzero and FTM counter
0104      *  reaches the FTM_MOD value.
0105      *
0106      *  The workaround is clearing TOF bit until it works
0107      *  (FTM counter doesn't always reache the FTM_MOD anyway),
0108      *  which may cost some cycles.
0109      */
0110     while ((FTM_SC_TOF & rtc_readl(rtc, FTM_SC)) && timeout--)
0111         rtc_writel(rtc, FTM_SC, rtc_readl(rtc, FTM_SC) & (~FTM_SC_TOF));
0112 }
0113 
0114 static inline void ftm_irq_enable(struct ftm_rtc *rtc)
0115 {
0116     u32 val;
0117 
0118     val = rtc_readl(rtc, FTM_SC);
0119     val |= FTM_SC_TOIE;
0120     rtc_writel(rtc, FTM_SC, val);
0121 }
0122 
0123 static inline void ftm_irq_disable(struct ftm_rtc *rtc)
0124 {
0125     u32 val;
0126 
0127     val = rtc_readl(rtc, FTM_SC);
0128     val &= ~FTM_SC_TOIE;
0129     rtc_writel(rtc, FTM_SC, val);
0130 }
0131 
0132 static inline void ftm_reset_counter(struct ftm_rtc *rtc)
0133 {
0134     /*
0135      * The CNT register contains the FTM counter value.
0136      * Reset clears the CNT register. Writing any value to COUNT
0137      * updates the counter with its initial value, CNTIN.
0138      */
0139     rtc_writel(rtc, FTM_CNT, 0x00);
0140 }
0141 
0142 static void ftm_clean_alarm(struct ftm_rtc *rtc)
0143 {
0144     ftm_counter_disable(rtc);
0145 
0146     rtc_writel(rtc, FTM_CNTIN, 0x00);
0147     rtc_writel(rtc, FTM_MOD, ~0U);
0148 
0149     ftm_reset_counter(rtc);
0150 }
0151 
0152 static irqreturn_t ftm_rtc_alarm_interrupt(int irq, void *dev)
0153 {
0154     struct ftm_rtc *rtc = dev;
0155 
0156     rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
0157 
0158     ftm_irq_acknowledge(rtc);
0159     ftm_irq_disable(rtc);
0160     ftm_clean_alarm(rtc);
0161 
0162     return IRQ_HANDLED;
0163 }
0164 
0165 static int ftm_rtc_alarm_irq_enable(struct device *dev,
0166         unsigned int enabled)
0167 {
0168     struct ftm_rtc *rtc = dev_get_drvdata(dev);
0169 
0170     if (enabled)
0171         ftm_irq_enable(rtc);
0172     else
0173         ftm_irq_disable(rtc);
0174 
0175     return 0;
0176 }
0177 
0178 /*
0179  * Note:
0180  *  The function is not really getting time from the RTC
0181  *  since FlexTimer is not a RTC device, but we need to
0182  *  get time to setup alarm, so we are using system time
0183  *  for now.
0184  */
0185 static int ftm_rtc_read_time(struct device *dev, struct rtc_time *tm)
0186 {
0187     rtc_time64_to_tm(ktime_get_real_seconds(), tm);
0188 
0189     return 0;
0190 }
0191 
0192 static int ftm_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
0193 {
0194     return 0;
0195 }
0196 
0197 /*
0198  * 1. Select fixed frequency clock (32KHz) as clock source;
0199  * 2. Select 128 (2^7) as divider factor;
0200  * So clock is 250 Hz (32KHz/128).
0201  *
0202  * 3. FlexTimer's CNT register is a 32bit register,
0203  * but the register's 16 bit as counter value,it's other 16 bit
0204  * is reserved.So minimum counter value is 0x0,maximum counter
0205  * value is 0xffff.
0206  * So max alarm value is 262 (65536 / 250) seconds
0207  */
0208 static int ftm_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
0209 {
0210     time64_t alm_time;
0211     unsigned long long cycle;
0212     struct ftm_rtc *rtc = dev_get_drvdata(dev);
0213 
0214     alm_time = rtc_tm_to_time64(&alm->time);
0215 
0216     ftm_clean_alarm(rtc);
0217     cycle = (alm_time - ktime_get_real_seconds()) * rtc->alarm_freq;
0218     if (cycle > MAX_COUNT_VAL) {
0219         pr_err("Out of alarm range {0~262} seconds.\n");
0220         return -ERANGE;
0221     }
0222 
0223     ftm_irq_disable(rtc);
0224 
0225     /*
0226      * The counter increments until the value of MOD is reached,
0227      * at which point the counter is reloaded with the value of CNTIN.
0228      * The TOF (the overflow flag) bit is set when the FTM counter
0229      * changes from MOD to CNTIN. So we should using the cycle - 1.
0230      */
0231     rtc_writel(rtc, FTM_MOD, cycle - 1);
0232 
0233     ftm_counter_enable(rtc);
0234     ftm_irq_enable(rtc);
0235 
0236     return 0;
0237 
0238 }
0239 
0240 static const struct rtc_class_ops ftm_rtc_ops = {
0241     .read_time      = ftm_rtc_read_time,
0242     .read_alarm     = ftm_rtc_read_alarm,
0243     .set_alarm      = ftm_rtc_set_alarm,
0244     .alarm_irq_enable   = ftm_rtc_alarm_irq_enable,
0245 };
0246 
0247 static int ftm_rtc_probe(struct platform_device *pdev)
0248 {
0249     int irq;
0250     int ret;
0251     struct ftm_rtc *rtc;
0252 
0253     rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
0254     if (unlikely(!rtc)) {
0255         dev_err(&pdev->dev, "cannot alloc memory for rtc\n");
0256         return -ENOMEM;
0257     }
0258 
0259     platform_set_drvdata(pdev, rtc);
0260 
0261     rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
0262     if (IS_ERR(rtc->rtc_dev))
0263         return PTR_ERR(rtc->rtc_dev);
0264 
0265     rtc->base = devm_platform_ioremap_resource(pdev, 0);
0266     if (IS_ERR(rtc->base)) {
0267         dev_err(&pdev->dev, "cannot ioremap resource for rtc\n");
0268         return PTR_ERR(rtc->base);
0269     }
0270 
0271     irq = platform_get_irq(pdev, 0);
0272     if (irq < 0)
0273         return irq;
0274 
0275     ret = devm_request_irq(&pdev->dev, irq, ftm_rtc_alarm_interrupt,
0276                    0, dev_name(&pdev->dev), rtc);
0277     if (ret < 0) {
0278         dev_err(&pdev->dev, "failed to request irq\n");
0279         return ret;
0280     }
0281 
0282     rtc->big_endian =
0283         device_property_read_bool(&pdev->dev, "big-endian");
0284 
0285     rtc->alarm_freq = (u32)FIXED_FREQ_CLK / (u32)MAX_FREQ_DIV;
0286     rtc->rtc_dev->ops = &ftm_rtc_ops;
0287 
0288     device_init_wakeup(&pdev->dev, true);
0289     ret = dev_pm_set_wake_irq(&pdev->dev, irq);
0290     if (ret)
0291         dev_err(&pdev->dev, "failed to enable irq wake\n");
0292 
0293     ret = devm_rtc_register_device(rtc->rtc_dev);
0294     if (ret) {
0295         dev_err(&pdev->dev, "can't register rtc device\n");
0296         return ret;
0297     }
0298 
0299     return 0;
0300 }
0301 
0302 static const struct of_device_id ftm_rtc_match[] = {
0303     { .compatible = "fsl,ls1012a-ftm-alarm", },
0304     { .compatible = "fsl,ls1021a-ftm-alarm", },
0305     { .compatible = "fsl,ls1028a-ftm-alarm", },
0306     { .compatible = "fsl,ls1043a-ftm-alarm", },
0307     { .compatible = "fsl,ls1046a-ftm-alarm", },
0308     { .compatible = "fsl,ls1088a-ftm-alarm", },
0309     { .compatible = "fsl,ls208xa-ftm-alarm", },
0310     { .compatible = "fsl,lx2160a-ftm-alarm", },
0311     { },
0312 };
0313 MODULE_DEVICE_TABLE(of, ftm_rtc_match);
0314 
0315 static const struct acpi_device_id ftm_imx_acpi_ids[] = {
0316     {"NXP0014",},
0317     { }
0318 };
0319 MODULE_DEVICE_TABLE(acpi, ftm_imx_acpi_ids);
0320 
0321 static struct platform_driver ftm_rtc_driver = {
0322     .probe      = ftm_rtc_probe,
0323     .driver     = {
0324         .name   = "ftm-alarm",
0325         .of_match_table = ftm_rtc_match,
0326         .acpi_match_table = ACPI_PTR(ftm_imx_acpi_ids),
0327     },
0328 };
0329 
0330 static int __init ftm_alarm_init(void)
0331 {
0332     return platform_driver_register(&ftm_rtc_driver);
0333 }
0334 
0335 device_initcall(ftm_alarm_init);
0336 
0337 MODULE_DESCRIPTION("NXP/Freescale FlexTimer alarm driver");
0338 MODULE_AUTHOR("Biwen Li <biwen.li@nxp.com>");
0339 MODULE_LICENSE("GPL");