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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * rtc-fm3130.c - RTC driver for Ramtron FM3130 I2C chip.
0004  *
0005  *  Copyright (C) 2008 Sergey Lapin
0006  *  Based on ds1307 driver by James Chapman and David Brownell
0007  */
0008 
0009 #include <linux/module.h>
0010 #include <linux/i2c.h>
0011 #include <linux/rtc.h>
0012 #include <linux/bcd.h>
0013 #include <linux/slab.h>
0014 
0015 #define FM3130_RTC_CONTROL  (0x0)
0016 #define FM3130_CAL_CONTROL  (0x1)
0017 #define FM3130_RTC_SECONDS  (0x2)
0018 #define FM3130_RTC_MINUTES  (0x3)
0019 #define FM3130_RTC_HOURS    (0x4)
0020 #define FM3130_RTC_DAY      (0x5)
0021 #define FM3130_RTC_DATE     (0x6)
0022 #define FM3130_RTC_MONTHS   (0x7)
0023 #define FM3130_RTC_YEARS    (0x8)
0024 
0025 #define FM3130_ALARM_SECONDS    (0x9)
0026 #define FM3130_ALARM_MINUTES    (0xa)
0027 #define FM3130_ALARM_HOURS  (0xb)
0028 #define FM3130_ALARM_DATE   (0xc)
0029 #define FM3130_ALARM_MONTHS (0xd)
0030 #define FM3130_ALARM_WP_CONTROL (0xe)
0031 
0032 #define FM3130_CAL_CONTROL_BIT_nOSCEN (1 << 7) /* Osciallator enabled */
0033 #define FM3130_RTC_CONTROL_BIT_LB (1 << 7) /* Low battery */
0034 #define FM3130_RTC_CONTROL_BIT_AF (1 << 6) /* Alarm flag */
0035 #define FM3130_RTC_CONTROL_BIT_CF (1 << 5) /* Century overflow */
0036 #define FM3130_RTC_CONTROL_BIT_POR (1 << 4) /* Power on reset */
0037 #define FM3130_RTC_CONTROL_BIT_AEN (1 << 3) /* Alarm enable */
0038 #define FM3130_RTC_CONTROL_BIT_CAL (1 << 2) /* Calibration mode */
0039 #define FM3130_RTC_CONTROL_BIT_WRITE (1 << 1) /* W=1 -> write mode W=0 normal */
0040 #define FM3130_RTC_CONTROL_BIT_READ (1 << 0) /* R=1 -> read mode R=0 normal */
0041 
0042 #define FM3130_CLOCK_REGS 7
0043 #define FM3130_ALARM_REGS 5
0044 
0045 struct fm3130 {
0046     u8          reg_addr_time;
0047     u8          reg_addr_alarm;
0048     u8          regs[15];
0049     struct i2c_msg      msg[4];
0050     struct i2c_client   *client;
0051     struct rtc_device   *rtc;
0052     int         alarm_valid;
0053     int         data_valid;
0054 };
0055 static const struct i2c_device_id fm3130_id[] = {
0056     { "fm3130", 0 },
0057     { }
0058 };
0059 MODULE_DEVICE_TABLE(i2c, fm3130_id);
0060 
0061 #define FM3130_MODE_NORMAL      0
0062 #define FM3130_MODE_WRITE       1
0063 #define FM3130_MODE_READ        2
0064 
0065 static void fm3130_rtc_mode(struct device *dev, int mode)
0066 {
0067     struct fm3130 *fm3130 = dev_get_drvdata(dev);
0068 
0069     fm3130->regs[FM3130_RTC_CONTROL] =
0070         i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
0071     switch (mode) {
0072     case FM3130_MODE_NORMAL:
0073         fm3130->regs[FM3130_RTC_CONTROL] &=
0074             ~(FM3130_RTC_CONTROL_BIT_WRITE |
0075             FM3130_RTC_CONTROL_BIT_READ);
0076         break;
0077     case FM3130_MODE_WRITE:
0078         fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_WRITE;
0079         break;
0080     case FM3130_MODE_READ:
0081         fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_READ;
0082         break;
0083     default:
0084         dev_dbg(dev, "invalid mode %d\n", mode);
0085         break;
0086     }
0087 
0088     i2c_smbus_write_byte_data(fm3130->client,
0089          FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL]);
0090 }
0091 
0092 static int fm3130_get_time(struct device *dev, struct rtc_time *t)
0093 {
0094     struct fm3130 *fm3130 = dev_get_drvdata(dev);
0095     int     tmp;
0096 
0097     if (!fm3130->data_valid) {
0098         /* We have invalid data in RTC, probably due
0099         to battery faults or other problems. Return EIO
0100         for now, it will allow us to set data later instead
0101         of error during probing which disables device */
0102         return -EIO;
0103     }
0104     fm3130_rtc_mode(dev, FM3130_MODE_READ);
0105 
0106     /* read the RTC date and time registers all at once */
0107     tmp = i2c_transfer(fm3130->client->adapter, fm3130->msg, 2);
0108     if (tmp != 2) {
0109         dev_err(dev, "%s error %d\n", "read", tmp);
0110         return -EIO;
0111     }
0112 
0113     fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);
0114 
0115     dev_dbg(dev, "%s: %15ph\n", "read", fm3130->regs);
0116 
0117     t->tm_sec = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
0118     t->tm_min = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
0119     tmp = fm3130->regs[FM3130_RTC_HOURS] & 0x3f;
0120     t->tm_hour = bcd2bin(tmp);
0121     t->tm_wday = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x07) - 1;
0122     t->tm_mday = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
0123     tmp = fm3130->regs[FM3130_RTC_MONTHS] & 0x1f;
0124     t->tm_mon = bcd2bin(tmp) - 1;
0125 
0126     /* assume 20YY not 19YY, and ignore CF bit */
0127     t->tm_year = bcd2bin(fm3130->regs[FM3130_RTC_YEARS]) + 100;
0128 
0129     dev_dbg(dev, "%s secs=%d, mins=%d, "
0130         "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
0131         "read", t->tm_sec, t->tm_min,
0132         t->tm_hour, t->tm_mday,
0133         t->tm_mon, t->tm_year, t->tm_wday);
0134 
0135     return 0;
0136 }
0137 
0138 
0139 static int fm3130_set_time(struct device *dev, struct rtc_time *t)
0140 {
0141     struct fm3130 *fm3130 = dev_get_drvdata(dev);
0142     int     tmp, i;
0143     u8      *buf = fm3130->regs;
0144 
0145     dev_dbg(dev, "%s secs=%d, mins=%d, "
0146         "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
0147         "write", t->tm_sec, t->tm_min,
0148         t->tm_hour, t->tm_mday,
0149         t->tm_mon, t->tm_year, t->tm_wday);
0150 
0151     /* first register addr */
0152     buf[FM3130_RTC_SECONDS] = bin2bcd(t->tm_sec);
0153     buf[FM3130_RTC_MINUTES] = bin2bcd(t->tm_min);
0154     buf[FM3130_RTC_HOURS] = bin2bcd(t->tm_hour);
0155     buf[FM3130_RTC_DAY] = bin2bcd(t->tm_wday + 1);
0156     buf[FM3130_RTC_DATE] = bin2bcd(t->tm_mday);
0157     buf[FM3130_RTC_MONTHS] = bin2bcd(t->tm_mon + 1);
0158 
0159     /* assume 20YY not 19YY */
0160     tmp = t->tm_year - 100;
0161     buf[FM3130_RTC_YEARS] = bin2bcd(tmp);
0162 
0163     dev_dbg(dev, "%s: %15ph\n", "write", buf);
0164 
0165     fm3130_rtc_mode(dev, FM3130_MODE_WRITE);
0166 
0167     /* Writing time registers, we don't support multibyte transfers */
0168     for (i = 0; i < FM3130_CLOCK_REGS; i++) {
0169         i2c_smbus_write_byte_data(fm3130->client,
0170                     FM3130_RTC_SECONDS + i,
0171                     fm3130->regs[FM3130_RTC_SECONDS + i]);
0172     }
0173 
0174     fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);
0175 
0176     /* We assume here that data are valid once written */
0177     if (!fm3130->data_valid)
0178         fm3130->data_valid = 1;
0179     return 0;
0180 }
0181 
0182 static int fm3130_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0183 {
0184     struct fm3130 *fm3130 = dev_get_drvdata(dev);
0185     int tmp;
0186     struct rtc_time *tm = &alrm->time;
0187 
0188     if (!fm3130->alarm_valid) {
0189         /*
0190          * We have invalid alarm in RTC, probably due to battery faults
0191          * or other problems. Return EIO for now, it will allow us to
0192          * set alarm value later instead of error during probing which
0193          * disables device
0194          */
0195         return -EIO;
0196     }
0197 
0198     /* read the RTC alarm registers all at once */
0199     tmp = i2c_transfer(fm3130->client->adapter, &fm3130->msg[2], 2);
0200     if (tmp != 2) {
0201         dev_err(dev, "%s error %d\n", "read", tmp);
0202         return -EIO;
0203     }
0204     dev_dbg(dev, "alarm read %02x %02x %02x %02x %02x\n",
0205             fm3130->regs[FM3130_ALARM_SECONDS],
0206             fm3130->regs[FM3130_ALARM_MINUTES],
0207             fm3130->regs[FM3130_ALARM_HOURS],
0208             fm3130->regs[FM3130_ALARM_DATE],
0209             fm3130->regs[FM3130_ALARM_MONTHS]);
0210 
0211     tm->tm_sec  = bcd2bin(fm3130->regs[FM3130_ALARM_SECONDS] & 0x7F);
0212     tm->tm_min  = bcd2bin(fm3130->regs[FM3130_ALARM_MINUTES] & 0x7F);
0213     tm->tm_hour = bcd2bin(fm3130->regs[FM3130_ALARM_HOURS] & 0x3F);
0214     tm->tm_mday = bcd2bin(fm3130->regs[FM3130_ALARM_DATE] & 0x3F);
0215     tm->tm_mon  = bcd2bin(fm3130->regs[FM3130_ALARM_MONTHS] & 0x1F);
0216 
0217     if (tm->tm_mon > 0)
0218         tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
0219 
0220     dev_dbg(dev, "%s secs=%d, mins=%d, "
0221         "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
0222         "read alarm", tm->tm_sec, tm->tm_min,
0223         tm->tm_hour, tm->tm_mday,
0224         tm->tm_mon, tm->tm_year, tm->tm_wday);
0225 
0226     /* check if alarm enabled */
0227     fm3130->regs[FM3130_RTC_CONTROL] =
0228         i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
0229 
0230     if ((fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_AEN) &&
0231         (~fm3130->regs[FM3130_RTC_CONTROL] &
0232             FM3130_RTC_CONTROL_BIT_CAL)) {
0233         alrm->enabled = 1;
0234     }
0235 
0236     return 0;
0237 }
0238 
0239 static int fm3130_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0240 {
0241     struct fm3130 *fm3130 = dev_get_drvdata(dev);
0242     struct rtc_time *tm = &alrm->time;
0243     int i;
0244 
0245     dev_dbg(dev, "%s secs=%d, mins=%d, "
0246         "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
0247         "write alarm", tm->tm_sec, tm->tm_min,
0248         tm->tm_hour, tm->tm_mday,
0249         tm->tm_mon, tm->tm_year, tm->tm_wday);
0250 
0251     fm3130->regs[FM3130_ALARM_SECONDS] =
0252         (tm->tm_sec != -1) ? bin2bcd(tm->tm_sec) : 0x80;
0253 
0254     fm3130->regs[FM3130_ALARM_MINUTES] =
0255         (tm->tm_min != -1) ? bin2bcd(tm->tm_min) : 0x80;
0256 
0257     fm3130->regs[FM3130_ALARM_HOURS] =
0258         (tm->tm_hour != -1) ? bin2bcd(tm->tm_hour) : 0x80;
0259 
0260     fm3130->regs[FM3130_ALARM_DATE] =
0261         (tm->tm_mday != -1) ? bin2bcd(tm->tm_mday) : 0x80;
0262 
0263     fm3130->regs[FM3130_ALARM_MONTHS] =
0264         (tm->tm_mon != -1) ? bin2bcd(tm->tm_mon + 1) : 0x80;
0265 
0266     dev_dbg(dev, "alarm write %02x %02x %02x %02x %02x\n",
0267             fm3130->regs[FM3130_ALARM_SECONDS],
0268             fm3130->regs[FM3130_ALARM_MINUTES],
0269             fm3130->regs[FM3130_ALARM_HOURS],
0270             fm3130->regs[FM3130_ALARM_DATE],
0271             fm3130->regs[FM3130_ALARM_MONTHS]);
0272     /* Writing time registers, we don't support multibyte transfers */
0273     for (i = 0; i < FM3130_ALARM_REGS; i++) {
0274         i2c_smbus_write_byte_data(fm3130->client,
0275                     FM3130_ALARM_SECONDS + i,
0276                     fm3130->regs[FM3130_ALARM_SECONDS + i]);
0277     }
0278     fm3130->regs[FM3130_RTC_CONTROL] =
0279         i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
0280 
0281     /* enable or disable alarm */
0282     if (alrm->enabled) {
0283         i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
0284             (fm3130->regs[FM3130_RTC_CONTROL] &
0285                 ~(FM3130_RTC_CONTROL_BIT_CAL)) |
0286                     FM3130_RTC_CONTROL_BIT_AEN);
0287     } else {
0288         i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
0289             fm3130->regs[FM3130_RTC_CONTROL] &
0290                 ~(FM3130_RTC_CONTROL_BIT_CAL) &
0291                     ~(FM3130_RTC_CONTROL_BIT_AEN));
0292     }
0293 
0294     /* We assume here that data is valid once written */
0295     if (!fm3130->alarm_valid)
0296         fm3130->alarm_valid = 1;
0297 
0298     return 0;
0299 }
0300 
0301 static int fm3130_alarm_irq_enable(struct device *dev, unsigned int enabled)
0302 {
0303     struct fm3130 *fm3130 = dev_get_drvdata(dev);
0304     int ret = 0;
0305 
0306     fm3130->regs[FM3130_RTC_CONTROL] =
0307         i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
0308 
0309     dev_dbg(dev, "alarm_irq_enable: enable=%d, FM3130_RTC_CONTROL=%02x\n",
0310         enabled, fm3130->regs[FM3130_RTC_CONTROL]);
0311 
0312     switch (enabled) {
0313     case 0:     /* alarm off */
0314         ret = i2c_smbus_write_byte_data(fm3130->client,
0315             FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL] &
0316                 ~(FM3130_RTC_CONTROL_BIT_CAL) &
0317                     ~(FM3130_RTC_CONTROL_BIT_AEN));
0318         break;
0319     case 1:     /* alarm on */
0320         ret = i2c_smbus_write_byte_data(fm3130->client,
0321             FM3130_RTC_CONTROL, (fm3130->regs[FM3130_RTC_CONTROL] &
0322                 ~(FM3130_RTC_CONTROL_BIT_CAL)) |
0323                     FM3130_RTC_CONTROL_BIT_AEN);
0324         break;
0325     default:
0326         ret = -EINVAL;
0327         break;
0328     }
0329 
0330     return ret;
0331 }
0332 
0333 static const struct rtc_class_ops fm3130_rtc_ops = {
0334     .read_time  = fm3130_get_time,
0335     .set_time   = fm3130_set_time,
0336     .read_alarm = fm3130_read_alarm,
0337     .set_alarm  = fm3130_set_alarm,
0338     .alarm_irq_enable = fm3130_alarm_irq_enable,
0339 };
0340 
0341 static struct i2c_driver fm3130_driver;
0342 
0343 static int fm3130_probe(struct i2c_client *client)
0344 {
0345     struct fm3130       *fm3130;
0346     int         err = -ENODEV;
0347     int         tmp;
0348     struct i2c_adapter  *adapter = client->adapter;
0349 
0350     if (!i2c_check_functionality(adapter,
0351             I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
0352         return -EIO;
0353 
0354     fm3130 = devm_kzalloc(&client->dev, sizeof(struct fm3130), GFP_KERNEL);
0355 
0356     if (!fm3130)
0357         return -ENOMEM;
0358 
0359     fm3130->client = client;
0360     i2c_set_clientdata(client, fm3130);
0361     fm3130->reg_addr_time = FM3130_RTC_SECONDS;
0362     fm3130->reg_addr_alarm = FM3130_ALARM_SECONDS;
0363 
0364     /* Messages to read time */
0365     fm3130->msg[0].addr = client->addr;
0366     fm3130->msg[0].flags = 0;
0367     fm3130->msg[0].len = 1;
0368     fm3130->msg[0].buf = &fm3130->reg_addr_time;
0369 
0370     fm3130->msg[1].addr = client->addr;
0371     fm3130->msg[1].flags = I2C_M_RD;
0372     fm3130->msg[1].len = FM3130_CLOCK_REGS;
0373     fm3130->msg[1].buf = &fm3130->regs[FM3130_RTC_SECONDS];
0374 
0375     /* Messages to read alarm */
0376     fm3130->msg[2].addr = client->addr;
0377     fm3130->msg[2].flags = 0;
0378     fm3130->msg[2].len = 1;
0379     fm3130->msg[2].buf = &fm3130->reg_addr_alarm;
0380 
0381     fm3130->msg[3].addr = client->addr;
0382     fm3130->msg[3].flags = I2C_M_RD;
0383     fm3130->msg[3].len = FM3130_ALARM_REGS;
0384     fm3130->msg[3].buf = &fm3130->regs[FM3130_ALARM_SECONDS];
0385 
0386     fm3130->alarm_valid = 0;
0387     fm3130->data_valid = 0;
0388 
0389     tmp = i2c_transfer(adapter, fm3130->msg, 4);
0390     if (tmp != 4) {
0391         dev_dbg(&client->dev, "read error %d\n", tmp);
0392         err = -EIO;
0393         goto exit_free;
0394     }
0395 
0396     fm3130->regs[FM3130_RTC_CONTROL] =
0397         i2c_smbus_read_byte_data(client, FM3130_RTC_CONTROL);
0398     fm3130->regs[FM3130_CAL_CONTROL] =
0399         i2c_smbus_read_byte_data(client, FM3130_CAL_CONTROL);
0400 
0401     /* Disabling calibration mode */
0402     if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_CAL) {
0403         i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
0404             fm3130->regs[FM3130_RTC_CONTROL] &
0405                 ~(FM3130_RTC_CONTROL_BIT_CAL));
0406         dev_warn(&client->dev, "Disabling calibration mode!\n");
0407     }
0408 
0409     /* Disabling read and write modes */
0410     if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_WRITE ||
0411         fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_READ) {
0412         i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
0413             fm3130->regs[FM3130_RTC_CONTROL] &
0414                 ~(FM3130_RTC_CONTROL_BIT_READ |
0415                     FM3130_RTC_CONTROL_BIT_WRITE));
0416         dev_warn(&client->dev, "Disabling READ or WRITE mode!\n");
0417     }
0418 
0419     /* oscillator off?  turn it on, so clock can tick. */
0420     if (fm3130->regs[FM3130_CAL_CONTROL] & FM3130_CAL_CONTROL_BIT_nOSCEN)
0421         i2c_smbus_write_byte_data(client, FM3130_CAL_CONTROL,
0422             fm3130->regs[FM3130_CAL_CONTROL] &
0423                 ~(FM3130_CAL_CONTROL_BIT_nOSCEN));
0424 
0425     /* low battery?  clear flag, and warn */
0426     if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_LB) {
0427         i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
0428             fm3130->regs[FM3130_RTC_CONTROL] &
0429                 ~(FM3130_RTC_CONTROL_BIT_LB));
0430         dev_warn(&client->dev, "Low battery!\n");
0431     }
0432 
0433     /* check if Power On Reset bit is set */
0434     if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_POR) {
0435         i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
0436             fm3130->regs[FM3130_RTC_CONTROL] &
0437                 ~FM3130_RTC_CONTROL_BIT_POR);
0438         dev_dbg(&client->dev, "POR bit is set\n");
0439     }
0440     /* ACS is controlled by alarm */
0441     i2c_smbus_write_byte_data(client, FM3130_ALARM_WP_CONTROL, 0x80);
0442 
0443     /* alarm registers sanity check */
0444     tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
0445     if (tmp > 59)
0446         goto bad_alarm;
0447 
0448     tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
0449     if (tmp > 59)
0450         goto bad_alarm;
0451 
0452     tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
0453     if (tmp > 23)
0454         goto bad_alarm;
0455 
0456     tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
0457     if (tmp == 0 || tmp > 31)
0458         goto bad_alarm;
0459 
0460     tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
0461     if (tmp == 0 || tmp > 12)
0462         goto bad_alarm;
0463 
0464     fm3130->alarm_valid = 1;
0465 
0466 bad_alarm:
0467 
0468     /* clock registers sanity chek */
0469     tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
0470     if (tmp > 59)
0471         goto bad_clock;
0472 
0473     tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
0474     if (tmp > 59)
0475         goto bad_clock;
0476 
0477     tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
0478     if (tmp > 23)
0479         goto bad_clock;
0480 
0481     tmp = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x7);
0482     if (tmp == 0 || tmp > 7)
0483         goto bad_clock;
0484 
0485     tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
0486     if (tmp == 0 || tmp > 31)
0487         goto bad_clock;
0488 
0489     tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
0490     if (tmp == 0 || tmp > 12)
0491         goto bad_clock;
0492 
0493     fm3130->data_valid = 1;
0494 
0495 bad_clock:
0496 
0497     if (!fm3130->data_valid || !fm3130->alarm_valid)
0498         dev_dbg(&client->dev, "%s: %15ph\n", "bogus registers",
0499             fm3130->regs);
0500 
0501     /* We won't bail out here because we just got invalid data.
0502        Time setting from u-boot doesn't work anyway */
0503     fm3130->rtc = devm_rtc_device_register(&client->dev, client->name,
0504                 &fm3130_rtc_ops, THIS_MODULE);
0505     if (IS_ERR(fm3130->rtc)) {
0506         err = PTR_ERR(fm3130->rtc);
0507         dev_err(&client->dev,
0508             "unable to register the class device\n");
0509         goto exit_free;
0510     }
0511     return 0;
0512 exit_free:
0513     return err;
0514 }
0515 
0516 static struct i2c_driver fm3130_driver = {
0517     .driver = {
0518         .name   = "rtc-fm3130",
0519     },
0520     .probe_new  = fm3130_probe,
0521     .id_table   = fm3130_id,
0522 };
0523 
0524 module_i2c_driver(fm3130_driver);
0525 
0526 MODULE_DESCRIPTION("RTC driver for FM3130");
0527 MODULE_AUTHOR("Sergey Lapin <slapin@ossfans.org>");
0528 MODULE_LICENSE("GPL");
0529
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