drivers/rtc/rtc-ds1511.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * An rtc driver for the Dallas DS1511
0004  *
0005  * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
0006  * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
0007  *
0008  * Real time clock driver for the Dallas 1511 chip, which also
0009  * contains a watchdog timer.  There is a tiny amount of code that
0010  * platform code could use to mess with the watchdog device a little
0011  * bit, but not a full watchdog driver.
0012  */
0013
0014 #include <linux/bcd.h>
0015 #include <linux/init.h>
0016 #include <linux/kernel.h>
0017 #include <linux/gfp.h>
0018 #include <linux/delay.h>
0019 #include <linux/interrupt.h>
0020 #include <linux/rtc.h>
0021 #include <linux/platform_device.h>
0022 #include <linux/io.h>
0023 #include <linux/module.h>
0024
0025 enum ds1511reg {
0026     DS1511_SEC = 0x0,
0027     DS1511_MIN = 0x1,
0028     DS1511_HOUR = 0x2,
0029     DS1511_DOW = 0x3,
0030     DS1511_DOM = 0x4,
0031     DS1511_MONTH = 0x5,
0032     DS1511_YEAR = 0x6,
0033     DS1511_CENTURY = 0x7,
0034     DS1511_AM1_SEC = 0x8,
0035     DS1511_AM2_MIN = 0x9,
0036     DS1511_AM3_HOUR = 0xa,
0037     DS1511_AM4_DATE = 0xb,
0038     DS1511_WD_MSEC = 0xc,
0039     DS1511_WD_SEC = 0xd,
0040     DS1511_CONTROL_A = 0xe,
0041     DS1511_CONTROL_B = 0xf,
0042     DS1511_RAMADDR_LSB = 0x10,
0043     DS1511_RAMDATA = 0x13
0044 };
0045
0046 #define DS1511_BLF1 0x80
0047 #define DS1511_BLF2 0x40
0048 #define DS1511_PRS  0x20
0049 #define DS1511_PAB  0x10
0050 #define DS1511_TDF  0x08
0051 #define DS1511_KSF  0x04
0052 #define DS1511_WDF  0x02
0053 #define DS1511_IRQF 0x01
0054 #define DS1511_TE   0x80
0055 #define DS1511_CS   0x40
0056 #define DS1511_BME  0x20
0057 #define DS1511_TPE  0x10
0058 #define DS1511_TIE  0x08
0059 #define DS1511_KIE  0x04
0060 #define DS1511_WDE  0x02
0061 #define DS1511_WDS  0x01
0062 #define DS1511_RAM_MAX  0x100
0063
0064 #define RTC_CMD     DS1511_CONTROL_B
0065 #define RTC_CMD1    DS1511_CONTROL_A
0066
0067 #define RTC_ALARM_SEC   DS1511_AM1_SEC
0068 #define RTC_ALARM_MIN   DS1511_AM2_MIN
0069 #define RTC_ALARM_HOUR  DS1511_AM3_HOUR
0070 #define RTC_ALARM_DATE  DS1511_AM4_DATE
0071
0072 #define RTC_SEC     DS1511_SEC
0073 #define RTC_MIN     DS1511_MIN
0074 #define RTC_HOUR    DS1511_HOUR
0075 #define RTC_DOW     DS1511_DOW
0076 #define RTC_DOM     DS1511_DOM
0077 #define RTC_MON     DS1511_MONTH
0078 #define RTC_YEAR    DS1511_YEAR
0079 #define RTC_CENTURY DS1511_CENTURY
0080
0081 #define RTC_TIE DS1511_TIE
0082 #define RTC_TE  DS1511_TE
0083
0084 struct rtc_plat_data {
0085     struct rtc_device *rtc;
0086     void __iomem *ioaddr;       /* virtual base address */
0087     int irq;
0088     unsigned int irqen;
0089     int alrm_sec;
0090     int alrm_min;
0091     int alrm_hour;
0092     int alrm_mday;
0093     spinlock_t lock;
0094 };
0095
0096 static DEFINE_SPINLOCK(ds1511_lock);
0097
0098 static __iomem char *ds1511_base;
0099 static u32 reg_spacing = 1;
0100
0101 static noinline void
0102 rtc_write(uint8_t val, uint32_t reg)
0103 {
0104     writeb(val, ds1511_base + (reg * reg_spacing));
0105 }
0106
0107 static noinline uint8_t
0108 rtc_read(enum ds1511reg reg)
0109 {
0110     return readb(ds1511_base + (reg * reg_spacing));
0111 }
0112
0113 static inline void
0114 rtc_disable_update(void)
0115 {
0116     rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
0117 }
0118
0119 static void
0120 rtc_enable_update(void)
0121 {
0122     rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
0123 }
0124
0125 /*
0126  * #define DS1511_WDOG_RESET_SUPPORT
0127  *
0128  * Uncomment this if you want to use these routines in
0129  * some platform code.
0130  */
0131 #ifdef DS1511_WDOG_RESET_SUPPORT
0132 /*
0133  * just enough code to set the watchdog timer so that it
0134  * will reboot the system
0135  */
0136 void
0137 ds1511_wdog_set(unsigned long deciseconds)
0138 {
0139     /*
0140      * the wdog timer can take 99.99 seconds
0141      */
0142     deciseconds %= 10000;
0143     /*
0144      * set the wdog values in the wdog registers
0145      */
0146     rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
0147     rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
0148     /*
0149      * set wdog enable and wdog 'steering' bit to issue a reset
0150      */
0151     rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
0152 }
0153
0154 void
0155 ds1511_wdog_disable(void)
0156 {
0157     /*
0158      * clear wdog enable and wdog 'steering' bits
0159      */
0160     rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
0161     /*
0162      * clear the wdog counter
0163      */
0164     rtc_write(0, DS1511_WD_MSEC);
0165     rtc_write(0, DS1511_WD_SEC);
0166 }
0167 #endif
0168
0169 /*
0170  * set the rtc chip's idea of the time.
0171  * stupidly, some callers call with year unmolested;
0172  * and some call with  year = year - 1900.  thanks.
0173  */
0174 static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
0175 {
0176     u8 mon, day, dow, hrs, min, sec, yrs, cen;
0177     unsigned long flags;
0178
0179     /*
0180      * won't have to change this for a while
0181      */
0182     if (rtc_tm->tm_year < 1900)
0183         rtc_tm->tm_year += 1900;
0184
0185     if (rtc_tm->tm_year < 1970)
0186         return -EINVAL;
0187
0188     yrs = rtc_tm->tm_year % 100;
0189     cen = rtc_tm->tm_year / 100;
0190     mon = rtc_tm->tm_mon + 1;   /* tm_mon starts at zero */
0191     day = rtc_tm->tm_mday;
0192     dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
0193     hrs = rtc_tm->tm_hour;
0194     min = rtc_tm->tm_min;
0195     sec = rtc_tm->tm_sec;
0196
0197     if ((mon > 12) || (day == 0))
0198         return -EINVAL;
0199
0200     if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
0201         return -EINVAL;
0202
0203     if ((hrs >= 24) || (min >= 60) || (sec >= 60))
0204         return -EINVAL;
0205
0206     /*
0207      * each register is a different number of valid bits
0208      */
0209     sec = bin2bcd(sec) & 0x7f;
0210     min = bin2bcd(min) & 0x7f;
0211     hrs = bin2bcd(hrs) & 0x3f;
0212     day = bin2bcd(day) & 0x3f;
0213     mon = bin2bcd(mon) & 0x1f;
0214     yrs = bin2bcd(yrs) & 0xff;
0215     cen = bin2bcd(cen) & 0xff;
0216
0217     spin_lock_irqsave(&ds1511_lock, flags);
0218     rtc_disable_update();
0219     rtc_write(cen, RTC_CENTURY);
0220     rtc_write(yrs, RTC_YEAR);
0221     rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
0222     rtc_write(day, RTC_DOM);
0223     rtc_write(hrs, RTC_HOUR);
0224     rtc_write(min, RTC_MIN);
0225     rtc_write(sec, RTC_SEC);
0226     rtc_write(dow, RTC_DOW);
0227     rtc_enable_update();
0228     spin_unlock_irqrestore(&ds1511_lock, flags);
0229
0230     return 0;
0231 }
0232
0233 static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
0234 {
0235     unsigned int century;
0236     unsigned long flags;
0237
0238     spin_lock_irqsave(&ds1511_lock, flags);
0239     rtc_disable_update();
0240
0241     rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
0242     rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
0243     rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
0244     rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
0245     rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
0246     rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
0247     rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
0248     century = rtc_read(RTC_CENTURY);
0249
0250     rtc_enable_update();
0251     spin_unlock_irqrestore(&ds1511_lock, flags);
0252
0253     rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
0254     rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
0255     rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
0256     rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
0257     rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
0258     rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
0259     rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
0260     century = bcd2bin(century) * 100;
0261
0262     /*
0263      * Account for differences between how the RTC uses the values
0264      * and how they are defined in a struct rtc_time;
0265      */
0266     century += rtc_tm->tm_year;
0267     rtc_tm->tm_year = century - 1900;
0268
0269     rtc_tm->tm_mon--;
0270
0271     return 0;
0272 }
0273
0274 /*
0275  * write the alarm register settings
0276  *
0277  * we only have the use to interrupt every second, otherwise
0278  * known as the update interrupt, or the interrupt if the whole
0279  * date/hours/mins/secs matches.  the ds1511 has many more
0280  * permutations, but the kernel doesn't.
0281  */
0282 static void
0283 ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
0284 {
0285     unsigned long flags;
0286
0287     spin_lock_irqsave(&pdata->lock, flags);
0288     rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
0289            0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
0290            RTC_ALARM_DATE);
0291     rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
0292            0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
0293            RTC_ALARM_HOUR);
0294     rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
0295            0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
0296            RTC_ALARM_MIN);
0297     rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
0298            0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
0299            RTC_ALARM_SEC);
0300     rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
0301     rtc_read(RTC_CMD1); /* clear interrupts */
0302     spin_unlock_irqrestore(&pdata->lock, flags);
0303 }
0304
0305 static int
0306 ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0307 {
0308     struct rtc_plat_data *pdata = dev_get_drvdata(dev);
0309
0310     if (pdata->irq <= 0)
0311         return -EINVAL;
0312
0313     pdata->alrm_mday = alrm->time.tm_mday;
0314     pdata->alrm_hour = alrm->time.tm_hour;
0315     pdata->alrm_min = alrm->time.tm_min;
0316     pdata->alrm_sec = alrm->time.tm_sec;
0317     if (alrm->enabled)
0318         pdata->irqen |= RTC_AF;
0319
0320     ds1511_rtc_update_alarm(pdata);
0321     return 0;
0322 }
0323
0324 static int
0325 ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
0326 {
0327     struct rtc_plat_data *pdata = dev_get_drvdata(dev);
0328
0329     if (pdata->irq <= 0)
0330         return -EINVAL;
0331
0332     alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
0333     alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
0334     alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
0335     alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
0336     alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
0337     return 0;
0338 }
0339
0340 static irqreturn_t
0341 ds1511_interrupt(int irq, void *dev_id)
0342 {
0343     struct platform_device *pdev = dev_id;
0344     struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
0345     unsigned long events = 0;
0346
0347     spin_lock(&pdata->lock);
0348     /*
0349      * read and clear interrupt
0350      */
0351     if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
0352         events = RTC_IRQF;
0353         if (rtc_read(RTC_ALARM_SEC) & 0x80)
0354             events |= RTC_UF;
0355         else
0356             events |= RTC_AF;
0357         rtc_update_irq(pdata->rtc, 1, events);
0358     }
0359     spin_unlock(&pdata->lock);
0360     return events ? IRQ_HANDLED : IRQ_NONE;
0361 }
0362
0363 static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
0364 {
0365     struct rtc_plat_data *pdata = dev_get_drvdata(dev);
0366
0367     if (pdata->irq <= 0)
0368         return -EINVAL;
0369     if (enabled)
0370         pdata->irqen |= RTC_AF;
0371     else
0372         pdata->irqen &= ~RTC_AF;
0373     ds1511_rtc_update_alarm(pdata);
0374     return 0;
0375 }
0376
0377 static const struct rtc_class_ops ds1511_rtc_ops = {
0378     .read_time      = ds1511_rtc_read_time,
0379     .set_time       = ds1511_rtc_set_time,
0380     .read_alarm     = ds1511_rtc_read_alarm,
0381     .set_alarm      = ds1511_rtc_set_alarm,
0382     .alarm_irq_enable   = ds1511_rtc_alarm_irq_enable,
0383 };
0384
0385 static int ds1511_nvram_read(void *priv, unsigned int pos, void *buf,
0386                  size_t size)
0387 {
0388     int i;
0389
0390     rtc_write(pos, DS1511_RAMADDR_LSB);
0391     for (i = 0; i < size; i++)
0392         *(char *)buf++ = rtc_read(DS1511_RAMDATA);
0393
0394     return 0;
0395 }
0396
0397 static int ds1511_nvram_write(void *priv, unsigned int pos, void *buf,
0398                   size_t size)
0399 {
0400     int i;
0401
0402     rtc_write(pos, DS1511_RAMADDR_LSB);
0403     for (i = 0; i < size; i++)
0404         rtc_write(*(char *)buf++, DS1511_RAMDATA);
0405
0406     return 0;
0407 }
0408
0409 static int ds1511_rtc_probe(struct platform_device *pdev)
0410 {
0411     struct rtc_plat_data *pdata;
0412     int ret = 0;
0413     struct nvmem_config ds1511_nvmem_cfg = {
0414         .name = "ds1511_nvram",
0415         .word_size = 1,
0416         .stride = 1,
0417         .size = DS1511_RAM_MAX,
0418         .reg_read = ds1511_nvram_read,
0419         .reg_write = ds1511_nvram_write,
0420         .priv = &pdev->dev,
0421     };
0422
0423     pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
0424     if (!pdata)
0425         return -ENOMEM;
0426
0427     ds1511_base = devm_platform_ioremap_resource(pdev, 0);
0428     if (IS_ERR(ds1511_base))
0429         return PTR_ERR(ds1511_base);
0430     pdata->ioaddr = ds1511_base;
0431     pdata->irq = platform_get_irq(pdev, 0);
0432
0433     /*
0434      * turn on the clock and the crystal, etc.
0435      */
0436     rtc_write(DS1511_BME, RTC_CMD);
0437     rtc_write(0, RTC_CMD1);
0438     /*
0439      * clear the wdog counter
0440      */
0441     rtc_write(0, DS1511_WD_MSEC);
0442     rtc_write(0, DS1511_WD_SEC);
0443     /*
0444      * start the clock
0445      */
0446     rtc_enable_update();
0447
0448     /*
0449      * check for a dying bat-tree
0450      */
0451     if (rtc_read(RTC_CMD1) & DS1511_BLF1)
0452         dev_warn(&pdev->dev, "voltage-low detected.\n");
0453
0454     spin_lock_init(&pdata->lock);
0455     platform_set_drvdata(pdev, pdata);
0456
0457     pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
0458     if (IS_ERR(pdata->rtc))
0459         return PTR_ERR(pdata->rtc);
0460
0461     pdata->rtc->ops = &ds1511_rtc_ops;
0462
0463     ret = devm_rtc_register_device(pdata->rtc);
0464     if (ret)
0465         return ret;
0466
0467     devm_rtc_nvmem_register(pdata->rtc, &ds1511_nvmem_cfg);
0468
0469     /*
0470      * if the platform has an interrupt in mind for this device,
0471      * then by all means, set it
0472      */
0473     if (pdata->irq > 0) {
0474         rtc_read(RTC_CMD1);
0475         if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
0476             IRQF_SHARED, pdev->name, pdev) < 0) {
0477
0478             dev_warn(&pdev->dev, "interrupt not available.\n");
0479             pdata->irq = 0;
0480         }
0481     }
0482
0483     return 0;
0484 }
0485
0486 /* work with hotplug and coldplug */
0487 MODULE_ALIAS("platform:ds1511");
0488
0489 static struct platform_driver ds1511_rtc_driver = {
0490     .probe      = ds1511_rtc_probe,
0491     .driver     = {
0492         .name   = "ds1511",
0493     },
0494 };
0495
0496 module_platform_driver(ds1511_rtc_driver);
0497
0498 MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
0499 MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
0500 MODULE_LICENSE("GPL");