drivers/reset/reset-zynq.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2015, National Instruments Corp.
0004  *
0005  * Xilinx Zynq Reset controller driver
0006  *
0007  * Author: Moritz Fischer <moritz.fischer@ettus.com>
0008  */
0009
0010 #include <linux/err.h>
0011 #include <linux/io.h>
0012 #include <linux/init.h>
0013 #include <linux/mfd/syscon.h>
0014 #include <linux/of.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/reset-controller.h>
0017 #include <linux/regmap.h>
0018 #include <linux/types.h>
0019
0020 struct zynq_reset_data {
0021     struct regmap *slcr;
0022     struct reset_controller_dev rcdev;
0023     u32 offset;
0024 };
0025
0026 #define to_zynq_reset_data(p)       \
0027     container_of((p), struct zynq_reset_data, rcdev)
0028
0029 static int zynq_reset_assert(struct reset_controller_dev *rcdev,
0030                  unsigned long id)
0031 {
0032     struct zynq_reset_data *priv = to_zynq_reset_data(rcdev);
0033
0034     int bank = id / BITS_PER_LONG;
0035     int offset = id % BITS_PER_LONG;
0036
0037     pr_debug("%s: %s reset bank %u offset %u\n", KBUILD_MODNAME, __func__,
0038          bank, offset);
0039
0040     return regmap_update_bits(priv->slcr,
0041                   priv->offset + (bank * 4),
0042                   BIT(offset),
0043                   BIT(offset));
0044 }
0045
0046 static int zynq_reset_deassert(struct reset_controller_dev *rcdev,
0047                    unsigned long id)
0048 {
0049     struct zynq_reset_data *priv = to_zynq_reset_data(rcdev);
0050
0051     int bank = id / BITS_PER_LONG;
0052     int offset = id % BITS_PER_LONG;
0053
0054     pr_debug("%s: %s reset bank %u offset %u\n", KBUILD_MODNAME, __func__,
0055          bank, offset);
0056
0057     return regmap_update_bits(priv->slcr,
0058                   priv->offset + (bank * 4),
0059                   BIT(offset),
0060                   ~BIT(offset));
0061 }
0062
0063 static int zynq_reset_status(struct reset_controller_dev *rcdev,
0064                  unsigned long id)
0065 {
0066     struct zynq_reset_data *priv = to_zynq_reset_data(rcdev);
0067
0068     int bank = id / BITS_PER_LONG;
0069     int offset = id % BITS_PER_LONG;
0070     int ret;
0071     u32 reg;
0072
0073     pr_debug("%s: %s reset bank %u offset %u\n", KBUILD_MODNAME, __func__,
0074          bank, offset);
0075
0076     ret = regmap_read(priv->slcr, priv->offset + (bank * 4), &reg);
0077     if (ret)
0078         return ret;
0079
0080     return !!(reg & BIT(offset));
0081 }
0082
0083 static const struct reset_control_ops zynq_reset_ops = {
0084     .assert     = zynq_reset_assert,
0085     .deassert   = zynq_reset_deassert,
0086     .status     = zynq_reset_status,
0087 };
0088
0089 static int zynq_reset_probe(struct platform_device *pdev)
0090 {
0091     struct resource *res;
0092     struct zynq_reset_data *priv;
0093
0094     priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
0095     if (!priv)
0096         return -ENOMEM;
0097     platform_set_drvdata(pdev, priv);
0098
0099     priv->slcr = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
0100                              "syscon");
0101     if (IS_ERR(priv->slcr)) {
0102         dev_err(&pdev->dev, "unable to get zynq-slcr regmap");
0103         return PTR_ERR(priv->slcr);
0104     }
0105
0106     res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0107     if (!res) {
0108         dev_err(&pdev->dev, "missing IO resource\n");
0109         return -ENODEV;
0110     }
0111
0112     priv->offset = res->start;
0113
0114     priv->rcdev.owner = THIS_MODULE;
0115     priv->rcdev.nr_resets = resource_size(res) / 4 * BITS_PER_LONG;
0116     priv->rcdev.ops = &zynq_reset_ops;
0117     priv->rcdev.of_node = pdev->dev.of_node;
0118
0119     return devm_reset_controller_register(&pdev->dev, &priv->rcdev);
0120 }
0121
0122 static const struct of_device_id zynq_reset_dt_ids[] = {
0123     { .compatible = "xlnx,zynq-reset", },
0124     { /* sentinel */ },
0125 };
0126
0127 static struct platform_driver zynq_reset_driver = {
0128     .probe  = zynq_reset_probe,
0129     .driver = {
0130         .name       = KBUILD_MODNAME,
0131         .of_match_table = zynq_reset_dt_ids,
0132     },
0133 };
0134 builtin_platform_driver(zynq_reset_driver);