drivers/reset/reset-tn48m.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Delta TN48M CPLD reset driver
0004  *
0005  * Copyright (C) 2021 Sartura Ltd.
0006  *
0007  * Author: Robert Marko <robert.marko@sartura.hr>
0008  */
0009
0010 #include <linux/device.h>
0011 #include <linux/kernel.h>
0012 #include <linux/mod_devicetable.h>
0013 #include <linux/module.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/regmap.h>
0016 #include <linux/reset-controller.h>
0017
0018 #include <dt-bindings/reset/delta,tn48m-reset.h>
0019
0020 #define TN48M_RESET_REG     0x10
0021
0022 #define TN48M_RESET_TIMEOUT_US  125000
0023 #define TN48M_RESET_SLEEP_US    10
0024
0025 struct tn48_reset_map {
0026     u8 bit;
0027 };
0028
0029 struct tn48_reset_data {
0030     struct reset_controller_dev rcdev;
0031     struct regmap *regmap;
0032 };
0033
0034 static const struct tn48_reset_map tn48m_resets[] = {
0035     [CPU_88F7040_RESET] = {0},
0036     [CPU_88F6820_RESET] = {1},
0037     [MAC_98DX3265_RESET] = {2},
0038     [PHY_88E1680_RESET] = {4},
0039     [PHY_88E1512_RESET] = {6},
0040     [POE_RESET] = {7},
0041 };
0042
0043 static inline struct tn48_reset_data *to_tn48_reset_data(
0044             struct reset_controller_dev *rcdev)
0045 {
0046     return container_of(rcdev, struct tn48_reset_data, rcdev);
0047 }
0048
0049 static int tn48m_control_reset(struct reset_controller_dev *rcdev,
0050                    unsigned long id)
0051 {
0052     struct tn48_reset_data *data = to_tn48_reset_data(rcdev);
0053     unsigned int val;
0054
0055     regmap_update_bits(data->regmap, TN48M_RESET_REG,
0056                BIT(tn48m_resets[id].bit), 0);
0057
0058     return regmap_read_poll_timeout(data->regmap,
0059                     TN48M_RESET_REG,
0060                     val,
0061                     val & BIT(tn48m_resets[id].bit),
0062                     TN48M_RESET_SLEEP_US,
0063                     TN48M_RESET_TIMEOUT_US);
0064 }
0065
0066 static int tn48m_control_status(struct reset_controller_dev *rcdev,
0067                 unsigned long id)
0068 {
0069     struct tn48_reset_data *data = to_tn48_reset_data(rcdev);
0070     unsigned int regval;
0071     int ret;
0072
0073     ret = regmap_read(data->regmap, TN48M_RESET_REG, &regval);
0074     if (ret < 0)
0075         return ret;
0076
0077     if (BIT(tn48m_resets[id].bit) & regval)
0078         return 0;
0079     else
0080         return 1;
0081 }
0082
0083 static const struct reset_control_ops tn48_reset_ops = {
0084     .reset      = tn48m_control_reset,
0085     .status     = tn48m_control_status,
0086 };
0087
0088 static int tn48m_reset_probe(struct platform_device *pdev)
0089 {
0090     struct tn48_reset_data *data;
0091     struct regmap *regmap;
0092
0093     regmap = dev_get_regmap(pdev->dev.parent, NULL);
0094     if (!regmap)
0095         return -ENODEV;
0096
0097     data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
0098     if (!data)
0099         return -ENOMEM;
0100
0101     data->regmap = regmap;
0102
0103     data->rcdev.owner = THIS_MODULE;
0104     data->rcdev.ops = &tn48_reset_ops;
0105     data->rcdev.nr_resets = ARRAY_SIZE(tn48m_resets);
0106     data->rcdev.of_node = pdev->dev.of_node;
0107
0108     return devm_reset_controller_register(&pdev->dev, &data->rcdev);
0109 }
0110
0111 static const struct of_device_id tn48m_reset_of_match[] = {
0112     { .compatible = "delta,tn48m-reset" },
0113     { }
0114 };
0115 MODULE_DEVICE_TABLE(of, tn48m_reset_of_match);
0116
0117 static struct platform_driver tn48m_reset_driver = {
0118     .driver = {
0119         .name = "delta-tn48m-reset",
0120         .of_match_table = tn48m_reset_of_match,
0121     },
0122     .probe = tn48m_reset_probe,
0123 };
0124 module_platform_driver(tn48m_reset_driver);
0125
0126 MODULE_AUTHOR("Robert Marko <robert.marko@sartura.hr>");
0127 MODULE_DESCRIPTION("Delta TN48M CPLD reset driver");
0128 MODULE_LICENSE("GPL");