drivers/reset/reset-lantiq.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *
0004  *  Copyright (C) 2010 John Crispin <blogic@phrozen.org>
0005  *  Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
0006  *  Copyright (C) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
0007  *  Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
0008  */
0009
0010 #include <linux/mfd/syscon.h>
0011 #include <linux/module.h>
0012 #include <linux/regmap.h>
0013 #include <linux/reset-controller.h>
0014 #include <linux/of_address.h>
0015 #include <linux/of_platform.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/property.h>
0018
0019 #define LANTIQ_RCU_RESET_TIMEOUT    10000
0020
0021 struct lantiq_rcu_reset_priv {
0022     struct reset_controller_dev rcdev;
0023     struct device *dev;
0024     struct regmap *regmap;
0025     u32 reset_offset;
0026     u32 status_offset;
0027 };
0028
0029 static struct lantiq_rcu_reset_priv *to_lantiq_rcu_reset_priv(
0030     struct reset_controller_dev *rcdev)
0031 {
0032     return container_of(rcdev, struct lantiq_rcu_reset_priv, rcdev);
0033 }
0034
0035 static int lantiq_rcu_reset_status(struct reset_controller_dev *rcdev,
0036                    unsigned long id)
0037 {
0038     struct lantiq_rcu_reset_priv *priv = to_lantiq_rcu_reset_priv(rcdev);
0039     unsigned int status = (id >> 8) & 0x1f;
0040     u32 val;
0041     int ret;
0042
0043     ret = regmap_read(priv->regmap, priv->status_offset, &val);
0044     if (ret)
0045         return ret;
0046
0047     return !!(val & BIT(status));
0048 }
0049
0050 static int lantiq_rcu_reset_status_timeout(struct reset_controller_dev *rcdev,
0051                        unsigned long id, bool assert)
0052 {
0053     int ret;
0054     int retry = LANTIQ_RCU_RESET_TIMEOUT;
0055
0056     do {
0057         ret = lantiq_rcu_reset_status(rcdev, id);
0058         if (ret < 0)
0059             return ret;
0060         if (ret == assert)
0061             return 0;
0062         usleep_range(20, 40);
0063     } while (--retry);
0064
0065     return -ETIMEDOUT;
0066 }
0067
0068 static int lantiq_rcu_reset_update(struct reset_controller_dev *rcdev,
0069                    unsigned long id, bool assert)
0070 {
0071     struct lantiq_rcu_reset_priv *priv = to_lantiq_rcu_reset_priv(rcdev);
0072     unsigned int set = id & 0x1f;
0073     u32 val = assert ? BIT(set) : 0;
0074     int ret;
0075
0076     ret = regmap_update_bits(priv->regmap, priv->reset_offset, BIT(set),
0077                  val);
0078     if (ret) {
0079         dev_err(priv->dev, "Failed to set reset bit %u\n", set);
0080         return ret;
0081     }
0082
0083
0084     ret = lantiq_rcu_reset_status_timeout(rcdev, id, assert);
0085     if (ret)
0086         dev_err(priv->dev, "Failed to %s bit %u\n",
0087             assert ? "assert" : "deassert", set);
0088
0089     return ret;
0090 }
0091
0092 static int lantiq_rcu_reset_assert(struct reset_controller_dev *rcdev,
0093                  unsigned long id)
0094 {
0095     return lantiq_rcu_reset_update(rcdev, id, true);
0096 }
0097
0098 static int lantiq_rcu_reset_deassert(struct reset_controller_dev *rcdev,
0099                    unsigned long id)
0100 {
0101     return lantiq_rcu_reset_update(rcdev, id, false);
0102 }
0103
0104 static int lantiq_rcu_reset_reset(struct reset_controller_dev *rcdev,
0105                 unsigned long id)
0106 {
0107     int ret;
0108
0109     ret = lantiq_rcu_reset_assert(rcdev, id);
0110     if (ret)
0111         return ret;
0112
0113     return lantiq_rcu_reset_deassert(rcdev, id);
0114 }
0115
0116 static const struct reset_control_ops lantiq_rcu_reset_ops = {
0117     .assert = lantiq_rcu_reset_assert,
0118     .deassert = lantiq_rcu_reset_deassert,
0119     .status = lantiq_rcu_reset_status,
0120     .reset  = lantiq_rcu_reset_reset,
0121 };
0122
0123 static int lantiq_rcu_reset_of_parse(struct platform_device *pdev,
0124                    struct lantiq_rcu_reset_priv *priv)
0125 {
0126     struct device *dev = &pdev->dev;
0127     const __be32 *offset;
0128
0129     priv->regmap = syscon_node_to_regmap(dev->of_node->parent);
0130     if (IS_ERR(priv->regmap)) {
0131         dev_err(&pdev->dev, "Failed to lookup RCU regmap\n");
0132         return PTR_ERR(priv->regmap);
0133     }
0134
0135     offset = of_get_address(dev->of_node, 0, NULL, NULL);
0136     if (!offset) {
0137         dev_err(&pdev->dev, "Failed to get RCU reset offset\n");
0138         return -ENOENT;
0139     }
0140     priv->reset_offset = __be32_to_cpu(*offset);
0141
0142     offset = of_get_address(dev->of_node, 1, NULL, NULL);
0143     if (!offset) {
0144         dev_err(&pdev->dev, "Failed to get RCU status offset\n");
0145         return -ENOENT;
0146     }
0147     priv->status_offset = __be32_to_cpu(*offset);
0148
0149     return 0;
0150 }
0151
0152 static int lantiq_rcu_reset_xlate(struct reset_controller_dev *rcdev,
0153                   const struct of_phandle_args *reset_spec)
0154 {
0155     unsigned int status, set;
0156
0157     set = reset_spec->args[0];
0158     status = reset_spec->args[1];
0159
0160     if (set >= rcdev->nr_resets || status >= rcdev->nr_resets)
0161         return -EINVAL;
0162
0163     return (status << 8) | set;
0164 }
0165
0166 static int lantiq_rcu_reset_probe(struct platform_device *pdev)
0167 {
0168     struct lantiq_rcu_reset_priv *priv;
0169     int err;
0170
0171     priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
0172     if (!priv)
0173         return -ENOMEM;
0174
0175     priv->dev = &pdev->dev;
0176     platform_set_drvdata(pdev, priv);
0177
0178     err = lantiq_rcu_reset_of_parse(pdev, priv);
0179     if (err)
0180         return err;
0181
0182     priv->rcdev.ops = &lantiq_rcu_reset_ops;
0183     priv->rcdev.owner = THIS_MODULE;
0184     priv->rcdev.of_node = pdev->dev.of_node;
0185     priv->rcdev.nr_resets = 32;
0186     priv->rcdev.of_xlate = lantiq_rcu_reset_xlate;
0187     priv->rcdev.of_reset_n_cells = 2;
0188
0189     return devm_reset_controller_register(&pdev->dev, &priv->rcdev);
0190 }
0191
0192 static const struct of_device_id lantiq_rcu_reset_dt_ids[] = {
0193     { .compatible = "lantiq,danube-reset", },
0194     { .compatible = "lantiq,xrx200-reset", },
0195     { },
0196 };
0197 MODULE_DEVICE_TABLE(of, lantiq_rcu_reset_dt_ids);
0198
0199 static struct platform_driver lantiq_rcu_reset_driver = {
0200     .probe  = lantiq_rcu_reset_probe,
0201     .driver = {
0202         .name       = "lantiq-reset",
0203         .of_match_table = lantiq_rcu_reset_dt_ids,
0204     },
0205 };
0206 module_platform_driver(lantiq_rcu_reset_driver);
0207
0208 MODULE_AUTHOR("Martin Blumenstingl <martin.blumenstingl@googlemail.com>");
0209 MODULE_DESCRIPTION("Lantiq XWAY RCU Reset Controller Driver");
0210 MODULE_LICENSE("GPL");