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0008 #include <linux/delay.h>
0009 #include <linux/device.h>
0010 #include <linux/io.h>
0011 #include <linux/module.h>
0012 #include <linux/of.h>
0013 #include <linux/platform_device.h>
0014 #include <linux/reset-controller.h>
0015 #include <linux/types.h>
0016
0017 struct brcmstb_reset {
0018 void __iomem *base;
0019 struct reset_controller_dev rcdev;
0020 };
0021
0022 #define SW_INIT_SET 0x00
0023 #define SW_INIT_CLEAR 0x04
0024 #define SW_INIT_STATUS 0x08
0025
0026 #define SW_INIT_BIT(id) BIT((id) & 0x1f)
0027 #define SW_INIT_BANK(id) ((id) >> 5)
0028
0029
0030
0031
0032 #define SW_INIT_BANK_SIZE 0x18
0033
0034 static inline
0035 struct brcmstb_reset *to_brcmstb(struct reset_controller_dev *rcdev)
0036 {
0037 return container_of(rcdev, struct brcmstb_reset, rcdev);
0038 }
0039
0040 static int brcmstb_reset_assert(struct reset_controller_dev *rcdev,
0041 unsigned long id)
0042 {
0043 unsigned int off = SW_INIT_BANK(id) * SW_INIT_BANK_SIZE;
0044 struct brcmstb_reset *priv = to_brcmstb(rcdev);
0045
0046 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_SET);
0047
0048 return 0;
0049 }
0050
0051 static int brcmstb_reset_deassert(struct reset_controller_dev *rcdev,
0052 unsigned long id)
0053 {
0054 unsigned int off = SW_INIT_BANK(id) * SW_INIT_BANK_SIZE;
0055 struct brcmstb_reset *priv = to_brcmstb(rcdev);
0056
0057 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_CLEAR);
0058
0059
0060
0061
0062 usleep_range(100, 200);
0063
0064 return 0;
0065 }
0066
0067 static int brcmstb_reset_status(struct reset_controller_dev *rcdev,
0068 unsigned long id)
0069 {
0070 unsigned int off = SW_INIT_BANK(id) * SW_INIT_BANK_SIZE;
0071 struct brcmstb_reset *priv = to_brcmstb(rcdev);
0072
0073 return readl_relaxed(priv->base + off + SW_INIT_STATUS) &
0074 SW_INIT_BIT(id);
0075 }
0076
0077 static const struct reset_control_ops brcmstb_reset_ops = {
0078 .assert = brcmstb_reset_assert,
0079 .deassert = brcmstb_reset_deassert,
0080 .status = brcmstb_reset_status,
0081 };
0082
0083 static int brcmstb_reset_probe(struct platform_device *pdev)
0084 {
0085 struct device *kdev = &pdev->dev;
0086 struct brcmstb_reset *priv;
0087 struct resource *res;
0088
0089 priv = devm_kzalloc(kdev, sizeof(*priv), GFP_KERNEL);
0090 if (!priv)
0091 return -ENOMEM;
0092
0093 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0094 priv->base = devm_ioremap_resource(kdev, res);
0095 if (IS_ERR(priv->base))
0096 return PTR_ERR(priv->base);
0097
0098 dev_set_drvdata(kdev, priv);
0099
0100 priv->rcdev.owner = THIS_MODULE;
0101 priv->rcdev.nr_resets = DIV_ROUND_DOWN_ULL(resource_size(res),
0102 SW_INIT_BANK_SIZE) * 32;
0103 priv->rcdev.ops = &brcmstb_reset_ops;
0104 priv->rcdev.of_node = kdev->of_node;
0105
0106
0107 return devm_reset_controller_register(kdev, &priv->rcdev);
0108 }
0109
0110 static const struct of_device_id brcmstb_reset_of_match[] = {
0111 { .compatible = "brcm,brcmstb-reset" },
0112 { }
0113 };
0114 MODULE_DEVICE_TABLE(of, brcmstb_reset_of_match);
0115
0116 static struct platform_driver brcmstb_reset_driver = {
0117 .probe = brcmstb_reset_probe,
0118 .driver = {
0119 .name = "brcmstb-reset",
0120 .of_match_table = brcmstb_reset_of_match,
0121 },
0122 };
0123 module_platform_driver(brcmstb_reset_driver);
0124
0125 MODULE_AUTHOR("Broadcom");
0126 MODULE_DESCRIPTION("Broadcom STB reset controller");
0127 MODULE_LICENSE("GPL");