drivers/reset/reset-a10sr.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  Copyright Intel Corporation (C) 2017. All Rights Reserved
0004  *
0005  * Reset driver for Altera Arria10 MAX5 System Resource Chip
0006  *
0007  * Adapted from reset-socfpga.c
0008  */
0009
0010 #include <linux/err.h>
0011 #include <linux/mfd/altera-a10sr.h>
0012 #include <linux/module.h>
0013 #include <linux/of.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/reset-controller.h>
0016
0017 #include <dt-bindings/reset/altr,rst-mgr-a10sr.h>
0018
0019 struct a10sr_reset {
0020     struct reset_controller_dev     rcdev;
0021     struct regmap *regmap;
0022 };
0023
0024 static inline struct a10sr_reset *to_a10sr_rst(struct reset_controller_dev *rc)
0025 {
0026     return container_of(rc, struct a10sr_reset, rcdev);
0027 }
0028
0029 static inline int a10sr_reset_shift(unsigned long id)
0030 {
0031     switch (id) {
0032     case A10SR_RESET_ENET_HPS:
0033         return 1;
0034     case A10SR_RESET_PCIE:
0035     case A10SR_RESET_FILE:
0036     case A10SR_RESET_BQSPI:
0037     case A10SR_RESET_USB:
0038         return id + 11;
0039     default:
0040         return -EINVAL;
0041     }
0042 }
0043
0044 static int a10sr_reset_update(struct reset_controller_dev *rcdev,
0045                   unsigned long id, bool assert)
0046 {
0047     struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
0048     int offset = a10sr_reset_shift(id);
0049     u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
0050     int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
0051
0052     return regmap_update_bits(a10r->regmap, index, mask, assert ? 0 : mask);
0053 }
0054
0055 static int a10sr_reset_assert(struct reset_controller_dev *rcdev,
0056                   unsigned long id)
0057 {
0058     return a10sr_reset_update(rcdev, id, true);
0059 }
0060
0061 static int a10sr_reset_deassert(struct reset_controller_dev *rcdev,
0062                 unsigned long id)
0063 {
0064     return a10sr_reset_update(rcdev, id, false);
0065 }
0066
0067 static int a10sr_reset_status(struct reset_controller_dev *rcdev,
0068                   unsigned long id)
0069 {
0070     int ret;
0071     struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
0072     int offset = a10sr_reset_shift(id);
0073     u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
0074     int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
0075     unsigned int value;
0076
0077     ret = regmap_read(a10r->regmap, index, &value);
0078     if (ret < 0)
0079         return ret;
0080
0081     return !!(value & mask);
0082 }
0083
0084 static const struct reset_control_ops a10sr_reset_ops = {
0085     .assert     = a10sr_reset_assert,
0086     .deassert   = a10sr_reset_deassert,
0087     .status     = a10sr_reset_status,
0088 };
0089
0090 static int a10sr_reset_probe(struct platform_device *pdev)
0091 {
0092     struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent);
0093     struct a10sr_reset *a10r;
0094
0095     a10r = devm_kzalloc(&pdev->dev, sizeof(struct a10sr_reset),
0096                 GFP_KERNEL);
0097     if (!a10r)
0098         return -ENOMEM;
0099
0100     a10r->rcdev.owner = THIS_MODULE;
0101     a10r->rcdev.nr_resets = A10SR_RESET_NUM;
0102     a10r->rcdev.ops = &a10sr_reset_ops;
0103     a10r->rcdev.of_node = pdev->dev.of_node;
0104     a10r->regmap = a10sr->regmap;
0105
0106     platform_set_drvdata(pdev, a10r);
0107
0108     return devm_reset_controller_register(&pdev->dev, &a10r->rcdev);
0109 }
0110
0111 static const struct of_device_id a10sr_reset_of_match[] = {
0112     { .compatible = "altr,a10sr-reset" },
0113     { },
0114 };
0115 MODULE_DEVICE_TABLE(of, a10sr_reset_of_match);
0116
0117 static struct platform_driver a10sr_reset_driver = {
0118     .probe  = a10sr_reset_probe,
0119     .driver = {
0120         .name       = "altr_a10sr_reset",
0121         .of_match_table = a10sr_reset_of_match,
0122     },
0123 };
0124 module_platform_driver(a10sr_reset_driver);
0125
0126 MODULE_AUTHOR("Thor Thayer <thor.thayer@linux.intel.com>");
0127 MODULE_DESCRIPTION("Altera Arria10 System Resource Reset Controller Driver");
0128 MODULE_LICENSE("GPL v2");