0001 # SPDX-License-Identifier: GPL-2.0-only
0002 config ARCH_HAS_RESET_CONTROLLER
0003 bool
0004
0005 menuconfig RESET_CONTROLLER
0006 bool "Reset Controller Support"
0007 default y if ARCH_HAS_RESET_CONTROLLER
0008 help
0009 Generic Reset Controller support.
0010
0011 This framework is designed to abstract reset handling of devices
0012 via GPIOs or SoC-internal reset controller modules.
0013
0014 If unsure, say no.
0015
0016 if RESET_CONTROLLER
0017
0018 config RESET_A10SR
0019 tristate "Altera Arria10 System Resource Reset"
0020 depends on MFD_ALTERA_A10SR || COMPILE_TEST
0021 help
0022 This option enables support for the external reset functions for
0023 peripheral PHYs on the Altera Arria10 System Resource Chip.
0024
0025 config RESET_ATH79
0026 bool "AR71xx Reset Driver" if COMPILE_TEST
0027 default ATH79
0028 help
0029 This enables the ATH79 reset controller driver that supports the
0030 AR71xx SoC reset controller.
0031
0032 config RESET_AXS10X
0033 bool "AXS10x Reset Driver" if COMPILE_TEST
0034 default ARC_PLAT_AXS10X
0035 help
0036 This enables the reset controller driver for AXS10x.
0037
0038 config RESET_BCM6345
0039 bool "BCM6345 Reset Controller"
0040 depends on BMIPS_GENERIC || COMPILE_TEST
0041 default BMIPS_GENERIC
0042 help
0043 This enables the reset controller driver for BCM6345 SoCs.
0044
0045 config RESET_BERLIN
0046 tristate "Berlin Reset Driver"
0047 depends on ARCH_BERLIN || COMPILE_TEST
0048 default m if ARCH_BERLIN
0049 help
0050 This enables the reset controller driver for Marvell Berlin SoCs.
0051
0052 config RESET_BRCMSTB
0053 tristate "Broadcom STB reset controller"
0054 depends on ARCH_BRCMSTB || COMPILE_TEST
0055 default ARCH_BRCMSTB
0056 help
0057 This enables the reset controller driver for Broadcom STB SoCs using
0058 a SUN_TOP_CTRL_SW_INIT style controller.
0059
0060 config RESET_BRCMSTB_RESCAL
0061 tristate "Broadcom STB RESCAL reset controller"
0062 depends on HAS_IOMEM
0063 depends on ARCH_BRCMSTB || COMPILE_TEST
0064 default ARCH_BRCMSTB
0065 help
0066 This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
0067 BCM7216.
0068
0069 config RESET_HSDK
0070 bool "Synopsys HSDK Reset Driver"
0071 depends on HAS_IOMEM
0072 depends on ARC_SOC_HSDK || COMPILE_TEST
0073 help
0074 This enables the reset controller driver for HSDK board.
0075
0076 config RESET_IMX7
0077 tristate "i.MX7/8 Reset Driver"
0078 depends on HAS_IOMEM
0079 depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
0080 default y if SOC_IMX7D
0081 select MFD_SYSCON
0082 help
0083 This enables the reset controller driver for i.MX7 SoCs.
0084
0085 config RESET_INTEL_GW
0086 bool "Intel Reset Controller Driver"
0087 depends on X86 || COMPILE_TEST
0088 depends on OF && HAS_IOMEM
0089 select REGMAP_MMIO
0090 help
0091 This enables the reset controller driver for Intel Gateway SoCs.
0092 Say Y to control the reset signals provided by reset controller.
0093 Otherwise, say N.
0094
0095 config RESET_K210
0096 bool "Reset controller driver for Canaan Kendryte K210 SoC"
0097 depends on (SOC_CANAAN || COMPILE_TEST) && OF
0098 select MFD_SYSCON
0099 default SOC_CANAAN
0100 help
0101 Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
0102 Say Y if you want to control reset signals provided by this
0103 controller.
0104
0105 config RESET_LANTIQ
0106 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
0107 default SOC_TYPE_XWAY
0108 help
0109 This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
0110
0111 config RESET_LPC18XX
0112 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
0113 default ARCH_LPC18XX
0114 help
0115 This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
0116
0117 config RESET_MCHP_SPARX5
0118 bool "Microchip Sparx5 reset driver"
0119 depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST
0120 default y if SPARX5_SWITCH
0121 select MFD_SYSCON
0122 help
0123 This driver supports switch core reset for the Microchip Sparx5 SoC.
0124
0125 config RESET_MESON
0126 tristate "Meson Reset Driver"
0127 depends on ARCH_MESON || COMPILE_TEST
0128 default ARCH_MESON
0129 help
0130 This enables the reset driver for Amlogic Meson SoCs.
0131
0132 config RESET_MESON_AUDIO_ARB
0133 tristate "Meson Audio Memory Arbiter Reset Driver"
0134 depends on ARCH_MESON || COMPILE_TEST
0135 help
0136 This enables the reset driver for Audio Memory Arbiter of
0137 Amlogic's A113 based SoCs
0138
0139 config RESET_NPCM
0140 bool "NPCM BMC Reset Driver" if COMPILE_TEST
0141 default ARCH_NPCM
0142 help
0143 This enables the reset controller driver for Nuvoton NPCM
0144 BMC SoCs.
0145
0146 config RESET_OXNAS
0147 bool
0148
0149 config RESET_PISTACHIO
0150 bool "Pistachio Reset Driver"
0151 depends on MIPS || COMPILE_TEST
0152 help
0153 This enables the reset driver for ImgTec Pistachio SoCs.
0154
0155 config RESET_QCOM_AOSS
0156 tristate "Qcom AOSS Reset Driver"
0157 depends on ARCH_QCOM || COMPILE_TEST
0158 help
0159 This enables the AOSS (always on subsystem) reset driver
0160 for Qualcomm SDM845 SoCs. Say Y if you want to control
0161 reset signals provided by AOSS for Modem, Venus, ADSP,
0162 GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
0163
0164 config RESET_QCOM_PDC
0165 tristate "Qualcomm PDC Reset Driver"
0166 depends on ARCH_QCOM || COMPILE_TEST
0167 help
0168 This enables the PDC (Power Domain Controller) reset driver
0169 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
0170 to control reset signals provided by PDC for Modem, Compute,
0171 Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
0172
0173 config RESET_RASPBERRYPI
0174 tristate "Raspberry Pi 4 Firmware Reset Driver"
0175 depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
0176 default USB_XHCI_PCI
0177 help
0178 Raspberry Pi 4's co-processor controls some of the board's HW
0179 initialization process, but it's up to Linux to trigger it when
0180 relevant. This driver provides a reset controller capable of
0181 interfacing with RPi4's co-processor and model these firmware
0182 initialization routines as reset lines.
0183
0184 config RESET_RZG2L_USBPHY_CTRL
0185 tristate "Renesas RZ/G2L USBPHY control driver"
0186 depends on ARCH_RZG2L || COMPILE_TEST
0187 help
0188 Support for USBPHY Control found on RZ/G2L family. It mainly
0189 controls reset and power down of the USB/PHY.
0190
0191 config RESET_SCMI
0192 tristate "Reset driver controlled via ARM SCMI interface"
0193 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
0194 default ARM_SCMI_PROTOCOL
0195 help
0196 This driver provides support for reset signal/domains that are
0197 controlled by firmware that implements the SCMI interface.
0198
0199 This driver uses SCMI Message Protocol to interact with the
0200 firmware controlling all the reset signals.
0201
0202 config RESET_SIMPLE
0203 bool "Simple Reset Controller Driver" if COMPILE_TEST || EXPERT
0204 default ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
0205 depends on HAS_IOMEM
0206 help
0207 This enables a simple reset controller driver for reset lines that
0208 that can be asserted and deasserted by toggling bits in a contiguous,
0209 exclusive register space.
0210
0211 Currently this driver supports:
0212 - Altera SoCFPGAs
0213 - ASPEED BMC SoCs
0214 - Bitmain BM1880 SoC
0215 - Realtek SoCs
0216 - RCC reset controller in STM32 MCUs
0217 - Allwinner SoCs
0218 - SiFive FU740 SoCs
0219
0220 config RESET_SOCFPGA
0221 bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA)
0222 default ARM && ARCH_INTEL_SOCFPGA
0223 select RESET_SIMPLE
0224 help
0225 This enables the reset driver for the SoCFPGA ARMv7 platforms. This
0226 driver gets initialized early during platform init calls.
0227
0228 config RESET_STARFIVE_JH7100
0229 bool "StarFive JH7100 Reset Driver"
0230 depends on SOC_STARFIVE || COMPILE_TEST
0231 default SOC_STARFIVE
0232 help
0233 This enables the reset controller driver for the StarFive JH7100 SoC.
0234
0235 config RESET_SUNPLUS
0236 bool "Sunplus SoCs Reset Driver" if COMPILE_TEST
0237 default ARCH_SUNPLUS
0238 help
0239 This enables the reset driver support for Sunplus SoCs.
0240 The reset lines that can be asserted and deasserted by toggling bits
0241 in a contiguous, exclusive register space. The register is HIWORD_MASKED,
0242 which means each register holds 16 reset lines.
0243
0244 config RESET_SUNXI
0245 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
0246 default ARCH_SUNXI
0247 select RESET_SIMPLE
0248 help
0249 This enables the reset driver for Allwinner SoCs.
0250
0251 config RESET_TI_SCI
0252 tristate "TI System Control Interface (TI-SCI) reset driver"
0253 depends on TI_SCI_PROTOCOL || COMPILE_TEST
0254 help
0255 This enables the reset driver support over TI System Control Interface
0256 available on some new TI's SoCs. If you wish to use reset resources
0257 managed by the TI System Controller, say Y here. Otherwise, say N.
0258
0259 config RESET_TI_SYSCON
0260 tristate "TI SYSCON Reset Driver"
0261 depends on HAS_IOMEM
0262 select MFD_SYSCON
0263 help
0264 This enables the reset driver support for TI devices with
0265 memory-mapped reset registers as part of a syscon device node. If
0266 you wish to use the reset framework for such memory-mapped devices,
0267 say Y here. Otherwise, say N.
0268
0269 config RESET_TI_TPS380X
0270 tristate "TI TPS380x Reset Driver"
0271 select GPIOLIB
0272 help
0273 This enables the reset driver support for TI TPS380x devices. If
0274 you wish to use the reset framework for such devices, say Y here.
0275 Otherwise, say N.
0276
0277 config RESET_TN48M_CPLD
0278 tristate "Delta Networks TN48M switch CPLD reset controller"
0279 depends on MFD_TN48M_CPLD || COMPILE_TEST
0280 default MFD_TN48M_CPLD
0281 help
0282 This enables the reset controller driver for the Delta TN48M CPLD.
0283 It provides reset signals for Armada 7040 and 385 SoC-s, Alleycat 3X
0284 switch MAC-s, Alaska OOB ethernet PHY, Quad Alaska ethernet PHY-s and
0285 Microchip PD69200 PoE PSE controller.
0286
0287 This driver can also be built as a module. If so, the module will be
0288 called reset-tn48m.
0289
0290 config RESET_UNIPHIER
0291 tristate "Reset controller driver for UniPhier SoCs"
0292 depends on ARCH_UNIPHIER || COMPILE_TEST
0293 depends on OF && MFD_SYSCON
0294 default ARCH_UNIPHIER
0295 help
0296 Support for reset controllers on UniPhier SoCs.
0297 Say Y if you want to control reset signals provided by System Control
0298 block, Media I/O block, Peripheral Block.
0299
0300 config RESET_UNIPHIER_GLUE
0301 tristate "Reset driver in glue layer for UniPhier SoCs"
0302 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
0303 default ARCH_UNIPHIER
0304 select RESET_SIMPLE
0305 help
0306 Support for peripheral core reset included in its own glue layer
0307 on UniPhier SoCs. Say Y if you want to control reset signals
0308 provided by the glue layer.
0309
0310 config RESET_ZYNQ
0311 bool "ZYNQ Reset Driver" if COMPILE_TEST
0312 default ARCH_ZYNQ
0313 help
0314 This enables the reset controller driver for Xilinx Zynq SoCs.
0315
0316 source "drivers/reset/sti/Kconfig"
0317 source "drivers/reset/hisilicon/Kconfig"
0318 source "drivers/reset/tegra/Kconfig"
0319
0320 endif
