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0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // Copyright (c) 2019 MediaTek Inc.
0004 
0005 #include <asm/barrier.h>
0006 #include <linux/clk.h>
0007 #include <linux/dma-mapping.h>
0008 #include <linux/err.h>
0009 #include <linux/interrupt.h>
0010 #include <linux/kernel.h>
0011 #include <linux/module.h>
0012 #include <linux/of_address.h>
0013 #include <linux/of_platform.h>
0014 #include <linux/of_reserved_mem.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/remoteproc.h>
0017 #include <linux/remoteproc/mtk_scp.h>
0018 #include <linux/rpmsg/mtk_rpmsg.h>
0019 
0020 #include "mtk_common.h"
0021 #include "remoteproc_internal.h"
0022 
0023 #define MAX_CODE_SIZE 0x500000
0024 #define SECTION_NAME_IPI_BUFFER ".ipi_buffer"
0025 
0026 /**
0027  * scp_get() - get a reference to SCP.
0028  *
0029  * @pdev:   the platform device of the module requesting SCP platform
0030  *      device for using SCP API.
0031  *
0032  * Return: Return NULL if failed.  otherwise reference to SCP.
0033  **/
0034 struct mtk_scp *scp_get(struct platform_device *pdev)
0035 {
0036     struct device *dev = &pdev->dev;
0037     struct device_node *scp_node;
0038     struct platform_device *scp_pdev;
0039 
0040     scp_node = of_parse_phandle(dev->of_node, "mediatek,scp", 0);
0041     if (!scp_node) {
0042         dev_err(dev, "can't get SCP node\n");
0043         return NULL;
0044     }
0045 
0046     scp_pdev = of_find_device_by_node(scp_node);
0047     of_node_put(scp_node);
0048 
0049     if (WARN_ON(!scp_pdev)) {
0050         dev_err(dev, "SCP pdev failed\n");
0051         return NULL;
0052     }
0053 
0054     return platform_get_drvdata(scp_pdev);
0055 }
0056 EXPORT_SYMBOL_GPL(scp_get);
0057 
0058 /**
0059  * scp_put() - "free" the SCP
0060  *
0061  * @scp:    mtk_scp structure from scp_get().
0062  **/
0063 void scp_put(struct mtk_scp *scp)
0064 {
0065     put_device(scp->dev);
0066 }
0067 EXPORT_SYMBOL_GPL(scp_put);
0068 
0069 static void scp_wdt_handler(struct mtk_scp *scp, u32 scp_to_host)
0070 {
0071     dev_err(scp->dev, "SCP watchdog timeout! 0x%x", scp_to_host);
0072     rproc_report_crash(scp->rproc, RPROC_WATCHDOG);
0073 }
0074 
0075 static void scp_init_ipi_handler(void *data, unsigned int len, void *priv)
0076 {
0077     struct mtk_scp *scp = (struct mtk_scp *)priv;
0078     struct scp_run *run = (struct scp_run *)data;
0079 
0080     scp->run.signaled = run->signaled;
0081     strscpy(scp->run.fw_ver, run->fw_ver, SCP_FW_VER_LEN);
0082     scp->run.dec_capability = run->dec_capability;
0083     scp->run.enc_capability = run->enc_capability;
0084     wake_up_interruptible(&scp->run.wq);
0085 }
0086 
0087 static void scp_ipi_handler(struct mtk_scp *scp)
0088 {
0089     struct mtk_share_obj __iomem *rcv_obj = scp->recv_buf;
0090     struct scp_ipi_desc *ipi_desc = scp->ipi_desc;
0091     u8 tmp_data[SCP_SHARE_BUFFER_SIZE];
0092     scp_ipi_handler_t handler;
0093     u32 id = readl(&rcv_obj->id);
0094     u32 len = readl(&rcv_obj->len);
0095 
0096     if (len > SCP_SHARE_BUFFER_SIZE) {
0097         dev_err(scp->dev, "ipi message too long (len %d, max %d)", len,
0098             SCP_SHARE_BUFFER_SIZE);
0099         return;
0100     }
0101     if (id >= SCP_IPI_MAX) {
0102         dev_err(scp->dev, "No such ipi id = %d\n", id);
0103         return;
0104     }
0105 
0106     scp_ipi_lock(scp, id);
0107     handler = ipi_desc[id].handler;
0108     if (!handler) {
0109         dev_err(scp->dev, "No such ipi id = %d\n", id);
0110         scp_ipi_unlock(scp, id);
0111         return;
0112     }
0113 
0114     memcpy_fromio(tmp_data, &rcv_obj->share_buf, len);
0115     handler(tmp_data, len, ipi_desc[id].priv);
0116     scp_ipi_unlock(scp, id);
0117 
0118     scp->ipi_id_ack[id] = true;
0119     wake_up(&scp->ack_wq);
0120 }
0121 
0122 static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp,
0123                      const struct firmware *fw,
0124                      size_t *offset);
0125 
0126 static int scp_ipi_init(struct mtk_scp *scp, const struct firmware *fw)
0127 {
0128     int ret;
0129     size_t offset;
0130 
0131     /* read the ipi buf addr from FW itself first */
0132     ret = scp_elf_read_ipi_buf_addr(scp, fw, &offset);
0133     if (ret) {
0134         /* use default ipi buf addr if the FW doesn't have it */
0135         offset = scp->data->ipi_buf_offset;
0136         if (!offset)
0137             return ret;
0138     }
0139     dev_info(scp->dev, "IPI buf addr %#010zx\n", offset);
0140 
0141     scp->recv_buf = (struct mtk_share_obj __iomem *)
0142             (scp->sram_base + offset);
0143     scp->send_buf = (struct mtk_share_obj __iomem *)
0144             (scp->sram_base + offset + sizeof(*scp->recv_buf));
0145     memset_io(scp->recv_buf, 0, sizeof(*scp->recv_buf));
0146     memset_io(scp->send_buf, 0, sizeof(*scp->send_buf));
0147 
0148     return 0;
0149 }
0150 
0151 static void mt8183_scp_reset_assert(struct mtk_scp *scp)
0152 {
0153     u32 val;
0154 
0155     val = readl(scp->reg_base + MT8183_SW_RSTN);
0156     val &= ~MT8183_SW_RSTN_BIT;
0157     writel(val, scp->reg_base + MT8183_SW_RSTN);
0158 }
0159 
0160 static void mt8183_scp_reset_deassert(struct mtk_scp *scp)
0161 {
0162     u32 val;
0163 
0164     val = readl(scp->reg_base + MT8183_SW_RSTN);
0165     val |= MT8183_SW_RSTN_BIT;
0166     writel(val, scp->reg_base + MT8183_SW_RSTN);
0167 }
0168 
0169 static void mt8192_scp_reset_assert(struct mtk_scp *scp)
0170 {
0171     writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
0172 }
0173 
0174 static void mt8192_scp_reset_deassert(struct mtk_scp *scp)
0175 {
0176     writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_CLR);
0177 }
0178 
0179 static void mt8183_scp_irq_handler(struct mtk_scp *scp)
0180 {
0181     u32 scp_to_host;
0182 
0183     scp_to_host = readl(scp->reg_base + MT8183_SCP_TO_HOST);
0184     if (scp_to_host & MT8183_SCP_IPC_INT_BIT)
0185         scp_ipi_handler(scp);
0186     else
0187         scp_wdt_handler(scp, scp_to_host);
0188 
0189     /* SCP won't send another interrupt until we set SCP_TO_HOST to 0. */
0190     writel(MT8183_SCP_IPC_INT_BIT | MT8183_SCP_WDT_INT_BIT,
0191            scp->reg_base + MT8183_SCP_TO_HOST);
0192 }
0193 
0194 static void mt8192_scp_irq_handler(struct mtk_scp *scp)
0195 {
0196     u32 scp_to_host;
0197 
0198     scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET);
0199 
0200     if (scp_to_host & MT8192_SCP_IPC_INT_BIT) {
0201         scp_ipi_handler(scp);
0202 
0203         /*
0204          * SCP won't send another interrupt until we clear
0205          * MT8192_SCP2APMCU_IPC.
0206          */
0207         writel(MT8192_SCP_IPC_INT_BIT,
0208                scp->reg_base + MT8192_SCP2APMCU_IPC_CLR);
0209     } else {
0210         scp_wdt_handler(scp, scp_to_host);
0211         writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ);
0212     }
0213 }
0214 
0215 static irqreturn_t scp_irq_handler(int irq, void *priv)
0216 {
0217     struct mtk_scp *scp = priv;
0218     int ret;
0219 
0220     ret = clk_prepare_enable(scp->clk);
0221     if (ret) {
0222         dev_err(scp->dev, "failed to enable clocks\n");
0223         return IRQ_NONE;
0224     }
0225 
0226     scp->data->scp_irq_handler(scp);
0227 
0228     clk_disable_unprepare(scp->clk);
0229 
0230     return IRQ_HANDLED;
0231 }
0232 
0233 static int scp_elf_load_segments(struct rproc *rproc, const struct firmware *fw)
0234 {
0235     struct device *dev = &rproc->dev;
0236     struct elf32_hdr *ehdr;
0237     struct elf32_phdr *phdr;
0238     int i, ret = 0;
0239     const u8 *elf_data = fw->data;
0240 
0241     ehdr = (struct elf32_hdr *)elf_data;
0242     phdr = (struct elf32_phdr *)(elf_data + ehdr->e_phoff);
0243 
0244     /* go through the available ELF segments */
0245     for (i = 0; i < ehdr->e_phnum; i++, phdr++) {
0246         u32 da = phdr->p_paddr;
0247         u32 memsz = phdr->p_memsz;
0248         u32 filesz = phdr->p_filesz;
0249         u32 offset = phdr->p_offset;
0250         void __iomem *ptr;
0251 
0252         dev_dbg(dev, "phdr: type %d da 0x%x memsz 0x%x filesz 0x%x\n",
0253             phdr->p_type, da, memsz, filesz);
0254 
0255         if (phdr->p_type != PT_LOAD)
0256             continue;
0257         if (!filesz)
0258             continue;
0259 
0260         if (filesz > memsz) {
0261             dev_err(dev, "bad phdr filesz 0x%x memsz 0x%x\n",
0262                 filesz, memsz);
0263             ret = -EINVAL;
0264             break;
0265         }
0266 
0267         if (offset + filesz > fw->size) {
0268             dev_err(dev, "truncated fw: need 0x%x avail 0x%zx\n",
0269                 offset + filesz, fw->size);
0270             ret = -EINVAL;
0271             break;
0272         }
0273 
0274         /* grab the kernel address for this device address */
0275         ptr = (void __iomem *)rproc_da_to_va(rproc, da, memsz, NULL);
0276         if (!ptr) {
0277             dev_err(dev, "bad phdr da 0x%x mem 0x%x\n", da, memsz);
0278             ret = -EINVAL;
0279             break;
0280         }
0281 
0282         /* put the segment where the remote processor expects it */
0283         scp_memcpy_aligned(ptr, elf_data + phdr->p_offset, filesz);
0284     }
0285 
0286     return ret;
0287 }
0288 
0289 static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp,
0290                      const struct firmware *fw,
0291                      size_t *offset)
0292 {
0293     struct elf32_hdr *ehdr;
0294     struct elf32_shdr *shdr, *shdr_strtab;
0295     int i;
0296     const u8 *elf_data = fw->data;
0297     const char *strtab;
0298 
0299     ehdr = (struct elf32_hdr *)elf_data;
0300     shdr = (struct elf32_shdr *)(elf_data + ehdr->e_shoff);
0301     shdr_strtab = shdr + ehdr->e_shstrndx;
0302     strtab = (const char *)(elf_data + shdr_strtab->sh_offset);
0303 
0304     for (i = 0; i < ehdr->e_shnum; i++, shdr++) {
0305         if (strcmp(strtab + shdr->sh_name,
0306                SECTION_NAME_IPI_BUFFER) == 0) {
0307             *offset = shdr->sh_addr;
0308             return 0;
0309         }
0310     }
0311 
0312     return -ENOENT;
0313 }
0314 
0315 static int mt8183_scp_clk_get(struct mtk_scp *scp)
0316 {
0317     struct device *dev = scp->dev;
0318     int ret = 0;
0319 
0320     scp->clk = devm_clk_get(dev, "main");
0321     if (IS_ERR(scp->clk)) {
0322         dev_err(dev, "Failed to get clock\n");
0323         ret = PTR_ERR(scp->clk);
0324     }
0325 
0326     return ret;
0327 }
0328 
0329 static int mt8192_scp_clk_get(struct mtk_scp *scp)
0330 {
0331     return mt8183_scp_clk_get(scp);
0332 }
0333 
0334 static int mt8195_scp_clk_get(struct mtk_scp *scp)
0335 {
0336     scp->clk = NULL;
0337 
0338     return 0;
0339 }
0340 
0341 static int mt8183_scp_before_load(struct mtk_scp *scp)
0342 {
0343     /* Clear SCP to host interrupt */
0344     writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST);
0345 
0346     /* Reset clocks before loading FW */
0347     writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL);
0348     writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL);
0349 
0350     /* Initialize TCM before loading FW. */
0351     writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD);
0352     writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD);
0353 
0354     /* Turn on the power of SCP's SRAM before using it. */
0355     writel(0x0, scp->reg_base + MT8183_SCP_SRAM_PDN);
0356 
0357     /*
0358      * Set I-cache and D-cache size before loading SCP FW.
0359      * SCP SRAM logical address may change when cache size setting differs.
0360      */
0361     writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB,
0362            scp->reg_base + MT8183_SCP_CACHE_CON);
0363     writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON);
0364 
0365     return 0;
0366 }
0367 
0368 static void scp_sram_power_on(void __iomem *addr, u32 reserved_mask)
0369 {
0370     int i;
0371 
0372     for (i = 31; i >= 0; i--)
0373         writel(GENMASK(i, 0) & ~reserved_mask, addr);
0374     writel(0, addr);
0375 }
0376 
0377 static void scp_sram_power_off(void __iomem *addr, u32 reserved_mask)
0378 {
0379     int i;
0380 
0381     writel(0, addr);
0382     for (i = 0; i < 32; i++)
0383         writel(GENMASK(i, 0) & ~reserved_mask, addr);
0384 }
0385 
0386 static int mt8186_scp_before_load(struct mtk_scp *scp)
0387 {
0388     /* Clear SCP to host interrupt */
0389     writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST);
0390 
0391     /* Reset clocks before loading FW */
0392     writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL);
0393     writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL);
0394 
0395     /* Turn on the power of SCP's SRAM before using it. Enable 1 block per time*/
0396     scp_sram_power_on(scp->reg_base + MT8183_SCP_SRAM_PDN, 0);
0397 
0398     /* Initialize TCM before loading FW. */
0399     writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD);
0400     writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD);
0401     writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_P1);
0402     writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_p2);
0403 
0404     /*
0405      * Set I-cache and D-cache size before loading SCP FW.
0406      * SCP SRAM logical address may change when cache size setting differs.
0407      */
0408     writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB,
0409            scp->reg_base + MT8183_SCP_CACHE_CON);
0410     writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON);
0411 
0412     return 0;
0413 }
0414 
0415 static int mt8192_scp_before_load(struct mtk_scp *scp)
0416 {
0417     /* clear SPM interrupt, SCP2SPM_IPC_CLR */
0418     writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR);
0419 
0420     writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
0421 
0422     /* enable SRAM clock */
0423     scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
0424     scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
0425     scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
0426     scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0);
0427     scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
0428 
0429     /* enable MPU for all memory regions */
0430     writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
0431 
0432     return 0;
0433 }
0434 
0435 static int mt8195_scp_before_load(struct mtk_scp *scp)
0436 {
0437     /* clear SPM interrupt, SCP2SPM_IPC_CLR */
0438     writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR);
0439 
0440     writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
0441 
0442     /* enable SRAM clock */
0443     scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
0444     scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
0445     scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
0446     scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN,
0447               MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS);
0448     scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
0449 
0450     /* enable MPU for all memory regions */
0451     writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
0452 
0453     return 0;
0454 }
0455 
0456 static int scp_load(struct rproc *rproc, const struct firmware *fw)
0457 {
0458     struct mtk_scp *scp = rproc->priv;
0459     struct device *dev = scp->dev;
0460     int ret;
0461 
0462     ret = clk_prepare_enable(scp->clk);
0463     if (ret) {
0464         dev_err(dev, "failed to enable clocks\n");
0465         return ret;
0466     }
0467 
0468     /* Hold SCP in reset while loading FW. */
0469     scp->data->scp_reset_assert(scp);
0470 
0471     ret = scp->data->scp_before_load(scp);
0472     if (ret < 0)
0473         goto leave;
0474 
0475     ret = scp_elf_load_segments(rproc, fw);
0476 leave:
0477     clk_disable_unprepare(scp->clk);
0478 
0479     return ret;
0480 }
0481 
0482 static int scp_parse_fw(struct rproc *rproc, const struct firmware *fw)
0483 {
0484     struct mtk_scp *scp = rproc->priv;
0485     struct device *dev = scp->dev;
0486     int ret;
0487 
0488     ret = clk_prepare_enable(scp->clk);
0489     if (ret) {
0490         dev_err(dev, "failed to enable clocks\n");
0491         return ret;
0492     }
0493 
0494     ret = scp_ipi_init(scp, fw);
0495     clk_disable_unprepare(scp->clk);
0496     return ret;
0497 }
0498 
0499 static int scp_start(struct rproc *rproc)
0500 {
0501     struct mtk_scp *scp = (struct mtk_scp *)rproc->priv;
0502     struct device *dev = scp->dev;
0503     struct scp_run *run = &scp->run;
0504     int ret;
0505 
0506     ret = clk_prepare_enable(scp->clk);
0507     if (ret) {
0508         dev_err(dev, "failed to enable clocks\n");
0509         return ret;
0510     }
0511 
0512     run->signaled = false;
0513 
0514     scp->data->scp_reset_deassert(scp);
0515 
0516     ret = wait_event_interruptible_timeout(
0517                     run->wq,
0518                     run->signaled,
0519                     msecs_to_jiffies(2000));
0520 
0521     if (ret == 0) {
0522         dev_err(dev, "wait SCP initialization timeout!\n");
0523         ret = -ETIME;
0524         goto stop;
0525     }
0526     if (ret == -ERESTARTSYS) {
0527         dev_err(dev, "wait SCP interrupted by a signal!\n");
0528         goto stop;
0529     }
0530 
0531     clk_disable_unprepare(scp->clk);
0532     dev_info(dev, "SCP is ready. FW version %s\n", run->fw_ver);
0533 
0534     return 0;
0535 
0536 stop:
0537     scp->data->scp_reset_assert(scp);
0538     clk_disable_unprepare(scp->clk);
0539     return ret;
0540 }
0541 
0542 static void *mt8183_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len)
0543 {
0544     int offset;
0545 
0546     if (da < scp->sram_size) {
0547         offset = da;
0548         if (offset >= 0 && (offset + len) <= scp->sram_size)
0549             return (void __force *)scp->sram_base + offset;
0550     } else if (scp->dram_size) {
0551         offset = da - scp->dma_addr;
0552         if (offset >= 0 && (offset + len) <= scp->dram_size)
0553             return scp->cpu_addr + offset;
0554     }
0555 
0556     return NULL;
0557 }
0558 
0559 static void *mt8192_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len)
0560 {
0561     int offset;
0562 
0563     if (da >= scp->sram_phys &&
0564         (da + len) <= scp->sram_phys + scp->sram_size) {
0565         offset = da - scp->sram_phys;
0566         return (void __force *)scp->sram_base + offset;
0567     }
0568 
0569     /* optional memory region */
0570     if (scp->l1tcm_size &&
0571         da >= scp->l1tcm_phys &&
0572         (da + len) <= scp->l1tcm_phys + scp->l1tcm_size) {
0573         offset = da - scp->l1tcm_phys;
0574         return (void __force *)scp->l1tcm_base + offset;
0575     }
0576 
0577     /* optional memory region */
0578     if (scp->dram_size &&
0579         da >= scp->dma_addr &&
0580         (da + len) <= scp->dma_addr + scp->dram_size) {
0581         offset = da - scp->dma_addr;
0582         return scp->cpu_addr + offset;
0583     }
0584 
0585     return NULL;
0586 }
0587 
0588 static void *scp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
0589 {
0590     struct mtk_scp *scp = (struct mtk_scp *)rproc->priv;
0591 
0592     return scp->data->scp_da_to_va(scp, da, len);
0593 }
0594 
0595 static void mt8183_scp_stop(struct mtk_scp *scp)
0596 {
0597     /* Disable SCP watchdog */
0598     writel(0, scp->reg_base + MT8183_WDT_CFG);
0599 }
0600 
0601 static void mt8192_scp_stop(struct mtk_scp *scp)
0602 {
0603     /* Disable SRAM clock */
0604     scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
0605     scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
0606     scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
0607     scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0);
0608     scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
0609 
0610     /* Disable SCP watchdog */
0611     writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG);
0612 }
0613 
0614 static void mt8195_scp_stop(struct mtk_scp *scp)
0615 {
0616     /* Disable SRAM clock */
0617     scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
0618     scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
0619     scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
0620     scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN,
0621                MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS);
0622     scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
0623 
0624     /* Disable SCP watchdog */
0625     writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG);
0626 }
0627 
0628 static int scp_stop(struct rproc *rproc)
0629 {
0630     struct mtk_scp *scp = (struct mtk_scp *)rproc->priv;
0631     int ret;
0632 
0633     ret = clk_prepare_enable(scp->clk);
0634     if (ret) {
0635         dev_err(scp->dev, "failed to enable clocks\n");
0636         return ret;
0637     }
0638 
0639     scp->data->scp_reset_assert(scp);
0640     scp->data->scp_stop(scp);
0641     clk_disable_unprepare(scp->clk);
0642 
0643     return 0;
0644 }
0645 
0646 static const struct rproc_ops scp_ops = {
0647     .start      = scp_start,
0648     .stop       = scp_stop,
0649     .load       = scp_load,
0650     .da_to_va   = scp_da_to_va,
0651     .parse_fw   = scp_parse_fw,
0652 };
0653 
0654 /**
0655  * scp_get_device() - get device struct of SCP
0656  *
0657  * @scp:    mtk_scp structure
0658  **/
0659 struct device *scp_get_device(struct mtk_scp *scp)
0660 {
0661     return scp->dev;
0662 }
0663 EXPORT_SYMBOL_GPL(scp_get_device);
0664 
0665 /**
0666  * scp_get_rproc() - get rproc struct of SCP
0667  *
0668  * @scp:    mtk_scp structure
0669  **/
0670 struct rproc *scp_get_rproc(struct mtk_scp *scp)
0671 {
0672     return scp->rproc;
0673 }
0674 EXPORT_SYMBOL_GPL(scp_get_rproc);
0675 
0676 /**
0677  * scp_get_vdec_hw_capa() - get video decoder hardware capability
0678  *
0679  * @scp:    mtk_scp structure
0680  *
0681  * Return: video decoder hardware capability
0682  **/
0683 unsigned int scp_get_vdec_hw_capa(struct mtk_scp *scp)
0684 {
0685     return scp->run.dec_capability;
0686 }
0687 EXPORT_SYMBOL_GPL(scp_get_vdec_hw_capa);
0688 
0689 /**
0690  * scp_get_venc_hw_capa() - get video encoder hardware capability
0691  *
0692  * @scp:    mtk_scp structure
0693  *
0694  * Return: video encoder hardware capability
0695  **/
0696 unsigned int scp_get_venc_hw_capa(struct mtk_scp *scp)
0697 {
0698     return scp->run.enc_capability;
0699 }
0700 EXPORT_SYMBOL_GPL(scp_get_venc_hw_capa);
0701 
0702 /**
0703  * scp_mapping_dm_addr() - Mapping SRAM/DRAM to kernel virtual address
0704  *
0705  * @scp:    mtk_scp structure
0706  * @mem_addr:   SCP views memory address
0707  *
0708  * Mapping the SCP's SRAM address /
0709  * DMEM (Data Extended Memory) memory address /
0710  * Working buffer memory address to
0711  * kernel virtual address.
0712  *
0713  * Return: Return ERR_PTR(-EINVAL) if mapping failed,
0714  * otherwise the mapped kernel virtual address
0715  **/
0716 void *scp_mapping_dm_addr(struct mtk_scp *scp, u32 mem_addr)
0717 {
0718     void *ptr;
0719 
0720     ptr = scp_da_to_va(scp->rproc, mem_addr, 0, NULL);
0721     if (!ptr)
0722         return ERR_PTR(-EINVAL);
0723 
0724     return ptr;
0725 }
0726 EXPORT_SYMBOL_GPL(scp_mapping_dm_addr);
0727 
0728 static int scp_map_memory_region(struct mtk_scp *scp)
0729 {
0730     int ret;
0731 
0732     ret = of_reserved_mem_device_init(scp->dev);
0733 
0734     /* reserved memory is optional. */
0735     if (ret == -ENODEV) {
0736         dev_info(scp->dev, "skipping reserved memory initialization.");
0737         return 0;
0738     }
0739 
0740     if (ret) {
0741         dev_err(scp->dev, "failed to assign memory-region: %d\n", ret);
0742         return -ENOMEM;
0743     }
0744 
0745     /* Reserved SCP code size */
0746     scp->dram_size = MAX_CODE_SIZE;
0747     scp->cpu_addr = dma_alloc_coherent(scp->dev, scp->dram_size,
0748                        &scp->dma_addr, GFP_KERNEL);
0749     if (!scp->cpu_addr)
0750         return -ENOMEM;
0751 
0752     return 0;
0753 }
0754 
0755 static void scp_unmap_memory_region(struct mtk_scp *scp)
0756 {
0757     if (scp->dram_size == 0)
0758         return;
0759 
0760     dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr,
0761               scp->dma_addr);
0762     of_reserved_mem_device_release(scp->dev);
0763 }
0764 
0765 static int scp_register_ipi(struct platform_device *pdev, u32 id,
0766                 ipi_handler_t handler, void *priv)
0767 {
0768     struct mtk_scp *scp = platform_get_drvdata(pdev);
0769 
0770     return scp_ipi_register(scp, id, handler, priv);
0771 }
0772 
0773 static void scp_unregister_ipi(struct platform_device *pdev, u32 id)
0774 {
0775     struct mtk_scp *scp = platform_get_drvdata(pdev);
0776 
0777     scp_ipi_unregister(scp, id);
0778 }
0779 
0780 static int scp_send_ipi(struct platform_device *pdev, u32 id, void *buf,
0781             unsigned int len, unsigned int wait)
0782 {
0783     struct mtk_scp *scp = platform_get_drvdata(pdev);
0784 
0785     return scp_ipi_send(scp, id, buf, len, wait);
0786 }
0787 
0788 static struct mtk_rpmsg_info mtk_scp_rpmsg_info = {
0789     .send_ipi = scp_send_ipi,
0790     .register_ipi = scp_register_ipi,
0791     .unregister_ipi = scp_unregister_ipi,
0792     .ns_ipi_id = SCP_IPI_NS_SERVICE,
0793 };
0794 
0795 static void scp_add_rpmsg_subdev(struct mtk_scp *scp)
0796 {
0797     scp->rpmsg_subdev =
0798         mtk_rpmsg_create_rproc_subdev(to_platform_device(scp->dev),
0799                           &mtk_scp_rpmsg_info);
0800     if (scp->rpmsg_subdev)
0801         rproc_add_subdev(scp->rproc, scp->rpmsg_subdev);
0802 }
0803 
0804 static void scp_remove_rpmsg_subdev(struct mtk_scp *scp)
0805 {
0806     if (scp->rpmsg_subdev) {
0807         rproc_remove_subdev(scp->rproc, scp->rpmsg_subdev);
0808         mtk_rpmsg_destroy_rproc_subdev(scp->rpmsg_subdev);
0809         scp->rpmsg_subdev = NULL;
0810     }
0811 }
0812 
0813 static int scp_probe(struct platform_device *pdev)
0814 {
0815     struct device *dev = &pdev->dev;
0816     struct device_node *np = dev->of_node;
0817     struct mtk_scp *scp;
0818     struct rproc *rproc;
0819     struct resource *res;
0820     const char *fw_name = "scp.img";
0821     int ret, i;
0822 
0823     ret = rproc_of_parse_firmware(dev, 0, &fw_name);
0824     if (ret < 0 && ret != -EINVAL)
0825         return ret;
0826 
0827     rproc = devm_rproc_alloc(dev, np->name, &scp_ops, fw_name, sizeof(*scp));
0828     if (!rproc)
0829         return dev_err_probe(dev, -ENOMEM, "unable to allocate remoteproc\n");
0830 
0831     scp = (struct mtk_scp *)rproc->priv;
0832     scp->rproc = rproc;
0833     scp->dev = dev;
0834     scp->data = of_device_get_match_data(dev);
0835     platform_set_drvdata(pdev, scp);
0836 
0837     res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram");
0838     scp->sram_base = devm_ioremap_resource(dev, res);
0839     if (IS_ERR(scp->sram_base))
0840         return dev_err_probe(dev, PTR_ERR(scp->sram_base),
0841                      "Failed to parse and map sram memory\n");
0842 
0843     scp->sram_size = resource_size(res);
0844     scp->sram_phys = res->start;
0845 
0846     /* l1tcm is an optional memory region */
0847     res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "l1tcm");
0848     scp->l1tcm_base = devm_ioremap_resource(dev, res);
0849     if (IS_ERR(scp->l1tcm_base)) {
0850         ret = PTR_ERR(scp->l1tcm_base);
0851         if (ret != -EINVAL) {
0852             return dev_err_probe(dev, ret, "Failed to map l1tcm memory\n");
0853         }
0854     } else {
0855         scp->l1tcm_size = resource_size(res);
0856         scp->l1tcm_phys = res->start;
0857     }
0858 
0859     scp->reg_base = devm_platform_ioremap_resource_byname(pdev, "cfg");
0860     if (IS_ERR(scp->reg_base))
0861         return dev_err_probe(dev, PTR_ERR(scp->reg_base),
0862                      "Failed to parse and map cfg memory\n");
0863 
0864     ret = scp->data->scp_clk_get(scp);
0865     if (ret)
0866         return ret;
0867 
0868     ret = scp_map_memory_region(scp);
0869     if (ret)
0870         return ret;
0871 
0872     mutex_init(&scp->send_lock);
0873     for (i = 0; i < SCP_IPI_MAX; i++)
0874         mutex_init(&scp->ipi_desc[i].lock);
0875 
0876     /* register SCP initialization IPI */
0877     ret = scp_ipi_register(scp, SCP_IPI_INIT, scp_init_ipi_handler, scp);
0878     if (ret) {
0879         dev_err(dev, "Failed to register IPI_SCP_INIT\n");
0880         goto release_dev_mem;
0881     }
0882 
0883     init_waitqueue_head(&scp->run.wq);
0884     init_waitqueue_head(&scp->ack_wq);
0885 
0886     scp_add_rpmsg_subdev(scp);
0887 
0888     ret = devm_request_threaded_irq(dev, platform_get_irq(pdev, 0), NULL,
0889                     scp_irq_handler, IRQF_ONESHOT,
0890                     pdev->name, scp);
0891 
0892     if (ret) {
0893         dev_err(dev, "failed to request irq\n");
0894         goto remove_subdev;
0895     }
0896 
0897     ret = rproc_add(rproc);
0898     if (ret)
0899         goto remove_subdev;
0900 
0901     return 0;
0902 
0903 remove_subdev:
0904     scp_remove_rpmsg_subdev(scp);
0905     scp_ipi_unregister(scp, SCP_IPI_INIT);
0906 release_dev_mem:
0907     scp_unmap_memory_region(scp);
0908     for (i = 0; i < SCP_IPI_MAX; i++)
0909         mutex_destroy(&scp->ipi_desc[i].lock);
0910     mutex_destroy(&scp->send_lock);
0911 
0912     return ret;
0913 }
0914 
0915 static int scp_remove(struct platform_device *pdev)
0916 {
0917     struct mtk_scp *scp = platform_get_drvdata(pdev);
0918     int i;
0919 
0920     rproc_del(scp->rproc);
0921     scp_remove_rpmsg_subdev(scp);
0922     scp_ipi_unregister(scp, SCP_IPI_INIT);
0923     scp_unmap_memory_region(scp);
0924     for (i = 0; i < SCP_IPI_MAX; i++)
0925         mutex_destroy(&scp->ipi_desc[i].lock);
0926     mutex_destroy(&scp->send_lock);
0927 
0928     return 0;
0929 }
0930 
0931 static const struct mtk_scp_of_data mt8183_of_data = {
0932     .scp_clk_get = mt8183_scp_clk_get,
0933     .scp_before_load = mt8183_scp_before_load,
0934     .scp_irq_handler = mt8183_scp_irq_handler,
0935     .scp_reset_assert = mt8183_scp_reset_assert,
0936     .scp_reset_deassert = mt8183_scp_reset_deassert,
0937     .scp_stop = mt8183_scp_stop,
0938     .scp_da_to_va = mt8183_scp_da_to_va,
0939     .host_to_scp_reg = MT8183_HOST_TO_SCP,
0940     .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT,
0941     .ipi_buf_offset = 0x7bdb0,
0942 };
0943 
0944 static const struct mtk_scp_of_data mt8186_of_data = {
0945     .scp_clk_get = mt8195_scp_clk_get,
0946     .scp_before_load = mt8186_scp_before_load,
0947     .scp_irq_handler = mt8183_scp_irq_handler,
0948     .scp_reset_assert = mt8183_scp_reset_assert,
0949     .scp_reset_deassert = mt8183_scp_reset_deassert,
0950     .scp_stop = mt8183_scp_stop,
0951     .scp_da_to_va = mt8183_scp_da_to_va,
0952     .host_to_scp_reg = MT8183_HOST_TO_SCP,
0953     .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT,
0954     .ipi_buf_offset = 0x3bdb0,
0955 };
0956 
0957 static const struct mtk_scp_of_data mt8188_of_data = {
0958     .scp_clk_get = mt8195_scp_clk_get,
0959     .scp_before_load = mt8192_scp_before_load,
0960     .scp_irq_handler = mt8192_scp_irq_handler,
0961     .scp_reset_assert = mt8192_scp_reset_assert,
0962     .scp_reset_deassert = mt8192_scp_reset_deassert,
0963     .scp_stop = mt8192_scp_stop,
0964     .scp_da_to_va = mt8192_scp_da_to_va,
0965     .host_to_scp_reg = MT8192_GIPC_IN_SET,
0966     .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
0967 };
0968 
0969 static const struct mtk_scp_of_data mt8192_of_data = {
0970     .scp_clk_get = mt8192_scp_clk_get,
0971     .scp_before_load = mt8192_scp_before_load,
0972     .scp_irq_handler = mt8192_scp_irq_handler,
0973     .scp_reset_assert = mt8192_scp_reset_assert,
0974     .scp_reset_deassert = mt8192_scp_reset_deassert,
0975     .scp_stop = mt8192_scp_stop,
0976     .scp_da_to_va = mt8192_scp_da_to_va,
0977     .host_to_scp_reg = MT8192_GIPC_IN_SET,
0978     .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
0979 };
0980 
0981 static const struct mtk_scp_of_data mt8195_of_data = {
0982     .scp_clk_get = mt8195_scp_clk_get,
0983     .scp_before_load = mt8195_scp_before_load,
0984     .scp_irq_handler = mt8192_scp_irq_handler,
0985     .scp_reset_assert = mt8192_scp_reset_assert,
0986     .scp_reset_deassert = mt8192_scp_reset_deassert,
0987     .scp_stop = mt8195_scp_stop,
0988     .scp_da_to_va = mt8192_scp_da_to_va,
0989     .host_to_scp_reg = MT8192_GIPC_IN_SET,
0990     .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
0991 };
0992 
0993 static const struct of_device_id mtk_scp_of_match[] = {
0994     { .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data },
0995     { .compatible = "mediatek,mt8186-scp", .data = &mt8186_of_data },
0996     { .compatible = "mediatek,mt8188-scp", .data = &mt8188_of_data },
0997     { .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data },
0998     { .compatible = "mediatek,mt8195-scp", .data = &mt8195_of_data },
0999     {},
1000 };
1001 MODULE_DEVICE_TABLE(of, mtk_scp_of_match);
1002 
1003 static struct platform_driver mtk_scp_driver = {
1004     .probe = scp_probe,
1005     .remove = scp_remove,
1006     .driver = {
1007         .name = "mtk-scp",
1008         .of_match_table = mtk_scp_of_match,
1009     },
1010 };
1011 
1012 module_platform_driver(mtk_scp_driver);
1013 
1014 MODULE_LICENSE("GPL v2");
1015 MODULE_DESCRIPTION("MediaTek SCP control driver");
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