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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (c) 2019 MediaTek Inc.
0004  */
0005 
0006 #ifndef __RPROC_MTK_COMMON_H
0007 #define __RPROC_MTK_COMMON_H
0008 
0009 #include <linux/interrupt.h>
0010 #include <linux/kernel.h>
0011 #include <linux/platform_device.h>
0012 #include <linux/remoteproc.h>
0013 #include <linux/remoteproc/mtk_scp.h>
0014 
0015 #define MT8183_SW_RSTN          0x0
0016 #define MT8183_SW_RSTN_BIT      BIT(0)
0017 #define MT8183_SCP_TO_HOST      0x1C
0018 #define MT8183_SCP_IPC_INT_BIT      BIT(0)
0019 #define MT8183_SCP_WDT_INT_BIT      BIT(8)
0020 #define MT8183_HOST_TO_SCP      0x28
0021 #define MT8183_HOST_IPC_INT_BIT     BIT(0)
0022 #define MT8183_WDT_CFG          0x84
0023 #define MT8183_SCP_CLK_SW_SEL       0x4000
0024 #define MT8183_SCP_CLK_DIV_SEL      0x4024
0025 #define MT8183_SCP_SRAM_PDN     0x402C
0026 #define MT8183_SCP_L1_SRAM_PD       0x4080
0027 #define MT8183_SCP_TCM_TAIL_SRAM_PD 0x4094
0028 
0029 #define MT8183_SCP_CACHE_SEL(x)     (0x14000 + (x) * 0x3000)
0030 #define MT8183_SCP_CACHE_CON        MT8183_SCP_CACHE_SEL(0)
0031 #define MT8183_SCP_DCACHE_CON       MT8183_SCP_CACHE_SEL(1)
0032 #define MT8183_SCP_CACHESIZE_8KB    BIT(8)
0033 #define MT8183_SCP_CACHE_CON_WAYEN  BIT(10)
0034 
0035 #define MT8186_SCP_L1_SRAM_PD_P1    0x40B0
0036 #define MT8186_SCP_L1_SRAM_PD_p2    0x40B4
0037 
0038 #define MT8192_L2TCM_SRAM_PD_0      0x10C0
0039 #define MT8192_L2TCM_SRAM_PD_1      0x10C4
0040 #define MT8192_L2TCM_SRAM_PD_2      0x10C8
0041 #define MT8192_L1TCM_SRAM_PDN       0x102C
0042 #define MT8192_CPU0_SRAM_PD     0x1080
0043 
0044 #define MT8192_SCP2APMCU_IPC_SET    0x4080
0045 #define MT8192_SCP2APMCU_IPC_CLR    0x4084
0046 #define MT8192_SCP_IPC_INT_BIT      BIT(0)
0047 #define MT8192_SCP2SPM_IPC_CLR      0x4094
0048 #define MT8192_GIPC_IN_SET      0x4098
0049 #define MT8192_HOST_IPC_INT_BIT     BIT(0)
0050 
0051 #define MT8192_CORE0_SW_RSTN_CLR    0x10000
0052 #define MT8192_CORE0_SW_RSTN_SET    0x10004
0053 #define MT8192_CORE0_MEM_ATT_PREDEF 0x10008
0054 #define MT8192_CORE0_WDT_IRQ        0x10030
0055 #define MT8192_CORE0_WDT_CFG        0x10034
0056 
0057 #define MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS     GENMASK(7, 4)
0058 
0059 #define SCP_FW_VER_LEN          32
0060 #define SCP_SHARE_BUFFER_SIZE       288
0061 
0062 struct scp_run {
0063     u32 signaled;
0064     s8 fw_ver[SCP_FW_VER_LEN];
0065     u32 dec_capability;
0066     u32 enc_capability;
0067     wait_queue_head_t wq;
0068 };
0069 
0070 struct scp_ipi_desc {
0071     /* For protecting handler. */
0072     struct mutex lock;
0073     scp_ipi_handler_t handler;
0074     void *priv;
0075 };
0076 
0077 struct mtk_scp;
0078 
0079 struct mtk_scp_of_data {
0080     int (*scp_clk_get)(struct mtk_scp *scp);
0081     int (*scp_before_load)(struct mtk_scp *scp);
0082     void (*scp_irq_handler)(struct mtk_scp *scp);
0083     void (*scp_reset_assert)(struct mtk_scp *scp);
0084     void (*scp_reset_deassert)(struct mtk_scp *scp);
0085     void (*scp_stop)(struct mtk_scp *scp);
0086     void *(*scp_da_to_va)(struct mtk_scp *scp, u64 da, size_t len);
0087 
0088     u32 host_to_scp_reg;
0089     u32 host_to_scp_int_bit;
0090 
0091     size_t ipi_buf_offset;
0092 };
0093 
0094 struct mtk_scp {
0095     struct device *dev;
0096     struct rproc *rproc;
0097     struct clk *clk;
0098     void __iomem *reg_base;
0099     void __iomem *sram_base;
0100     size_t sram_size;
0101     phys_addr_t sram_phys;
0102     void __iomem *l1tcm_base;
0103     size_t l1tcm_size;
0104     phys_addr_t l1tcm_phys;
0105 
0106     const struct mtk_scp_of_data *data;
0107 
0108     struct mtk_share_obj __iomem *recv_buf;
0109     struct mtk_share_obj __iomem *send_buf;
0110     struct scp_run run;
0111     /* To prevent multiple ipi_send run concurrently. */
0112     struct mutex send_lock;
0113     struct scp_ipi_desc ipi_desc[SCP_IPI_MAX];
0114     bool ipi_id_ack[SCP_IPI_MAX];
0115     wait_queue_head_t ack_wq;
0116 
0117     void *cpu_addr;
0118     dma_addr_t dma_addr;
0119     size_t dram_size;
0120 
0121     struct rproc_subdev *rpmsg_subdev;
0122 };
0123 
0124 /**
0125  * struct mtk_share_obj - SRAM buffer shared with AP and SCP
0126  *
0127  * @id:     IPI id
0128  * @len:    share buffer length
0129  * @share_buf:  share buffer data
0130  */
0131 struct mtk_share_obj {
0132     u32 id;
0133     u32 len;
0134     u8 share_buf[SCP_SHARE_BUFFER_SIZE];
0135 };
0136 
0137 void scp_memcpy_aligned(void __iomem *dst, const void *src, unsigned int len);
0138 void scp_ipi_lock(struct mtk_scp *scp, u32 id);
0139 void scp_ipi_unlock(struct mtk_scp *scp, u32 id);
0140 
0141 #endif