drivers/regulator/uniphier-regulator.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // Regulator controller driver for UniPhier SoC
0004 // Copyright 2018 Socionext Inc.
0005 // Author: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
0006
0007 #include <linux/clk.h>
0008 #include <linux/io.h>
0009 #include <linux/module.h>
0010 #include <linux/of_device.h>
0011 #include <linux/platform_device.h>
0012 #include <linux/regmap.h>
0013 #include <linux/regulator/driver.h>
0014 #include <linux/regulator/of_regulator.h>
0015 #include <linux/reset.h>
0016
0017 #define MAX_CLKS    2
0018 #define MAX_RSTS    2
0019
0020 struct uniphier_regulator_soc_data {
0021     int nclks;
0022     const char * const *clock_names;
0023     int nrsts;
0024     const char * const *reset_names;
0025     const struct regulator_desc *desc;
0026     const struct regmap_config *regconf;
0027 };
0028
0029 struct uniphier_regulator_priv {
0030     struct clk_bulk_data clk[MAX_CLKS];
0031     struct reset_control *rst[MAX_RSTS];
0032     const struct uniphier_regulator_soc_data *data;
0033 };
0034
0035 static const struct regulator_ops uniphier_regulator_ops = {
0036     .enable     = regulator_enable_regmap,
0037     .disable    = regulator_disable_regmap,
0038     .is_enabled = regulator_is_enabled_regmap,
0039 };
0040
0041 static int uniphier_regulator_probe(struct platform_device *pdev)
0042 {
0043     struct device *dev = &pdev->dev;
0044     struct uniphier_regulator_priv *priv;
0045     struct regulator_config config = { };
0046     struct regulator_dev *rdev;
0047     struct regmap *regmap;
0048     void __iomem *base;
0049     const char *name;
0050     int i, ret, nr;
0051
0052     priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
0053     if (!priv)
0054         return -ENOMEM;
0055
0056     priv->data = of_device_get_match_data(dev);
0057     if (WARN_ON(!priv->data))
0058         return -EINVAL;
0059
0060     base = devm_platform_ioremap_resource(pdev, 0);
0061     if (IS_ERR(base))
0062         return PTR_ERR(base);
0063
0064     for (i = 0; i < priv->data->nclks; i++)
0065         priv->clk[i].id = priv->data->clock_names[i];
0066     ret = devm_clk_bulk_get(dev, priv->data->nclks, priv->clk);
0067     if (ret)
0068         return ret;
0069
0070     for (i = 0; i < priv->data->nrsts; i++) {
0071         name = priv->data->reset_names[i];
0072         priv->rst[i] = devm_reset_control_get_shared(dev, name);
0073         if (IS_ERR(priv->rst[i]))
0074             return PTR_ERR(priv->rst[i]);
0075     }
0076
0077     ret = clk_bulk_prepare_enable(priv->data->nclks, priv->clk);
0078     if (ret)
0079         return ret;
0080
0081     for (nr = 0; nr < priv->data->nrsts; nr++) {
0082         ret = reset_control_deassert(priv->rst[nr]);
0083         if (ret)
0084             goto out_rst_assert;
0085     }
0086
0087     regmap = devm_regmap_init_mmio(dev, base, priv->data->regconf);
0088     if (IS_ERR(regmap)) {
0089         ret = PTR_ERR(regmap);
0090         goto out_rst_assert;
0091     }
0092
0093     config.dev = dev;
0094     config.driver_data = priv;
0095     config.of_node = dev->of_node;
0096     config.regmap = regmap;
0097     config.init_data = of_get_regulator_init_data(dev, dev->of_node,
0098                               priv->data->desc);
0099     rdev = devm_regulator_register(dev, priv->data->desc, &config);
0100     if (IS_ERR(rdev)) {
0101         ret = PTR_ERR(rdev);
0102         goto out_rst_assert;
0103     }
0104
0105     platform_set_drvdata(pdev, priv);
0106
0107     return 0;
0108
0109 out_rst_assert:
0110     while (nr--)
0111         reset_control_assert(priv->rst[nr]);
0112
0113     clk_bulk_disable_unprepare(priv->data->nclks, priv->clk);
0114
0115     return ret;
0116 }
0117
0118 static int uniphier_regulator_remove(struct platform_device *pdev)
0119 {
0120     struct uniphier_regulator_priv *priv = platform_get_drvdata(pdev);
0121     int i;
0122
0123     for (i = 0; i < priv->data->nrsts; i++)
0124         reset_control_assert(priv->rst[i]);
0125
0126     clk_bulk_disable_unprepare(priv->data->nclks, priv->clk);
0127
0128     return 0;
0129 }
0130
0131 /* USB3 controller data */
0132 #define USB3VBUS_OFFSET     0x0
0133 #define USB3VBUS_REG        BIT(4)
0134 #define USB3VBUS_REG_EN     BIT(3)
0135 static const struct regulator_desc uniphier_usb3_regulator_desc = {
0136     .name = "vbus",
0137     .of_match = of_match_ptr("vbus"),
0138     .ops = &uniphier_regulator_ops,
0139     .type = REGULATOR_VOLTAGE,
0140     .owner = THIS_MODULE,
0141     .enable_reg  = USB3VBUS_OFFSET,
0142     .enable_mask = USB3VBUS_REG_EN | USB3VBUS_REG,
0143     .enable_val  = USB3VBUS_REG_EN | USB3VBUS_REG,
0144     .disable_val = USB3VBUS_REG_EN,
0145 };
0146
0147 static const struct regmap_config uniphier_usb3_regulator_regconf = {
0148     .reg_bits = 32,
0149     .val_bits = 32,
0150     .reg_stride = 4,
0151     .max_register = 1,
0152 };
0153
0154 static const char * const uniphier_pro4_clock_reset_names[] = {
0155     "gio", "link",
0156 };
0157
0158 static const struct uniphier_regulator_soc_data uniphier_pro4_usb3_data = {
0159     .nclks = ARRAY_SIZE(uniphier_pro4_clock_reset_names),
0160     .clock_names = uniphier_pro4_clock_reset_names,
0161     .nrsts = ARRAY_SIZE(uniphier_pro4_clock_reset_names),
0162     .reset_names = uniphier_pro4_clock_reset_names,
0163     .desc = &uniphier_usb3_regulator_desc,
0164     .regconf = &uniphier_usb3_regulator_regconf,
0165 };
0166
0167 static const char * const uniphier_pxs2_clock_reset_names[] = {
0168     "link",
0169 };
0170
0171 static const struct uniphier_regulator_soc_data uniphier_pxs2_usb3_data = {
0172     .nclks = ARRAY_SIZE(uniphier_pxs2_clock_reset_names),
0173     .clock_names = uniphier_pxs2_clock_reset_names,
0174     .nrsts = ARRAY_SIZE(uniphier_pxs2_clock_reset_names),
0175     .reset_names = uniphier_pxs2_clock_reset_names,
0176     .desc = &uniphier_usb3_regulator_desc,
0177     .regconf = &uniphier_usb3_regulator_regconf,
0178 };
0179
0180 static const struct of_device_id uniphier_regulator_match[] = {
0181     /* USB VBUS */
0182     {
0183         .compatible = "socionext,uniphier-pro4-usb3-regulator",
0184         .data = &uniphier_pro4_usb3_data,
0185     },
0186     {
0187         .compatible = "socionext,uniphier-pro5-usb3-regulator",
0188         .data = &uniphier_pro4_usb3_data,
0189     },
0190     {
0191         .compatible = "socionext,uniphier-pxs2-usb3-regulator",
0192         .data = &uniphier_pxs2_usb3_data,
0193     },
0194     {
0195         .compatible = "socionext,uniphier-ld20-usb3-regulator",
0196         .data = &uniphier_pxs2_usb3_data,
0197     },
0198     {
0199         .compatible = "socionext,uniphier-pxs3-usb3-regulator",
0200         .data = &uniphier_pxs2_usb3_data,
0201     },
0202     {
0203         .compatible = "socionext,uniphier-nx1-usb3-regulator",
0204         .data = &uniphier_pxs2_usb3_data,
0205     },
0206     { /* Sentinel */ },
0207 };
0208 MODULE_DEVICE_TABLE(of, uniphier_regulator_match);
0209
0210 static struct platform_driver uniphier_regulator_driver = {
0211     .probe = uniphier_regulator_probe,
0212     .remove = uniphier_regulator_remove,
0213     .driver = {
0214         .name  = "uniphier-regulator",
0215         .of_match_table = uniphier_regulator_match,
0216     },
0217 };
0218 module_platform_driver(uniphier_regulator_driver);
0219
0220 MODULE_AUTHOR("Kunihiko Hayashi <hayashi.kunihiko@socionext.com>");
0221 MODULE_DESCRIPTION("UniPhier Regulator Controller Driver");
0222 MODULE_LICENSE("GPL");