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0008 #include <linux/module.h>
0009 #include <linux/string.h>
0010 #include <linux/slab.h>
0011 #include <linux/init.h>
0012 #include <linux/err.h>
0013 #include <linux/platform_device.h>
0014 #include <linux/of.h>
0015 #include <linux/of_device.h>
0016 #include <linux/regulator/driver.h>
0017 #include <linux/regulator/machine.h>
0018 #include <linux/regulator/of_regulator.h>
0019 #include <linux/mfd/twl.h>
0020 #include <linux/delay.h>
0021
0022
0023
0024
0025
0026
0027
0028
0029
0030
0031
0032
0033 struct twlreg_info {
0034
0035 u8 base;
0036
0037
0038 u8 id;
0039
0040
0041 u8 table_len;
0042 const u16 *table;
0043
0044
0045 u8 remap;
0046
0047
0048 struct regulator_desc desc;
0049
0050
0051 unsigned long features;
0052
0053
0054 void *data;
0055 };
0056
0057
0058
0059
0060
0061
0062
0063 #define VREG_GRP 0
0064
0065 #define VREG_TYPE 1
0066 #define VREG_REMAP 2
0067 #define VREG_DEDICATED 3
0068 #define VREG_VOLTAGE_SMPS_4030 9
0069
0070 #define VREG_TRANS 1
0071 #define VREG_STATE 2
0072 #define VREG_VOLTAGE 3
0073 #define VREG_VOLTAGE_SMPS 4
0074
0075 static inline int
0076 twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
0077 {
0078 u8 value;
0079 int status;
0080
0081 status = twl_i2c_read_u8(slave_subgp,
0082 &value, info->base + offset);
0083 return (status < 0) ? status : value;
0084 }
0085
0086 static inline int
0087 twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
0088 u8 value)
0089 {
0090 return twl_i2c_write_u8(slave_subgp,
0091 value, info->base + offset);
0092 }
0093
0094
0095
0096
0097
0098 static int twlreg_grp(struct regulator_dev *rdev)
0099 {
0100 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
0101 VREG_GRP);
0102 }
0103
0104
0105
0106
0107
0108
0109 #define P3_GRP_4030 BIT(7)
0110 #define P2_GRP_4030 BIT(6)
0111 #define P1_GRP_4030 BIT(5)
0112
0113 #define P3_GRP_6030 BIT(2)
0114 #define P2_GRP_6030 BIT(1)
0115 #define P1_GRP_6030 BIT(0)
0116
0117 static int twl4030reg_is_enabled(struct regulator_dev *rdev)
0118 {
0119 int state = twlreg_grp(rdev);
0120
0121 if (state < 0)
0122 return state;
0123
0124 return state & P1_GRP_4030;
0125 }
0126
0127 #define PB_I2C_BUSY BIT(0)
0128 #define PB_I2C_BWEN BIT(1)
0129
0130
0131 static int twl4030_wait_pb_ready(void)
0132 {
0133
0134 int ret;
0135 int timeout = 10;
0136 u8 val;
0137
0138 do {
0139 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
0140 TWL4030_PM_MASTER_PB_CFG);
0141 if (ret < 0)
0142 return ret;
0143
0144 if (!(val & PB_I2C_BUSY))
0145 return 0;
0146
0147 mdelay(1);
0148 timeout--;
0149 } while (timeout);
0150
0151 return -ETIMEDOUT;
0152 }
0153
0154
0155 static int twl4030_send_pb_msg(unsigned msg)
0156 {
0157 u8 val;
0158 int ret;
0159
0160
0161 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
0162 TWL4030_PM_MASTER_PB_CFG);
0163 if (ret < 0)
0164 return ret;
0165
0166
0167 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val | PB_I2C_BWEN,
0168 TWL4030_PM_MASTER_PB_CFG);
0169 if (ret < 0)
0170 return ret;
0171
0172 ret = twl4030_wait_pb_ready();
0173 if (ret < 0)
0174 return ret;
0175
0176 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg >> 8,
0177 TWL4030_PM_MASTER_PB_WORD_MSB);
0178 if (ret < 0)
0179 return ret;
0180
0181 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg & 0xff,
0182 TWL4030_PM_MASTER_PB_WORD_LSB);
0183 if (ret < 0)
0184 return ret;
0185
0186 ret = twl4030_wait_pb_ready();
0187 if (ret < 0)
0188 return ret;
0189
0190
0191 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val,
0192 TWL4030_PM_MASTER_PB_CFG);
0193 }
0194
0195 static int twl4030reg_enable(struct regulator_dev *rdev)
0196 {
0197 struct twlreg_info *info = rdev_get_drvdata(rdev);
0198 int grp;
0199
0200 grp = twlreg_grp(rdev);
0201 if (grp < 0)
0202 return grp;
0203
0204 grp |= P1_GRP_4030;
0205
0206 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
0207 }
0208
0209 static int twl4030reg_disable(struct regulator_dev *rdev)
0210 {
0211 struct twlreg_info *info = rdev_get_drvdata(rdev);
0212 int grp;
0213
0214 grp = twlreg_grp(rdev);
0215 if (grp < 0)
0216 return grp;
0217
0218 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
0219
0220 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
0221 }
0222
0223 static int twl4030reg_get_status(struct regulator_dev *rdev)
0224 {
0225 int state = twlreg_grp(rdev);
0226
0227 if (state < 0)
0228 return state;
0229 state &= 0x0f;
0230
0231
0232 if (!state)
0233 return REGULATOR_STATUS_OFF;
0234 return (state & BIT(3))
0235 ? REGULATOR_STATUS_NORMAL
0236 : REGULATOR_STATUS_STANDBY;
0237 }
0238
0239 static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
0240 {
0241 struct twlreg_info *info = rdev_get_drvdata(rdev);
0242 unsigned message;
0243
0244
0245 switch (mode) {
0246 case REGULATOR_MODE_NORMAL:
0247 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
0248 break;
0249 case REGULATOR_MODE_STANDBY:
0250 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
0251 break;
0252 default:
0253 return -EINVAL;
0254 }
0255
0256 return twl4030_send_pb_msg(message);
0257 }
0258
0259 static inline unsigned int twl4030reg_map_mode(unsigned int mode)
0260 {
0261 switch (mode) {
0262 case RES_STATE_ACTIVE:
0263 return REGULATOR_MODE_NORMAL;
0264 case RES_STATE_SLEEP:
0265 return REGULATOR_MODE_STANDBY;
0266 default:
0267 return REGULATOR_MODE_INVALID;
0268 }
0269 }
0270
0271
0272
0273
0274
0275
0276
0277
0278
0279
0280
0281
0282
0283
0284
0285
0286
0287
0288 #define UNSUP_MASK 0x8000
0289
0290 #define UNSUP(x) (UNSUP_MASK | (x))
0291 #define IS_UNSUP(info, x) \
0292 ((UNSUP_MASK & (x)) && \
0293 !((info)->features & TWL4030_ALLOW_UNSUPPORTED))
0294 #define LDO_MV(x) (~UNSUP_MASK & (x))
0295
0296
0297 static const u16 VAUX1_VSEL_table[] = {
0298 UNSUP(1500), UNSUP(1800), 2500, 2800,
0299 3000, 3000, 3000, 3000,
0300 };
0301 static const u16 VAUX2_4030_VSEL_table[] = {
0302 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
0303 1500, 1800, UNSUP(1850), 2500,
0304 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
0305 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
0306 };
0307 static const u16 VAUX2_VSEL_table[] = {
0308 1700, 1700, 1900, 1300,
0309 1500, 1800, 2000, 2500,
0310 2100, 2800, 2200, 2300,
0311 2400, 2400, 2400, 2400,
0312 };
0313 static const u16 VAUX3_VSEL_table[] = {
0314 1500, 1800, 2500, 2800,
0315 3000, 3000, 3000, 3000,
0316 };
0317 static const u16 VAUX4_VSEL_table[] = {
0318 700, 1000, 1200, UNSUP(1300),
0319 1500, 1800, UNSUP(1850), 2500,
0320 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
0321 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
0322 };
0323 static const u16 VMMC1_VSEL_table[] = {
0324 1850, 2850, 3000, 3150,
0325 };
0326 static const u16 VMMC2_VSEL_table[] = {
0327 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
0328 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
0329 2600, 2800, 2850, 3000,
0330 3150, 3150, 3150, 3150,
0331 };
0332 static const u16 VPLL1_VSEL_table[] = {
0333 1000, 1200, 1300, 1800,
0334 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
0335 };
0336 static const u16 VPLL2_VSEL_table[] = {
0337 700, 1000, 1200, 1300,
0338 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
0339 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
0340 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
0341 };
0342 static const u16 VSIM_VSEL_table[] = {
0343 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
0344 2800, 3000, 3000, 3000,
0345 };
0346 static const u16 VDAC_VSEL_table[] = {
0347 1200, 1300, 1800, 1800,
0348 };
0349 static const u16 VIO_VSEL_table[] = {
0350 1800, 1850,
0351 };
0352 static const u16 VINTANA2_VSEL_table[] = {
0353 2500, 2750,
0354 };
0355
0356
0357 static const struct linear_range VDD1_ranges[] = {
0358 REGULATOR_LINEAR_RANGE(600000, 0, 68, 12500)
0359 };
0360
0361
0362 static const struct linear_range VDD2_ranges[] = {
0363 REGULATOR_LINEAR_RANGE(600000, 0, 68, 12500),
0364 REGULATOR_LINEAR_RANGE(1500000, 69, 69, 12500)
0365 };
0366
0367 static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
0368 {
0369 struct twlreg_info *info = rdev_get_drvdata(rdev);
0370 int mV = info->table[index];
0371
0372 return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000);
0373 }
0374
0375 static int
0376 twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
0377 {
0378 struct twlreg_info *info = rdev_get_drvdata(rdev);
0379
0380 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
0381 selector);
0382 }
0383
0384 static int twl4030ldo_get_voltage_sel(struct regulator_dev *rdev)
0385 {
0386 struct twlreg_info *info = rdev_get_drvdata(rdev);
0387 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE);
0388
0389 if (vsel < 0)
0390 return vsel;
0391
0392 vsel &= info->table_len - 1;
0393 return vsel;
0394 }
0395
0396 static const struct regulator_ops twl4030ldo_ops = {
0397 .list_voltage = twl4030ldo_list_voltage,
0398
0399 .set_voltage_sel = twl4030ldo_set_voltage_sel,
0400 .get_voltage_sel = twl4030ldo_get_voltage_sel,
0401
0402 .enable = twl4030reg_enable,
0403 .disable = twl4030reg_disable,
0404 .is_enabled = twl4030reg_is_enabled,
0405
0406 .set_mode = twl4030reg_set_mode,
0407
0408 .get_status = twl4030reg_get_status,
0409 };
0410
0411 static int
0412 twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
0413 unsigned *selector)
0414 {
0415 struct twlreg_info *info = rdev_get_drvdata(rdev);
0416 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
0417
0418 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS_4030, vsel);
0419
0420 return 0;
0421 }
0422
0423 static int twl4030smps_get_voltage(struct regulator_dev *rdev)
0424 {
0425 struct twlreg_info *info = rdev_get_drvdata(rdev);
0426 int vsel;
0427
0428 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
0429 VREG_VOLTAGE_SMPS_4030);
0430
0431 return vsel * 12500 + 600000;
0432 }
0433
0434 static const struct regulator_ops twl4030smps_ops = {
0435 .list_voltage = regulator_list_voltage_linear_range,
0436
0437 .set_voltage = twl4030smps_set_voltage,
0438 .get_voltage = twl4030smps_get_voltage,
0439 };
0440
0441
0442
0443 static const struct regulator_ops twl4030fixed_ops = {
0444 .list_voltage = regulator_list_voltage_linear,
0445
0446 .enable = twl4030reg_enable,
0447 .disable = twl4030reg_disable,
0448 .is_enabled = twl4030reg_is_enabled,
0449
0450 .set_mode = twl4030reg_set_mode,
0451
0452 .get_status = twl4030reg_get_status,
0453 };
0454
0455
0456
0457 #define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
0458 static const struct twlreg_info TWL4030_INFO_##label = { \
0459 .base = offset, \
0460 .id = num, \
0461 .table_len = ARRAY_SIZE(label##_VSEL_table), \
0462 .table = label##_VSEL_table, \
0463 .remap = remap_conf, \
0464 .desc = { \
0465 .name = #label, \
0466 .id = TWL4030_REG_##label, \
0467 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
0468 .ops = &twl4030ldo_ops, \
0469 .type = REGULATOR_VOLTAGE, \
0470 .owner = THIS_MODULE, \
0471 .enable_time = turnon_delay, \
0472 .of_map_mode = twl4030reg_map_mode, \
0473 }, \
0474 }
0475
0476 #define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf, \
0477 n_volt) \
0478 static const struct twlreg_info TWL4030_INFO_##label = { \
0479 .base = offset, \
0480 .id = num, \
0481 .remap = remap_conf, \
0482 .desc = { \
0483 .name = #label, \
0484 .id = TWL4030_REG_##label, \
0485 .ops = &twl4030smps_ops, \
0486 .type = REGULATOR_VOLTAGE, \
0487 .owner = THIS_MODULE, \
0488 .enable_time = turnon_delay, \
0489 .of_map_mode = twl4030reg_map_mode, \
0490 .n_voltages = n_volt, \
0491 .n_linear_ranges = ARRAY_SIZE(label ## _ranges), \
0492 .linear_ranges = label ## _ranges, \
0493 }, \
0494 }
0495
0496 #define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
0497 remap_conf) \
0498 static const struct twlreg_info TWLFIXED_INFO_##label = { \
0499 .base = offset, \
0500 .id = num, \
0501 .remap = remap_conf, \
0502 .desc = { \
0503 .name = #label, \
0504 .id = TWL4030##_REG_##label, \
0505 .n_voltages = 1, \
0506 .ops = &twl4030fixed_ops, \
0507 .type = REGULATOR_VOLTAGE, \
0508 .owner = THIS_MODULE, \
0509 .min_uV = mVolts * 1000, \
0510 .enable_time = turnon_delay, \
0511 .of_map_mode = twl4030reg_map_mode, \
0512 }, \
0513 }
0514
0515
0516
0517
0518
0519 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08);
0520 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08);
0521 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08);
0522 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08);
0523 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08);
0524 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08);
0525 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08);
0526 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00);
0527 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08);
0528 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00);
0529 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08);
0530 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08);
0531 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08);
0532 TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08, 68);
0533 TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08, 69);
0534
0535 TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08);
0536 TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08);
0537 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08);
0538 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08);
0539 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08);
0540
0541 #define TWL_OF_MATCH(comp, family, label) \
0542 { \
0543 .compatible = comp, \
0544 .data = &family##_INFO_##label, \
0545 }
0546
0547 #define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label)
0548 #define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
0549 #define TWL6032_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6032, label)
0550 #define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
0551 #define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
0552
0553 static const struct of_device_id twl_of_match[] = {
0554 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1),
0555 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030),
0556 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2),
0557 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3),
0558 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4),
0559 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1),
0560 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2),
0561 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1),
0562 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2),
0563 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM),
0564 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC),
0565 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
0566 TWL4030_OF_MATCH("ti,twl4030-vio", VIO),
0567 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1),
0568 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2),
0569 TWLFIXED_OF_MATCH("ti,twl4030-vintana1", VINTANA1),
0570 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG),
0571 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5),
0572 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8),
0573 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1),
0574 {},
0575 };
0576 MODULE_DEVICE_TABLE(of, twl_of_match);
0577
0578 static int twlreg_probe(struct platform_device *pdev)
0579 {
0580 int id;
0581 struct twlreg_info *info;
0582 const struct twlreg_info *template;
0583 struct regulator_init_data *initdata;
0584 struct regulation_constraints *c;
0585 struct regulator_dev *rdev;
0586 struct regulator_config config = { };
0587
0588 template = of_device_get_match_data(&pdev->dev);
0589 if (!template)
0590 return -ENODEV;
0591
0592 id = template->desc.id;
0593 initdata = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node,
0594 &template->desc);
0595 if (!initdata)
0596 return -EINVAL;
0597
0598 info = devm_kmemdup(&pdev->dev, template, sizeof(*info), GFP_KERNEL);
0599 if (!info)
0600 return -ENOMEM;
0601
0602
0603
0604
0605 c = &initdata->constraints;
0606 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
0607 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
0608 | REGULATOR_CHANGE_MODE
0609 | REGULATOR_CHANGE_STATUS;
0610 switch (id) {
0611 case TWL4030_REG_VIO:
0612 case TWL4030_REG_VDD1:
0613 case TWL4030_REG_VDD2:
0614 case TWL4030_REG_VPLL1:
0615 case TWL4030_REG_VINTANA1:
0616 case TWL4030_REG_VINTANA2:
0617 case TWL4030_REG_VINTDIG:
0618 c->always_on = true;
0619 break;
0620 default:
0621 break;
0622 }
0623
0624 config.dev = &pdev->dev;
0625 config.init_data = initdata;
0626 config.driver_data = info;
0627 config.of_node = pdev->dev.of_node;
0628
0629 rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
0630 if (IS_ERR(rdev)) {
0631 dev_err(&pdev->dev, "can't register %s, %ld\n",
0632 info->desc.name, PTR_ERR(rdev));
0633 return PTR_ERR(rdev);
0634 }
0635 platform_set_drvdata(pdev, rdev);
0636
0637 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP, info->remap);
0638
0639
0640
0641
0642
0643
0644
0645
0646
0647 return 0;
0648 }
0649
0650 MODULE_ALIAS("platform:twl4030_reg");
0651
0652 static struct platform_driver twlreg_driver = {
0653 .probe = twlreg_probe,
0654
0655
0656
0657 .driver = {
0658 .name = "twl4030_reg",
0659 .of_match_table = of_match_ptr(twl_of_match),
0660 },
0661 };
0662
0663 static int __init twlreg_init(void)
0664 {
0665 return platform_driver_register(&twlreg_driver);
0666 }
0667 subsys_initcall(twlreg_init);
0668
0669 static void __exit twlreg_exit(void)
0670 {
0671 platform_driver_unregister(&twlreg_driver);
0672 }
0673 module_exit(twlreg_exit)
0674
0675 MODULE_DESCRIPTION("TWL4030 regulator driver");
0676 MODULE_LICENSE("GPL");