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0001 // SPDX-License-Identifier: GPL-2.0+
0002 //
0003 // Copyright (c) 2011 Samsung Electronics Co., Ltd
0004 //              http://www.samsung.com
0005 
0006 #include <linux/err.h>
0007 #include <linux/of_gpio.h>
0008 #include <linux/gpio/consumer.h>
0009 #include <linux/module.h>
0010 #include <linux/platform_device.h>
0011 #include <linux/regulator/driver.h>
0012 #include <linux/regulator/machine.h>
0013 #include <linux/mfd/samsung/core.h>
0014 #include <linux/mfd/samsung/s5m8767.h>
0015 #include <linux/regulator/of_regulator.h>
0016 #include <linux/regmap.h>
0017 
0018 #define S5M8767_OPMODE_NORMAL_MODE 0x1
0019 
0020 struct s5m8767_info {
0021     struct device *dev;
0022     struct sec_pmic_dev *iodev;
0023     int num_regulators;
0024     struct sec_opmode_data *opmode;
0025 
0026     int ramp_delay;
0027     bool buck2_ramp;
0028     bool buck3_ramp;
0029     bool buck4_ramp;
0030 
0031     bool buck2_gpiodvs;
0032     bool buck3_gpiodvs;
0033     bool buck4_gpiodvs;
0034     u8 buck2_vol[8];
0035     u8 buck3_vol[8];
0036     u8 buck4_vol[8];
0037     int buck_gpios[3];
0038     int buck_ds[3];
0039     int buck_gpioindex;
0040 };
0041 
0042 struct sec_voltage_desc {
0043     int max;
0044     int min;
0045     int step;
0046 };
0047 
0048 static const struct sec_voltage_desc buck_voltage_val1 = {
0049     .max = 2225000,
0050     .min =  650000,
0051     .step =   6250,
0052 };
0053 
0054 static const struct sec_voltage_desc buck_voltage_val2 = {
0055     .max = 1600000,
0056     .min =  600000,
0057     .step =   6250,
0058 };
0059 
0060 static const struct sec_voltage_desc buck_voltage_val3 = {
0061     .max = 3000000,
0062     .min =  750000,
0063     .step =  12500,
0064 };
0065 
0066 static const struct sec_voltage_desc ldo_voltage_val1 = {
0067     .max = 3950000,
0068     .min =  800000,
0069     .step =  50000,
0070 };
0071 
0072 static const struct sec_voltage_desc ldo_voltage_val2 = {
0073     .max = 2375000,
0074     .min =  800000,
0075     .step =  25000,
0076 };
0077 
0078 static const struct sec_voltage_desc *reg_voltage_map[] = {
0079     [S5M8767_LDO1] = &ldo_voltage_val2,
0080     [S5M8767_LDO2] = &ldo_voltage_val2,
0081     [S5M8767_LDO3] = &ldo_voltage_val1,
0082     [S5M8767_LDO4] = &ldo_voltage_val1,
0083     [S5M8767_LDO5] = &ldo_voltage_val1,
0084     [S5M8767_LDO6] = &ldo_voltage_val2,
0085     [S5M8767_LDO7] = &ldo_voltage_val2,
0086     [S5M8767_LDO8] = &ldo_voltage_val2,
0087     [S5M8767_LDO9] = &ldo_voltage_val1,
0088     [S5M8767_LDO10] = &ldo_voltage_val1,
0089     [S5M8767_LDO11] = &ldo_voltage_val1,
0090     [S5M8767_LDO12] = &ldo_voltage_val1,
0091     [S5M8767_LDO13] = &ldo_voltage_val1,
0092     [S5M8767_LDO14] = &ldo_voltage_val1,
0093     [S5M8767_LDO15] = &ldo_voltage_val2,
0094     [S5M8767_LDO16] = &ldo_voltage_val1,
0095     [S5M8767_LDO17] = &ldo_voltage_val1,
0096     [S5M8767_LDO18] = &ldo_voltage_val1,
0097     [S5M8767_LDO19] = &ldo_voltage_val1,
0098     [S5M8767_LDO20] = &ldo_voltage_val1,
0099     [S5M8767_LDO21] = &ldo_voltage_val1,
0100     [S5M8767_LDO22] = &ldo_voltage_val1,
0101     [S5M8767_LDO23] = &ldo_voltage_val1,
0102     [S5M8767_LDO24] = &ldo_voltage_val1,
0103     [S5M8767_LDO25] = &ldo_voltage_val1,
0104     [S5M8767_LDO26] = &ldo_voltage_val1,
0105     [S5M8767_LDO27] = &ldo_voltage_val1,
0106     [S5M8767_LDO28] = &ldo_voltage_val1,
0107     [S5M8767_BUCK1] = &buck_voltage_val1,
0108     [S5M8767_BUCK2] = &buck_voltage_val2,
0109     [S5M8767_BUCK3] = &buck_voltage_val2,
0110     [S5M8767_BUCK4] = &buck_voltage_val2,
0111     [S5M8767_BUCK5] = &buck_voltage_val1,
0112     [S5M8767_BUCK6] = &buck_voltage_val1,
0113     [S5M8767_BUCK7] = &buck_voltage_val3,
0114     [S5M8767_BUCK8] = &buck_voltage_val3,
0115     [S5M8767_BUCK9] = &buck_voltage_val3,
0116 };
0117 
0118 static const unsigned int s5m8767_opmode_reg[][4] = {
0119     /* {OFF, ON, LOWPOWER, SUSPEND} */
0120     /* LDO1 ... LDO28 */
0121     {0x0, 0x3, 0x2, 0x1}, /* LDO1 */
0122     {0x0, 0x3, 0x2, 0x1},
0123     {0x0, 0x3, 0x2, 0x1},
0124     {0x0, 0x0, 0x0, 0x0},
0125     {0x0, 0x3, 0x2, 0x1}, /* LDO5 */
0126     {0x0, 0x3, 0x2, 0x1},
0127     {0x0, 0x3, 0x2, 0x1},
0128     {0x0, 0x3, 0x2, 0x1},
0129     {0x0, 0x3, 0x2, 0x1},
0130     {0x0, 0x3, 0x2, 0x1}, /* LDO10 */
0131     {0x0, 0x3, 0x2, 0x1},
0132     {0x0, 0x3, 0x2, 0x1},
0133     {0x0, 0x3, 0x2, 0x1},
0134     {0x0, 0x3, 0x2, 0x1},
0135     {0x0, 0x3, 0x2, 0x1}, /* LDO15 */
0136     {0x0, 0x3, 0x2, 0x1},
0137     {0x0, 0x3, 0x2, 0x1},
0138     {0x0, 0x0, 0x0, 0x0},
0139     {0x0, 0x3, 0x2, 0x1},
0140     {0x0, 0x3, 0x2, 0x1}, /* LDO20 */
0141     {0x0, 0x3, 0x2, 0x1},
0142     {0x0, 0x3, 0x2, 0x1},
0143     {0x0, 0x0, 0x0, 0x0},
0144     {0x0, 0x3, 0x2, 0x1},
0145     {0x0, 0x3, 0x2, 0x1}, /* LDO25 */
0146     {0x0, 0x3, 0x2, 0x1},
0147     {0x0, 0x3, 0x2, 0x1},
0148     {0x0, 0x3, 0x2, 0x1}, /* LDO28 */
0149 
0150     /* BUCK1 ... BUCK9 */
0151     {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */
0152     {0x0, 0x3, 0x1, 0x1},
0153     {0x0, 0x3, 0x1, 0x1},
0154     {0x0, 0x3, 0x1, 0x1},
0155     {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */
0156     {0x0, 0x3, 0x1, 0x1},
0157     {0x0, 0x3, 0x1, 0x1},
0158     {0x0, 0x3, 0x1, 0x1},
0159     {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */
0160 };
0161 
0162 static int s5m8767_get_register(struct s5m8767_info *s5m8767, int reg_id,
0163                 int *reg, int *enable_ctrl)
0164 {
0165     int i;
0166     unsigned int mode;
0167 
0168     switch (reg_id) {
0169     case S5M8767_LDO1 ... S5M8767_LDO2:
0170         *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
0171         break;
0172     case S5M8767_LDO3 ... S5M8767_LDO28:
0173         *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
0174         break;
0175     case S5M8767_BUCK1:
0176         *reg = S5M8767_REG_BUCK1CTRL1;
0177         break;
0178     case S5M8767_BUCK2 ... S5M8767_BUCK4:
0179         *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9;
0180         break;
0181     case S5M8767_BUCK5:
0182         *reg = S5M8767_REG_BUCK5CTRL1;
0183         break;
0184     case S5M8767_BUCK6 ... S5M8767_BUCK9:
0185         *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2;
0186         break;
0187     default:
0188         return -EINVAL;
0189     }
0190 
0191     for (i = 0; i < s5m8767->num_regulators; i++) {
0192         if (s5m8767->opmode[i].id == reg_id) {
0193             mode = s5m8767->opmode[i].mode;
0194             break;
0195         }
0196     }
0197 
0198     if (i >= s5m8767->num_regulators)
0199         return -EINVAL;
0200 
0201     *enable_ctrl = s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT;
0202 
0203     return 0;
0204 }
0205 
0206 static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767)
0207 {
0208     int reg;
0209 
0210     switch (reg_id) {
0211     case S5M8767_LDO1 ... S5M8767_LDO2:
0212         reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
0213         break;
0214     case S5M8767_LDO3 ... S5M8767_LDO28:
0215         reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
0216         break;
0217     case S5M8767_BUCK1:
0218         reg = S5M8767_REG_BUCK1CTRL2;
0219         break;
0220     case S5M8767_BUCK2:
0221         reg = S5M8767_REG_BUCK2DVS1;
0222         if (s5m8767->buck2_gpiodvs)
0223             reg += s5m8767->buck_gpioindex;
0224         break;
0225     case S5M8767_BUCK3:
0226         reg = S5M8767_REG_BUCK3DVS1;
0227         if (s5m8767->buck3_gpiodvs)
0228             reg += s5m8767->buck_gpioindex;
0229         break;
0230     case S5M8767_BUCK4:
0231         reg = S5M8767_REG_BUCK4DVS1;
0232         if (s5m8767->buck4_gpiodvs)
0233             reg += s5m8767->buck_gpioindex;
0234         break;
0235     case S5M8767_BUCK5:
0236         reg = S5M8767_REG_BUCK5CTRL2;
0237         break;
0238     case S5M8767_BUCK6 ... S5M8767_BUCK9:
0239         reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2;
0240         break;
0241     default:
0242         return -EINVAL;
0243     }
0244 
0245     return reg;
0246 }
0247 
0248 static int s5m8767_convert_voltage_to_sel(const struct sec_voltage_desc *desc,
0249                       int min_vol)
0250 {
0251     int selector = 0;
0252 
0253     if (desc == NULL)
0254         return -EINVAL;
0255 
0256     if (min_vol > desc->max)
0257         return -EINVAL;
0258 
0259     if (min_vol < desc->min)
0260         min_vol = desc->min;
0261 
0262     selector = DIV_ROUND_UP(min_vol - desc->min, desc->step);
0263 
0264     if (desc->min + desc->step * selector > desc->max)
0265         return -EINVAL;
0266 
0267     return selector;
0268 }
0269 
0270 static inline int s5m8767_set_high(struct s5m8767_info *s5m8767)
0271 {
0272     int temp_index = s5m8767->buck_gpioindex;
0273 
0274     gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
0275     gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
0276     gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
0277 
0278     return 0;
0279 }
0280 
0281 static inline int s5m8767_set_low(struct s5m8767_info *s5m8767)
0282 {
0283     int temp_index = s5m8767->buck_gpioindex;
0284 
0285     gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
0286     gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
0287     gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
0288 
0289     return 0;
0290 }
0291 
0292 static int s5m8767_set_voltage_sel(struct regulator_dev *rdev,
0293                    unsigned selector)
0294 {
0295     struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
0296     int reg_id = rdev_get_id(rdev);
0297     int old_index, index = 0;
0298     u8 *buck234_vol = NULL;
0299 
0300     switch (reg_id) {
0301     case S5M8767_LDO1 ... S5M8767_LDO28:
0302         break;
0303     case S5M8767_BUCK1 ... S5M8767_BUCK6:
0304         if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs)
0305             buck234_vol = &s5m8767->buck2_vol[0];
0306         else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs)
0307             buck234_vol = &s5m8767->buck3_vol[0];
0308         else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs)
0309             buck234_vol = &s5m8767->buck4_vol[0];
0310         break;
0311     case S5M8767_BUCK7 ... S5M8767_BUCK8:
0312         return -EINVAL;
0313     case S5M8767_BUCK9:
0314         break;
0315     default:
0316         return -EINVAL;
0317     }
0318 
0319     /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */
0320     if (buck234_vol) {
0321         while (*buck234_vol != selector) {
0322             buck234_vol++;
0323             index++;
0324         }
0325         old_index = s5m8767->buck_gpioindex;
0326         s5m8767->buck_gpioindex = index;
0327 
0328         if (index > old_index)
0329             return s5m8767_set_high(s5m8767);
0330         else
0331             return s5m8767_set_low(s5m8767);
0332     } else {
0333         return regulator_set_voltage_sel_regmap(rdev, selector);
0334     }
0335 }
0336 
0337 static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,
0338                          unsigned int old_sel,
0339                          unsigned int new_sel)
0340 {
0341     struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
0342 
0343     if ((old_sel < new_sel) && s5m8767->ramp_delay)
0344         return DIV_ROUND_UP(rdev->desc->uV_step * (new_sel - old_sel),
0345                     s5m8767->ramp_delay * 1000);
0346     return 0;
0347 }
0348 
0349 static const struct regulator_ops s5m8767_ops = {
0350     .list_voltage       = regulator_list_voltage_linear,
0351     .is_enabled     = regulator_is_enabled_regmap,
0352     .enable         = regulator_enable_regmap,
0353     .disable        = regulator_disable_regmap,
0354     .get_voltage_sel    = regulator_get_voltage_sel_regmap,
0355     .set_voltage_sel    = s5m8767_set_voltage_sel,
0356     .set_voltage_time_sel   = s5m8767_set_voltage_time_sel,
0357 };
0358 
0359 static const struct regulator_ops s5m8767_buck78_ops = {
0360     .list_voltage       = regulator_list_voltage_linear,
0361     .is_enabled     = regulator_is_enabled_regmap,
0362     .enable         = regulator_enable_regmap,
0363     .disable        = regulator_disable_regmap,
0364     .get_voltage_sel    = regulator_get_voltage_sel_regmap,
0365     .set_voltage_sel    = regulator_set_voltage_sel_regmap,
0366 };
0367 
0368 #define s5m8767_regulator_desc(_name) {     \
0369     .name       = #_name,       \
0370     .id     = S5M8767_##_name,  \
0371     .ops        = &s5m8767_ops,     \
0372     .type       = REGULATOR_VOLTAGE,    \
0373     .owner      = THIS_MODULE,      \
0374 }
0375 
0376 #define s5m8767_regulator_buck78_desc(_name) {  \
0377     .name       = #_name,       \
0378     .id     = S5M8767_##_name,  \
0379     .ops        = &s5m8767_buck78_ops,  \
0380     .type       = REGULATOR_VOLTAGE,    \
0381     .owner      = THIS_MODULE,      \
0382 }
0383 
0384 static struct regulator_desc regulators[] = {
0385     s5m8767_regulator_desc(LDO1),
0386     s5m8767_regulator_desc(LDO2),
0387     s5m8767_regulator_desc(LDO3),
0388     s5m8767_regulator_desc(LDO4),
0389     s5m8767_regulator_desc(LDO5),
0390     s5m8767_regulator_desc(LDO6),
0391     s5m8767_regulator_desc(LDO7),
0392     s5m8767_regulator_desc(LDO8),
0393     s5m8767_regulator_desc(LDO9),
0394     s5m8767_regulator_desc(LDO10),
0395     s5m8767_regulator_desc(LDO11),
0396     s5m8767_regulator_desc(LDO12),
0397     s5m8767_regulator_desc(LDO13),
0398     s5m8767_regulator_desc(LDO14),
0399     s5m8767_regulator_desc(LDO15),
0400     s5m8767_regulator_desc(LDO16),
0401     s5m8767_regulator_desc(LDO17),
0402     s5m8767_regulator_desc(LDO18),
0403     s5m8767_regulator_desc(LDO19),
0404     s5m8767_regulator_desc(LDO20),
0405     s5m8767_regulator_desc(LDO21),
0406     s5m8767_regulator_desc(LDO22),
0407     s5m8767_regulator_desc(LDO23),
0408     s5m8767_regulator_desc(LDO24),
0409     s5m8767_regulator_desc(LDO25),
0410     s5m8767_regulator_desc(LDO26),
0411     s5m8767_regulator_desc(LDO27),
0412     s5m8767_regulator_desc(LDO28),
0413     s5m8767_regulator_desc(BUCK1),
0414     s5m8767_regulator_desc(BUCK2),
0415     s5m8767_regulator_desc(BUCK3),
0416     s5m8767_regulator_desc(BUCK4),
0417     s5m8767_regulator_desc(BUCK5),
0418     s5m8767_regulator_desc(BUCK6),
0419     s5m8767_regulator_buck78_desc(BUCK7),
0420     s5m8767_regulator_buck78_desc(BUCK8),
0421     s5m8767_regulator_desc(BUCK9),
0422 };
0423 
0424 /*
0425  * Enable GPIO control over BUCK9 in regulator_config for that regulator.
0426  */
0427 static void s5m8767_regulator_config_ext_control(struct s5m8767_info *s5m8767,
0428         struct sec_regulator_data *rdata,
0429         struct regulator_config *config)
0430 {
0431     int i, mode = 0;
0432 
0433     if (rdata->id != S5M8767_BUCK9)
0434         return;
0435 
0436     /* Check if opmode for regulator matches S5M8767_ENCTRL_USE_GPIO */
0437     for (i = 0; i < s5m8767->num_regulators; i++) {
0438         const struct sec_opmode_data *opmode = &s5m8767->opmode[i];
0439         if (opmode->id == rdata->id) {
0440             mode = s5m8767_opmode_reg[rdata->id][opmode->mode];
0441             break;
0442         }
0443     }
0444     if (mode != S5M8767_ENCTRL_USE_GPIO) {
0445         dev_warn(s5m8767->dev,
0446                 "ext-control for %pOFn: mismatched op_mode (%x), ignoring\n",
0447                 rdata->reg_node, mode);
0448         return;
0449     }
0450 
0451     if (!rdata->ext_control_gpiod) {
0452         dev_warn(s5m8767->dev,
0453                 "ext-control for %pOFn: GPIO not valid, ignoring\n",
0454              rdata->reg_node);
0455         return;
0456     }
0457 
0458     config->ena_gpiod = rdata->ext_control_gpiod;
0459 }
0460 
0461 /*
0462  * Turn on GPIO control over BUCK9.
0463  */
0464 static int s5m8767_enable_ext_control(struct s5m8767_info *s5m8767,
0465         struct regulator_dev *rdev)
0466 {
0467     int id = rdev_get_id(rdev);
0468     int ret, reg, enable_ctrl;
0469 
0470     if (id != S5M8767_BUCK9)
0471         return -EINVAL;
0472 
0473     ret = s5m8767_get_register(s5m8767, id, &reg, &enable_ctrl);
0474     if (ret)
0475         return ret;
0476 
0477     return regmap_update_bits(s5m8767->iodev->regmap_pmic,
0478             reg, S5M8767_ENCTRL_MASK,
0479             S5M8767_ENCTRL_USE_GPIO << S5M8767_ENCTRL_SHIFT);
0480 }
0481 
0482 
0483 #ifdef CONFIG_OF
0484 static int s5m8767_pmic_dt_parse_dvs_gpio(struct sec_pmic_dev *iodev,
0485             struct sec_platform_data *pdata,
0486             struct device_node *pmic_np)
0487 {
0488     int i, gpio;
0489 
0490     for (i = 0; i < 3; i++) {
0491         gpio = of_get_named_gpio(pmic_np,
0492                     "s5m8767,pmic-buck-dvs-gpios", i);
0493         if (!gpio_is_valid(gpio)) {
0494             dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio);
0495             return -EINVAL;
0496         }
0497         pdata->buck_gpios[i] = gpio;
0498     }
0499     return 0;
0500 }
0501 
0502 static int s5m8767_pmic_dt_parse_ds_gpio(struct sec_pmic_dev *iodev,
0503             struct sec_platform_data *pdata,
0504             struct device_node *pmic_np)
0505 {
0506     int i, gpio;
0507 
0508     for (i = 0; i < 3; i++) {
0509         gpio = of_get_named_gpio(pmic_np,
0510                     "s5m8767,pmic-buck-ds-gpios", i);
0511         if (!gpio_is_valid(gpio)) {
0512             dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio);
0513             return -EINVAL;
0514         }
0515         pdata->buck_ds[i] = gpio;
0516     }
0517     return 0;
0518 }
0519 
0520 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev,
0521                     struct sec_platform_data *pdata)
0522 {
0523     struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
0524     struct device_node *pmic_np, *regulators_np, *reg_np;
0525     struct sec_regulator_data *rdata;
0526     struct sec_opmode_data *rmode;
0527     unsigned int i, dvs_voltage_nr = 8, ret;
0528 
0529     pmic_np = iodev->dev->of_node;
0530     if (!pmic_np) {
0531         dev_err(iodev->dev, "could not find pmic sub-node\n");
0532         return -ENODEV;
0533     }
0534 
0535     regulators_np = of_get_child_by_name(pmic_np, "regulators");
0536     if (!regulators_np) {
0537         dev_err(iodev->dev, "could not find regulators sub-node\n");
0538         return -EINVAL;
0539     }
0540 
0541     /* count the number of regulators to be supported in pmic */
0542     pdata->num_regulators = of_get_child_count(regulators_np);
0543 
0544     rdata = devm_kcalloc(&pdev->dev,
0545                  pdata->num_regulators, sizeof(*rdata),
0546                  GFP_KERNEL);
0547     if (!rdata) {
0548         of_node_put(regulators_np);
0549         return -ENOMEM;
0550     }
0551 
0552     rmode = devm_kcalloc(&pdev->dev,
0553                  pdata->num_regulators, sizeof(*rmode),
0554                  GFP_KERNEL);
0555     if (!rmode) {
0556         of_node_put(regulators_np);
0557         return -ENOMEM;
0558     }
0559 
0560     pdata->regulators = rdata;
0561     pdata->opmode = rmode;
0562     for_each_child_of_node(regulators_np, reg_np) {
0563         for (i = 0; i < ARRAY_SIZE(regulators); i++)
0564             if (of_node_name_eq(reg_np, regulators[i].name))
0565                 break;
0566 
0567         if (i == ARRAY_SIZE(regulators)) {
0568             dev_warn(iodev->dev,
0569             "don't know how to configure regulator %pOFn\n",
0570             reg_np);
0571             continue;
0572         }
0573 
0574         rdata->ext_control_gpiod = devm_fwnode_gpiod_get(
0575             &pdev->dev,
0576             of_fwnode_handle(reg_np),
0577             "s5m8767,pmic-ext-control",
0578             GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE,
0579             "s5m8767");
0580         if (PTR_ERR(rdata->ext_control_gpiod) == -ENOENT) {
0581             rdata->ext_control_gpiod = NULL;
0582         } else if (IS_ERR(rdata->ext_control_gpiod)) {
0583             of_node_put(reg_np);
0584             of_node_put(regulators_np);
0585             return PTR_ERR(rdata->ext_control_gpiod);
0586         }
0587 
0588         rdata->id = i;
0589         rdata->initdata = of_get_regulator_init_data(
0590                         &pdev->dev, reg_np,
0591                         &regulators[i]);
0592         rdata->reg_node = reg_np;
0593         rdata++;
0594         rmode->id = i;
0595         if (of_property_read_u32(reg_np, "op_mode",
0596                 &rmode->mode)) {
0597             dev_warn(iodev->dev,
0598                 "no op_mode property at %pOF\n",
0599                 reg_np);
0600 
0601             rmode->mode = S5M8767_OPMODE_NORMAL_MODE;
0602         }
0603         rmode++;
0604     }
0605 
0606     of_node_put(regulators_np);
0607 
0608     if (of_get_property(pmic_np, "s5m8767,pmic-buck2-uses-gpio-dvs", NULL)) {
0609         pdata->buck2_gpiodvs = true;
0610 
0611         if (of_property_read_u32_array(pmic_np,
0612                 "s5m8767,pmic-buck2-dvs-voltage",
0613                 pdata->buck2_voltage, dvs_voltage_nr)) {
0614             dev_err(iodev->dev, "buck2 voltages not specified\n");
0615             return -EINVAL;
0616         }
0617     }
0618 
0619     if (of_get_property(pmic_np, "s5m8767,pmic-buck3-uses-gpio-dvs", NULL)) {
0620         pdata->buck3_gpiodvs = true;
0621 
0622         if (of_property_read_u32_array(pmic_np,
0623                 "s5m8767,pmic-buck3-dvs-voltage",
0624                 pdata->buck3_voltage, dvs_voltage_nr)) {
0625             dev_err(iodev->dev, "buck3 voltages not specified\n");
0626             return -EINVAL;
0627         }
0628     }
0629 
0630     if (of_get_property(pmic_np, "s5m8767,pmic-buck4-uses-gpio-dvs", NULL)) {
0631         pdata->buck4_gpiodvs = true;
0632 
0633         if (of_property_read_u32_array(pmic_np,
0634                 "s5m8767,pmic-buck4-dvs-voltage",
0635                 pdata->buck4_voltage, dvs_voltage_nr)) {
0636             dev_err(iodev->dev, "buck4 voltages not specified\n");
0637             return -EINVAL;
0638         }
0639     }
0640 
0641     if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
0642                         pdata->buck4_gpiodvs) {
0643         ret = s5m8767_pmic_dt_parse_dvs_gpio(iodev, pdata, pmic_np);
0644         if (ret)
0645             return -EINVAL;
0646 
0647         if (of_property_read_u32(pmic_np,
0648                 "s5m8767,pmic-buck-default-dvs-idx",
0649                 &pdata->buck_default_idx)) {
0650             pdata->buck_default_idx = 0;
0651         } else {
0652             if (pdata->buck_default_idx >= 8) {
0653                 pdata->buck_default_idx = 0;
0654                 dev_info(iodev->dev,
0655                 "invalid value for default dvs index, use 0\n");
0656             }
0657         }
0658     }
0659 
0660     ret = s5m8767_pmic_dt_parse_ds_gpio(iodev, pdata, pmic_np);
0661     if (ret)
0662         return -EINVAL;
0663 
0664     if (of_get_property(pmic_np, "s5m8767,pmic-buck2-ramp-enable", NULL))
0665         pdata->buck2_ramp_enable = true;
0666 
0667     if (of_get_property(pmic_np, "s5m8767,pmic-buck3-ramp-enable", NULL))
0668         pdata->buck3_ramp_enable = true;
0669 
0670     if (of_get_property(pmic_np, "s5m8767,pmic-buck4-ramp-enable", NULL))
0671         pdata->buck4_ramp_enable = true;
0672 
0673     if (pdata->buck2_ramp_enable || pdata->buck3_ramp_enable
0674             || pdata->buck4_ramp_enable) {
0675         if (of_property_read_u32(pmic_np, "s5m8767,pmic-buck-ramp-delay",
0676                 &pdata->buck_ramp_delay))
0677             pdata->buck_ramp_delay = 0;
0678     }
0679 
0680     return 0;
0681 }
0682 #else
0683 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev,
0684                     struct sec_platform_data *pdata)
0685 {
0686     return 0;
0687 }
0688 #endif /* CONFIG_OF */
0689 
0690 static int s5m8767_pmic_probe(struct platform_device *pdev)
0691 {
0692     struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
0693     struct sec_platform_data *pdata = iodev->pdata;
0694     struct regulator_config config = { };
0695     struct s5m8767_info *s5m8767;
0696     int i, ret, buck_init;
0697 
0698     if (!pdata) {
0699         dev_err(pdev->dev.parent, "Platform data not supplied\n");
0700         return -ENODEV;
0701     }
0702 
0703     if (iodev->dev->of_node) {
0704         ret = s5m8767_pmic_dt_parse_pdata(pdev, pdata);
0705         if (ret)
0706             return ret;
0707     }
0708 
0709     if (pdata->buck2_gpiodvs) {
0710         if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) {
0711             dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
0712             return -EINVAL;
0713         }
0714     }
0715 
0716     if (pdata->buck3_gpiodvs) {
0717         if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) {
0718             dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
0719             return -EINVAL;
0720         }
0721     }
0722 
0723     if (pdata->buck4_gpiodvs) {
0724         if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) {
0725             dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
0726             return -EINVAL;
0727         }
0728     }
0729 
0730     s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info),
0731                 GFP_KERNEL);
0732     if (!s5m8767)
0733         return -ENOMEM;
0734 
0735     s5m8767->dev = &pdev->dev;
0736     s5m8767->iodev = iodev;
0737     s5m8767->num_regulators = pdata->num_regulators;
0738     platform_set_drvdata(pdev, s5m8767);
0739 
0740     s5m8767->buck_gpioindex = pdata->buck_default_idx;
0741     s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs;
0742     s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs;
0743     s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs;
0744     s5m8767->buck_gpios[0] = pdata->buck_gpios[0];
0745     s5m8767->buck_gpios[1] = pdata->buck_gpios[1];
0746     s5m8767->buck_gpios[2] = pdata->buck_gpios[2];
0747     s5m8767->buck_ds[0] = pdata->buck_ds[0];
0748     s5m8767->buck_ds[1] = pdata->buck_ds[1];
0749     s5m8767->buck_ds[2] = pdata->buck_ds[2];
0750 
0751     s5m8767->ramp_delay = pdata->buck_ramp_delay;
0752     s5m8767->buck2_ramp = pdata->buck2_ramp_enable;
0753     s5m8767->buck3_ramp = pdata->buck3_ramp_enable;
0754     s5m8767->buck4_ramp = pdata->buck4_ramp_enable;
0755     s5m8767->opmode = pdata->opmode;
0756 
0757     buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
0758                            pdata->buck2_init);
0759 
0760     regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2,
0761             buck_init);
0762 
0763     buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
0764                            pdata->buck3_init);
0765 
0766     regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2,
0767             buck_init);
0768 
0769     buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
0770                            pdata->buck4_init);
0771 
0772     regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2,
0773             buck_init);
0774 
0775     for (i = 0; i < 8; i++) {
0776         if (s5m8767->buck2_gpiodvs) {
0777             s5m8767->buck2_vol[i] =
0778                 s5m8767_convert_voltage_to_sel(
0779                         &buck_voltage_val2,
0780                         pdata->buck2_voltage[i]);
0781         }
0782 
0783         if (s5m8767->buck3_gpiodvs) {
0784             s5m8767->buck3_vol[i] =
0785                 s5m8767_convert_voltage_to_sel(
0786                         &buck_voltage_val2,
0787                         pdata->buck3_voltage[i]);
0788         }
0789 
0790         if (s5m8767->buck4_gpiodvs) {
0791             s5m8767->buck4_vol[i] =
0792                 s5m8767_convert_voltage_to_sel(
0793                         &buck_voltage_val2,
0794                         pdata->buck4_voltage[i]);
0795         }
0796     }
0797 
0798     if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
0799                         pdata->buck4_gpiodvs) {
0800 
0801         if (!gpio_is_valid(pdata->buck_gpios[0]) ||
0802             !gpio_is_valid(pdata->buck_gpios[1]) ||
0803             !gpio_is_valid(pdata->buck_gpios[2])) {
0804             dev_err(&pdev->dev, "GPIO NOT VALID\n");
0805             return -EINVAL;
0806         }
0807 
0808         ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0],
0809                     "S5M8767 SET1");
0810         if (ret)
0811             return ret;
0812 
0813         ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1],
0814                     "S5M8767 SET2");
0815         if (ret)
0816             return ret;
0817 
0818         ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2],
0819                     "S5M8767 SET3");
0820         if (ret)
0821             return ret;
0822 
0823         /* SET1 GPIO */
0824         gpio_direction_output(pdata->buck_gpios[0],
0825                 (s5m8767->buck_gpioindex >> 2) & 0x1);
0826         /* SET2 GPIO */
0827         gpio_direction_output(pdata->buck_gpios[1],
0828                 (s5m8767->buck_gpioindex >> 1) & 0x1);
0829         /* SET3 GPIO */
0830         gpio_direction_output(pdata->buck_gpios[2],
0831                 (s5m8767->buck_gpioindex >> 0) & 0x1);
0832     }
0833 
0834     ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2");
0835     if (ret)
0836         return ret;
0837 
0838     ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3");
0839     if (ret)
0840         return ret;
0841 
0842     ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4");
0843     if (ret)
0844         return ret;
0845 
0846     /* DS2 GPIO */
0847     gpio_direction_output(pdata->buck_ds[0], 0x0);
0848     /* DS3 GPIO */
0849     gpio_direction_output(pdata->buck_ds[1], 0x0);
0850     /* DS4 GPIO */
0851     gpio_direction_output(pdata->buck_ds[2], 0x0);
0852 
0853     regmap_update_bits(s5m8767->iodev->regmap_pmic,
0854                S5M8767_REG_BUCK2CTRL, 1 << 1,
0855                (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1));
0856     regmap_update_bits(s5m8767->iodev->regmap_pmic,
0857                S5M8767_REG_BUCK3CTRL, 1 << 1,
0858                (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1));
0859     regmap_update_bits(s5m8767->iodev->regmap_pmic,
0860                S5M8767_REG_BUCK4CTRL, 1 << 1,
0861                (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1));
0862 
0863     /* Initialize GPIO DVS registers */
0864     for (i = 0; i < 8; i++) {
0865         if (s5m8767->buck2_gpiodvs) {
0866             regmap_write(s5m8767->iodev->regmap_pmic,
0867                     S5M8767_REG_BUCK2DVS1 + i,
0868                     s5m8767->buck2_vol[i]);
0869         }
0870 
0871         if (s5m8767->buck3_gpiodvs) {
0872             regmap_write(s5m8767->iodev->regmap_pmic,
0873                     S5M8767_REG_BUCK3DVS1 + i,
0874                     s5m8767->buck3_vol[i]);
0875         }
0876 
0877         if (s5m8767->buck4_gpiodvs) {
0878             regmap_write(s5m8767->iodev->regmap_pmic,
0879                     S5M8767_REG_BUCK4DVS1 + i,
0880                     s5m8767->buck4_vol[i]);
0881         }
0882     }
0883 
0884     if (s5m8767->buck2_ramp)
0885         regmap_update_bits(s5m8767->iodev->regmap_pmic,
0886                 S5M8767_REG_DVSRAMP, 0x08, 0x08);
0887 
0888     if (s5m8767->buck3_ramp)
0889         regmap_update_bits(s5m8767->iodev->regmap_pmic,
0890                 S5M8767_REG_DVSRAMP, 0x04, 0x04);
0891 
0892     if (s5m8767->buck4_ramp)
0893         regmap_update_bits(s5m8767->iodev->regmap_pmic,
0894                 S5M8767_REG_DVSRAMP, 0x02, 0x02);
0895 
0896     if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
0897         || s5m8767->buck4_ramp) {
0898         unsigned int val;
0899         switch (s5m8767->ramp_delay) {
0900         case 5:
0901             val = S5M8767_DVS_BUCK_RAMP_5;
0902             break;
0903         case 10:
0904             val = S5M8767_DVS_BUCK_RAMP_10;
0905             break;
0906         case 25:
0907             val = S5M8767_DVS_BUCK_RAMP_25;
0908             break;
0909         case 50:
0910             val = S5M8767_DVS_BUCK_RAMP_50;
0911             break;
0912         case 100:
0913             val = S5M8767_DVS_BUCK_RAMP_100;
0914             break;
0915         default:
0916             val = S5M8767_DVS_BUCK_RAMP_10;
0917         }
0918         regmap_update_bits(s5m8767->iodev->regmap_pmic,
0919                     S5M8767_REG_DVSRAMP,
0920                     S5M8767_DVS_BUCK_RAMP_MASK,
0921                     val << S5M8767_DVS_BUCK_RAMP_SHIFT);
0922     }
0923 
0924     for (i = 0; i < pdata->num_regulators; i++) {
0925         const struct sec_voltage_desc *desc;
0926         int id = pdata->regulators[i].id;
0927         int enable_reg, enable_val;
0928         struct regulator_dev *rdev;
0929 
0930         desc = reg_voltage_map[id];
0931         if (desc) {
0932             regulators[id].n_voltages =
0933                 (desc->max - desc->min) / desc->step + 1;
0934             regulators[id].min_uV = desc->min;
0935             regulators[id].uV_step = desc->step;
0936             regulators[id].vsel_reg =
0937                 s5m8767_get_vsel_reg(id, s5m8767);
0938             if (id < S5M8767_BUCK1)
0939                 regulators[id].vsel_mask = 0x3f;
0940             else
0941                 regulators[id].vsel_mask = 0xff;
0942 
0943             ret = s5m8767_get_register(s5m8767, id, &enable_reg,
0944                          &enable_val);
0945             if (ret) {
0946                 dev_err(s5m8767->dev, "error reading registers\n");
0947                 return ret;
0948             }
0949             regulators[id].enable_reg = enable_reg;
0950             regulators[id].enable_mask = S5M8767_ENCTRL_MASK;
0951             regulators[id].enable_val = enable_val;
0952         }
0953 
0954         config.dev = s5m8767->dev;
0955         config.init_data = pdata->regulators[i].initdata;
0956         config.driver_data = s5m8767;
0957         config.regmap = iodev->regmap_pmic;
0958         config.of_node = pdata->regulators[i].reg_node;
0959         config.ena_gpiod = NULL;
0960         if (pdata->regulators[i].ext_control_gpiod) {
0961             /* Assigns config.ena_gpiod */
0962             s5m8767_regulator_config_ext_control(s5m8767,
0963                     &pdata->regulators[i], &config);
0964 
0965             /*
0966              * Hand the GPIO descriptor management over to the
0967              * regulator core, remove it from devres management.
0968              */
0969             devm_gpiod_unhinge(s5m8767->dev, config.ena_gpiod);
0970         }
0971         rdev = devm_regulator_register(&pdev->dev, &regulators[id],
0972                           &config);
0973         if (IS_ERR(rdev)) {
0974             ret = PTR_ERR(rdev);
0975             dev_err(s5m8767->dev, "regulator init failed for %d\n",
0976                     id);
0977             return ret;
0978         }
0979 
0980         if (pdata->regulators[i].ext_control_gpiod) {
0981             ret = s5m8767_enable_ext_control(s5m8767, rdev);
0982             if (ret < 0) {
0983                 dev_err(s5m8767->dev,
0984                         "failed to enable gpio control over %s: %d\n",
0985                         rdev->desc->name, ret);
0986                 return ret;
0987             }
0988         }
0989     }
0990 
0991     return 0;
0992 }
0993 
0994 static const struct platform_device_id s5m8767_pmic_id[] = {
0995     { "s5m8767-pmic", 0},
0996     { },
0997 };
0998 MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id);
0999 
1000 static struct platform_driver s5m8767_pmic_driver = {
1001     .driver = {
1002         .name = "s5m8767-pmic",
1003     },
1004     .probe = s5m8767_pmic_probe,
1005     .id_table = s5m8767_pmic_id,
1006 };
1007 module_platform_driver(s5m8767_pmic_driver);
1008 
1009 /* Module information */
1010 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
1011 MODULE_DESCRIPTION("Samsung S5M8767 Regulator Driver");
1012 MODULE_LICENSE("GPL");
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