drivers/regulator/rtq6752-regulator.c

0001 // SPDX-License-Identifier: GPL-2.0+
0002
0003 #include <linux/bitops.h>
0004 #include <linux/delay.h>
0005 #include <linux/gpio/consumer.h>
0006 #include <linux/i2c.h>
0007 #include <linux/kernel.h>
0008 #include <linux/module.h>
0009 #include <linux/mutex.h>
0010 #include <linux/regmap.h>
0011 #include <linux/regulator/driver.h>
0012
0013 enum {
0014     RTQ6752_IDX_PAVDD = 0,
0015     RTQ6752_IDX_NAVDD = 1,
0016     RTQ6752_IDX_MAX
0017 };
0018
0019 #define RTQ6752_REG_PAVDD   0x00
0020 #define RTQ6752_REG_NAVDD   0x01
0021 #define RTQ6752_REG_PAVDDONDLY  0x07
0022 #define RTQ6752_REG_PAVDDSSTIME 0x08
0023 #define RTQ6752_REG_NAVDDONDLY  0x0D
0024 #define RTQ6752_REG_NAVDDSSTIME 0x0E
0025 #define RTQ6752_REG_OPTION1 0x12
0026 #define RTQ6752_REG_CHSWITCH    0x16
0027 #define RTQ6752_REG_FAULT   0x1D
0028
0029 #define RTQ6752_VOUT_MASK   GENMASK(5, 0)
0030 #define RTQ6752_NAVDDEN_MASK    BIT(3)
0031 #define RTQ6752_PAVDDEN_MASK    BIT(0)
0032 #define RTQ6752_PAVDDAD_MASK    BIT(4)
0033 #define RTQ6752_NAVDDAD_MASK    BIT(3)
0034 #define RTQ6752_PAVDDF_MASK BIT(3)
0035 #define RTQ6752_NAVDDF_MASK BIT(0)
0036 #define RTQ6752_ENABLE_MASK (BIT(RTQ6752_IDX_MAX) - 1)
0037
0038 #define RTQ6752_VOUT_MINUV  5000000
0039 #define RTQ6752_VOUT_STEPUV 50000
0040 #define RTQ6752_VOUT_NUM    47
0041 #define RTQ6752_I2CRDY_TIMEUS   1000
0042 #define RTQ6752_MINSS_TIMEUS    5000
0043
0044 struct rtq6752_priv {
0045     struct regmap *regmap;
0046     struct gpio_desc *enable_gpio;
0047     struct mutex lock;
0048     unsigned char enable_flag;
0049 };
0050
0051 static int rtq6752_set_vdd_enable(struct regulator_dev *rdev)
0052 {
0053     struct rtq6752_priv *priv = rdev_get_drvdata(rdev);
0054     int rid = rdev_get_id(rdev), ret;
0055
0056     mutex_lock(&priv->lock);
0057     if (!priv->enable_flag) {
0058         if (priv->enable_gpio) {
0059             gpiod_set_value(priv->enable_gpio, 1);
0060
0061             usleep_range(RTQ6752_I2CRDY_TIMEUS,
0062                      RTQ6752_I2CRDY_TIMEUS + 100);
0063         }
0064
0065         regcache_cache_only(priv->regmap, false);
0066         ret = regcache_sync(priv->regmap);
0067         if (ret) {
0068             mutex_unlock(&priv->lock);
0069             return ret;
0070         }
0071     }
0072
0073     priv->enable_flag |= BIT(rid);
0074     mutex_unlock(&priv->lock);
0075
0076     return regulator_enable_regmap(rdev);
0077 }
0078
0079 static int rtq6752_set_vdd_disable(struct regulator_dev *rdev)
0080 {
0081     struct rtq6752_priv *priv = rdev_get_drvdata(rdev);
0082     int rid = rdev_get_id(rdev), ret;
0083
0084     ret = regulator_disable_regmap(rdev);
0085     if (ret)
0086         return ret;
0087
0088     mutex_lock(&priv->lock);
0089     priv->enable_flag &= ~BIT(rid);
0090
0091     if (!priv->enable_flag) {
0092         regcache_cache_only(priv->regmap, true);
0093         regcache_mark_dirty(priv->regmap);
0094
0095         if (priv->enable_gpio)
0096             gpiod_set_value(priv->enable_gpio, 0);
0097
0098     }
0099     mutex_unlock(&priv->lock);
0100
0101     return 0;
0102 }
0103
0104 static int rtq6752_get_error_flags(struct regulator_dev *rdev,
0105                    unsigned int *flags)
0106 {
0107     unsigned int val, events = 0;
0108     const unsigned int fault_mask[] = {
0109         RTQ6752_PAVDDF_MASK, RTQ6752_NAVDDF_MASK };
0110     int rid = rdev_get_id(rdev), ret;
0111
0112     ret = regmap_read(rdev->regmap, RTQ6752_REG_FAULT, &val);
0113     if (ret)
0114         return ret;
0115
0116     if (val & fault_mask[rid])
0117         events = REGULATOR_ERROR_REGULATION_OUT;
0118
0119     *flags = events;
0120     return 0;
0121 }
0122
0123 static const struct regulator_ops rtq6752_regulator_ops = {
0124     .list_voltage = regulator_list_voltage_linear,
0125     .set_voltage_sel = regulator_set_voltage_sel_regmap,
0126     .get_voltage_sel = regulator_get_voltage_sel_regmap,
0127     .enable = rtq6752_set_vdd_enable,
0128     .disable = rtq6752_set_vdd_disable,
0129     .is_enabled = regulator_is_enabled_regmap,
0130     .set_active_discharge = regulator_set_active_discharge_regmap,
0131     .get_error_flags = rtq6752_get_error_flags,
0132 };
0133
0134 static const struct regulator_desc rtq6752_regulator_descs[] = {
0135     {
0136         .name = "rtq6752-pavdd",
0137         .of_match = of_match_ptr("pavdd"),
0138         .regulators_node = of_match_ptr("regulators"),
0139         .id = RTQ6752_IDX_PAVDD,
0140         .n_voltages = RTQ6752_VOUT_NUM,
0141         .ops = &rtq6752_regulator_ops,
0142         .owner = THIS_MODULE,
0143         .min_uV = RTQ6752_VOUT_MINUV,
0144         .uV_step = RTQ6752_VOUT_STEPUV,
0145         .enable_time = RTQ6752_MINSS_TIMEUS,
0146         .vsel_reg = RTQ6752_REG_PAVDD,
0147         .vsel_mask = RTQ6752_VOUT_MASK,
0148         .enable_reg = RTQ6752_REG_CHSWITCH,
0149         .enable_mask = RTQ6752_PAVDDEN_MASK,
0150         .active_discharge_reg = RTQ6752_REG_OPTION1,
0151         .active_discharge_mask = RTQ6752_PAVDDAD_MASK,
0152         .active_discharge_off = RTQ6752_PAVDDAD_MASK,
0153     },
0154     {
0155         .name = "rtq6752-navdd",
0156         .of_match = of_match_ptr("navdd"),
0157         .regulators_node = of_match_ptr("regulators"),
0158         .id = RTQ6752_IDX_NAVDD,
0159         .n_voltages = RTQ6752_VOUT_NUM,
0160         .ops = &rtq6752_regulator_ops,
0161         .owner = THIS_MODULE,
0162         .min_uV = RTQ6752_VOUT_MINUV,
0163         .uV_step = RTQ6752_VOUT_STEPUV,
0164         .enable_time = RTQ6752_MINSS_TIMEUS,
0165         .vsel_reg = RTQ6752_REG_NAVDD,
0166         .vsel_mask = RTQ6752_VOUT_MASK,
0167         .enable_reg = RTQ6752_REG_CHSWITCH,
0168         .enable_mask = RTQ6752_NAVDDEN_MASK,
0169         .active_discharge_reg = RTQ6752_REG_OPTION1,
0170         .active_discharge_mask = RTQ6752_NAVDDAD_MASK,
0171         .active_discharge_off = RTQ6752_NAVDDAD_MASK,
0172     }
0173 };
0174
0175 static int rtq6752_init_device_properties(struct rtq6752_priv *priv)
0176 {
0177     u8 raw_vals[] = { 0, 0 };
0178     int ret;
0179
0180     /* Configure PAVDD on and softstart delay time to the minimum */
0181     ret = regmap_raw_write(priv->regmap, RTQ6752_REG_PAVDDONDLY, raw_vals,
0182                    ARRAY_SIZE(raw_vals));
0183     if (ret)
0184         return ret;
0185
0186     /* Configure NAVDD on and softstart delay time to the minimum */
0187     return regmap_raw_write(priv->regmap, RTQ6752_REG_NAVDDONDLY, raw_vals,
0188                 ARRAY_SIZE(raw_vals));
0189 }
0190
0191 static bool rtq6752_is_volatile_reg(struct device *dev, unsigned int reg)
0192 {
0193     if (reg == RTQ6752_REG_FAULT)
0194         return true;
0195     return false;
0196 }
0197
0198 static const struct reg_default rtq6752_reg_defaults[] = {
0199     { RTQ6752_REG_PAVDD, 0x14 },
0200     { RTQ6752_REG_NAVDD, 0x14 },
0201     { RTQ6752_REG_PAVDDONDLY, 0x01 },
0202     { RTQ6752_REG_PAVDDSSTIME, 0x01 },
0203     { RTQ6752_REG_NAVDDONDLY, 0x01 },
0204     { RTQ6752_REG_NAVDDSSTIME, 0x01 },
0205     { RTQ6752_REG_OPTION1, 0x07 },
0206     { RTQ6752_REG_CHSWITCH, 0x29 },
0207 };
0208
0209 static const struct regmap_config rtq6752_regmap_config = {
0210     .reg_bits = 8,
0211     .val_bits = 8,
0212     .cache_type = REGCACHE_RBTREE,
0213     .max_register = RTQ6752_REG_FAULT,
0214     .reg_defaults = rtq6752_reg_defaults,
0215     .num_reg_defaults = ARRAY_SIZE(rtq6752_reg_defaults),
0216     .volatile_reg = rtq6752_is_volatile_reg,
0217 };
0218
0219 static int rtq6752_probe(struct i2c_client *i2c)
0220 {
0221     struct rtq6752_priv *priv;
0222     struct regulator_config reg_cfg = {};
0223     struct regulator_dev *rdev;
0224     int i, ret;
0225
0226     priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
0227     if (!priv)
0228         return -ENOMEM;
0229
0230     mutex_init(&priv->lock);
0231
0232     priv->enable_gpio = devm_gpiod_get_optional(&i2c->dev, "enable",
0233                             GPIOD_OUT_HIGH);
0234     if (IS_ERR(priv->enable_gpio)) {
0235         dev_err(&i2c->dev, "Failed to get 'enable' gpio\n");
0236         return PTR_ERR(priv->enable_gpio);
0237     }
0238
0239     usleep_range(RTQ6752_I2CRDY_TIMEUS, RTQ6752_I2CRDY_TIMEUS + 100);
0240     /* Default EN pin to high, PAVDD and NAVDD will be on */
0241     priv->enable_flag = RTQ6752_ENABLE_MASK;
0242
0243     priv->regmap = devm_regmap_init_i2c(i2c, &rtq6752_regmap_config);
0244     if (IS_ERR(priv->regmap)) {
0245         dev_err(&i2c->dev, "Failed to init regmap\n");
0246         return PTR_ERR(priv->regmap);
0247     }
0248
0249     ret = rtq6752_init_device_properties(priv);
0250     if (ret) {
0251         dev_err(&i2c->dev, "Failed to init device properties\n");
0252         return ret;
0253     }
0254
0255     reg_cfg.dev = &i2c->dev;
0256     reg_cfg.regmap = priv->regmap;
0257     reg_cfg.driver_data = priv;
0258
0259     for (i = 0; i < ARRAY_SIZE(rtq6752_regulator_descs); i++) {
0260         rdev = devm_regulator_register(&i2c->dev,
0261                            rtq6752_regulator_descs + i,
0262                            &reg_cfg);
0263         if (IS_ERR(rdev)) {
0264             dev_err(&i2c->dev, "Failed to init %d regulator\n", i);
0265             return PTR_ERR(rdev);
0266         }
0267     }
0268
0269     return 0;
0270 }
0271
0272 static const struct of_device_id __maybe_unused rtq6752_device_table[] = {
0273     { .compatible = "richtek,rtq6752", },
0274     {}
0275 };
0276 MODULE_DEVICE_TABLE(of, rtq6752_device_table);
0277
0278 static struct i2c_driver rtq6752_driver = {
0279     .driver = {
0280         .name = "rtq6752",
0281         .of_match_table = rtq6752_device_table,
0282     },
0283     .probe_new = rtq6752_probe,
0284 };
0285 module_i2c_driver(rtq6752_driver);
0286
0287 MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");
0288 MODULE_DESCRIPTION("Richtek RTQ6752 Regulator Driver");
0289 MODULE_LICENSE("GPL v2");