0001
0002
0003 #include <linux/bitops.h>
0004 #include <linux/i2c.h>
0005 #include <linux/kernel.h>
0006 #include <linux/module.h>
0007 #include <linux/of.h>
0008 #include <linux/regmap.h>
0009 #include <linux/regulator/driver.h>
0010
0011 enum {
0012 RTQ2134_IDX_BUCK1 = 0,
0013 RTQ2134_IDX_BUCK2,
0014 RTQ2134_IDX_BUCK3,
0015 RTQ2134_IDX_MAX
0016 };
0017
0018 #define RTQ2134_AUTO_MODE 0
0019 #define RTQ2134_FCCM_MODE 1
0020
0021 #define RTQ2134_BUCK_DVS0_CTRL 0
0022 #define RTQ2134_BUCK_VSEL_CTRL 2
0023
0024 #define RTQ2134_REG_IO_CHIPNAME 0x01
0025 #define RTQ2134_REG_FLT_RECORDTEMP 0x13
0026 #define RTQ2134_REG_FLT_RECORDBUCK(_id) (0x14 + (_id))
0027 #define RTQ2134_REG_FLT_BUCKCTRL(_id) (0x37 + (_id))
0028 #define RTQ2134_REG_BUCK1_CFG0 0x42
0029 #define RTQ2134_REG_BUCK1_DVS0CFG1 0x48
0030 #define RTQ2134_REG_BUCK1_DVS0CFG0 0x49
0031 #define RTQ2134_REG_BUCK1_DVS1CFG1 0x4A
0032 #define RTQ2134_REG_BUCK1_DVS1CFG0 0x4B
0033 #define RTQ2134_REG_BUCK1_DVSCFG 0x52
0034 #define RTQ2134_REG_BUCK1_RSPCFG 0x54
0035 #define RTQ2134_REG_BUCK2_CFG0 0x5F
0036 #define RTQ2134_REG_BUCK2_DVS0CFG1 0x62
0037 #define RTQ2134_REG_BUCK2_DVS0CFG0 0x63
0038 #define RTQ2134_REG_BUCK2_DVS1CFG1 0x64
0039 #define RTQ2134_REG_BUCK2_DVS1CFG0 0x65
0040 #define RTQ2134_REG_BUCK2_DVSCFG 0x6C
0041 #define RTQ2134_REG_BUCK2_RSPCFG 0x6E
0042 #define RTQ2134_REG_BUCK3_CFG0 0x79
0043 #define RTQ2134_REG_BUCK3_DVS0CFG1 0x7C
0044 #define RTQ2134_REG_BUCK3_DVS0CFG0 0x7D
0045 #define RTQ2134_REG_BUCK3_DVS1CFG1 0x7E
0046 #define RTQ2134_REG_BUCK3_DVS1CFG0 0x7F
0047 #define RTQ2134_REG_BUCK3_DVSCFG 0x86
0048 #define RTQ2134_REG_BUCK3_RSPCFG 0x88
0049 #define RTQ2134_REG_BUCK3_SLEWCTRL 0x89
0050
0051 #define RTQ2134_VOUT_MAXNUM 256
0052 #define RTQ2134_VOUT_MASK 0xFF
0053 #define RTQ2134_VOUTEN_MASK BIT(0)
0054 #define RTQ2134_ACTDISCHG_MASK BIT(0)
0055 #define RTQ2134_RSPUP_MASK GENMASK(6, 4)
0056 #define RTQ2134_FCCM_MASK BIT(5)
0057 #define RTQ2134_UVHICCUP_MASK BIT(3)
0058 #define RTQ2134_BUCKDVS_CTRL_MASK GENMASK(1, 0)
0059 #define RTQ2134_CHIPOT_MASK BIT(2)
0060 #define RTQ2134_BUCKOV_MASK BIT(5)
0061 #define RTQ2134_BUCKUV_MASK BIT(4)
0062
0063 struct rtq2134_regulator_desc {
0064 struct regulator_desc desc;
0065
0066 unsigned int mode_reg;
0067 unsigned int mode_mask;
0068 unsigned int suspend_enable_reg;
0069 unsigned int suspend_enable_mask;
0070 unsigned int suspend_vsel_reg;
0071 unsigned int suspend_vsel_mask;
0072 unsigned int suspend_mode_reg;
0073 unsigned int suspend_mode_mask;
0074 unsigned int dvs_ctrl_reg;
0075 };
0076
0077 static int rtq2134_buck_set_mode(struct regulator_dev *rdev, unsigned int mode)
0078 {
0079 struct rtq2134_regulator_desc *desc =
0080 (struct rtq2134_regulator_desc *)rdev->desc;
0081 unsigned int val;
0082
0083 if (mode == REGULATOR_MODE_NORMAL)
0084 val = RTQ2134_AUTO_MODE;
0085 else if (mode == REGULATOR_MODE_FAST)
0086 val = RTQ2134_FCCM_MODE;
0087 else
0088 return -EINVAL;
0089
0090 val <<= ffs(desc->mode_mask) - 1;
0091 return regmap_update_bits(rdev->regmap, desc->mode_reg, desc->mode_mask,
0092 val);
0093 }
0094
0095 static unsigned int rtq2134_buck_get_mode(struct regulator_dev *rdev)
0096 {
0097 struct rtq2134_regulator_desc *desc =
0098 (struct rtq2134_regulator_desc *)rdev->desc;
0099 unsigned int mode;
0100 int ret;
0101
0102 ret = regmap_read(rdev->regmap, desc->mode_reg, &mode);
0103 if (ret)
0104 return ret;
0105
0106 if (mode & desc->mode_mask)
0107 return REGULATOR_MODE_FAST;
0108 return REGULATOR_MODE_NORMAL;
0109 }
0110
0111 static int rtq2134_buck_set_suspend_voltage(struct regulator_dev *rdev, int uV)
0112 {
0113 struct rtq2134_regulator_desc *desc =
0114 (struct rtq2134_regulator_desc *)rdev->desc;
0115 int sel;
0116
0117 sel = regulator_map_voltage_linear_range(rdev, uV, uV);
0118 if (sel < 0)
0119 return sel;
0120
0121 sel <<= ffs(desc->suspend_vsel_mask) - 1;
0122
0123 return regmap_update_bits(rdev->regmap, desc->suspend_vsel_reg,
0124 desc->suspend_vsel_mask, sel);
0125 }
0126
0127 static int rtq2134_buck_set_suspend_enable(struct regulator_dev *rdev)
0128 {
0129 struct rtq2134_regulator_desc *desc =
0130 (struct rtq2134_regulator_desc *)rdev->desc;
0131 unsigned int val = desc->suspend_enable_mask;
0132
0133 return regmap_update_bits(rdev->regmap, desc->suspend_enable_reg,
0134 desc->suspend_enable_mask, val);
0135 }
0136
0137 static int rtq2134_buck_set_suspend_disable(struct regulator_dev *rdev)
0138 {
0139 struct rtq2134_regulator_desc *desc =
0140 (struct rtq2134_regulator_desc *)rdev->desc;
0141
0142 return regmap_update_bits(rdev->regmap, desc->suspend_enable_reg,
0143 desc->suspend_enable_mask, 0);
0144 }
0145
0146 static int rtq2134_buck_set_suspend_mode(struct regulator_dev *rdev,
0147 unsigned int mode)
0148 {
0149 struct rtq2134_regulator_desc *desc =
0150 (struct rtq2134_regulator_desc *)rdev->desc;
0151 unsigned int val;
0152
0153 if (mode == REGULATOR_MODE_NORMAL)
0154 val = RTQ2134_AUTO_MODE;
0155 else if (mode == REGULATOR_MODE_FAST)
0156 val = RTQ2134_FCCM_MODE;
0157 else
0158 return -EINVAL;
0159
0160 val <<= ffs(desc->suspend_mode_mask) - 1;
0161 return regmap_update_bits(rdev->regmap, desc->suspend_mode_reg,
0162 desc->suspend_mode_mask, val);
0163 }
0164
0165 static int rtq2134_buck_get_error_flags(struct regulator_dev *rdev,
0166 unsigned int *flags)
0167 {
0168 int rid = rdev_get_id(rdev);
0169 unsigned int chip_error, buck_error, events = 0;
0170 int ret;
0171
0172 ret = regmap_read(rdev->regmap, RTQ2134_REG_FLT_RECORDTEMP,
0173 &chip_error);
0174 if (ret) {
0175 dev_err(&rdev->dev, "Failed to get chip error flag\n");
0176 return ret;
0177 }
0178
0179 ret = regmap_read(rdev->regmap, RTQ2134_REG_FLT_RECORDBUCK(rid),
0180 &buck_error);
0181 if (ret) {
0182 dev_err(&rdev->dev, "Failed to get buck error flag\n");
0183 return ret;
0184 }
0185
0186 if (chip_error & RTQ2134_CHIPOT_MASK)
0187 events |= REGULATOR_ERROR_OVER_TEMP;
0188
0189 if (buck_error & RTQ2134_BUCKUV_MASK)
0190 events |= REGULATOR_ERROR_UNDER_VOLTAGE;
0191
0192 if (buck_error & RTQ2134_BUCKOV_MASK)
0193 events |= REGULATOR_ERROR_REGULATION_OUT;
0194
0195 *flags = events;
0196 return 0;
0197 }
0198
0199 static const struct regulator_ops rtq2134_buck_ops = {
0200 .list_voltage = regulator_list_voltage_linear_range,
0201 .set_voltage_sel = regulator_set_voltage_sel_regmap,
0202 .get_voltage_sel = regulator_get_voltage_sel_regmap,
0203 .enable = regulator_enable_regmap,
0204 .disable = regulator_disable_regmap,
0205 .is_enabled = regulator_is_enabled_regmap,
0206 .set_active_discharge = regulator_set_active_discharge_regmap,
0207 .set_ramp_delay = regulator_set_ramp_delay_regmap,
0208 .set_mode = rtq2134_buck_set_mode,
0209 .get_mode = rtq2134_buck_get_mode,
0210 .set_suspend_voltage = rtq2134_buck_set_suspend_voltage,
0211 .set_suspend_enable = rtq2134_buck_set_suspend_enable,
0212 .set_suspend_disable = rtq2134_buck_set_suspend_disable,
0213 .set_suspend_mode = rtq2134_buck_set_suspend_mode,
0214 .get_error_flags = rtq2134_buck_get_error_flags,
0215 };
0216
0217 static const struct linear_range rtq2134_buck_vout_ranges[] = {
0218 REGULATOR_LINEAR_RANGE(300000, 0, 200, 5000),
0219 REGULATOR_LINEAR_RANGE(1310000, 201, 255, 10000)
0220 };
0221
0222 static unsigned int rtq2134_buck_of_map_mode(unsigned int mode)
0223 {
0224 switch (mode) {
0225 case RTQ2134_AUTO_MODE:
0226 return REGULATOR_MODE_NORMAL;
0227 case RTQ2134_FCCM_MODE:
0228 return REGULATOR_MODE_FAST;
0229 }
0230
0231 return REGULATOR_MODE_INVALID;
0232 }
0233
0234 static int rtq2134_buck_of_parse_cb(struct device_node *np,
0235 const struct regulator_desc *desc,
0236 struct regulator_config *cfg)
0237 {
0238 struct rtq2134_regulator_desc *rdesc =
0239 (struct rtq2134_regulator_desc *)desc;
0240 int rid = desc->id;
0241 bool uv_shutdown, vsel_dvs;
0242 unsigned int val;
0243 int ret;
0244
0245 vsel_dvs = of_property_read_bool(np, "richtek,use-vsel-dvs");
0246 if (vsel_dvs)
0247 val = RTQ2134_BUCK_VSEL_CTRL;
0248 else
0249 val = RTQ2134_BUCK_DVS0_CTRL;
0250
0251 ret = regmap_update_bits(cfg->regmap, rdesc->dvs_ctrl_reg,
0252 RTQ2134_BUCKDVS_CTRL_MASK, val);
0253 if (ret)
0254 return ret;
0255
0256 uv_shutdown = of_property_read_bool(np, "richtek,uv-shutdown");
0257 if (uv_shutdown)
0258 val = 0;
0259 else
0260 val = RTQ2134_UVHICCUP_MASK;
0261
0262 return regmap_update_bits(cfg->regmap, RTQ2134_REG_FLT_BUCKCTRL(rid),
0263 RTQ2134_UVHICCUP_MASK, val);
0264 }
0265
0266 static const unsigned int rtq2134_buck_ramp_delay_table[] = {
0267 0, 16000, 0, 8000, 4000, 2000, 1000, 500
0268 };
0269
0270 #define RTQ2134_BUCK_DESC(_id) { \
0271 .desc = { \
0272 .name = "rtq2134_buck" #_id, \
0273 .of_match = of_match_ptr("buck" #_id), \
0274 .regulators_node = of_match_ptr("regulators"), \
0275 .id = RTQ2134_IDX_BUCK##_id, \
0276 .type = REGULATOR_VOLTAGE, \
0277 .owner = THIS_MODULE, \
0278 .ops = &rtq2134_buck_ops, \
0279 .n_voltages = RTQ2134_VOUT_MAXNUM, \
0280 .linear_ranges = rtq2134_buck_vout_ranges, \
0281 .n_linear_ranges = ARRAY_SIZE(rtq2134_buck_vout_ranges), \
0282 .vsel_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG1, \
0283 .vsel_mask = RTQ2134_VOUT_MASK, \
0284 .enable_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG0, \
0285 .enable_mask = RTQ2134_VOUTEN_MASK, \
0286 .active_discharge_reg = RTQ2134_REG_BUCK##_id##_CFG0, \
0287 .active_discharge_mask = RTQ2134_ACTDISCHG_MASK, \
0288 .active_discharge_on = RTQ2134_ACTDISCHG_MASK, \
0289 .ramp_reg = RTQ2134_REG_BUCK##_id##_RSPCFG, \
0290 .ramp_mask = RTQ2134_RSPUP_MASK, \
0291 .ramp_delay_table = rtq2134_buck_ramp_delay_table, \
0292 .n_ramp_values = ARRAY_SIZE(rtq2134_buck_ramp_delay_table), \
0293 .of_map_mode = rtq2134_buck_of_map_mode, \
0294 .of_parse_cb = rtq2134_buck_of_parse_cb, \
0295 }, \
0296 .mode_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG0, \
0297 .mode_mask = RTQ2134_FCCM_MASK, \
0298 .suspend_mode_reg = RTQ2134_REG_BUCK##_id##_DVS1CFG0, \
0299 .suspend_mode_mask = RTQ2134_FCCM_MASK, \
0300 .suspend_enable_reg = RTQ2134_REG_BUCK##_id##_DVS1CFG0, \
0301 .suspend_enable_mask = RTQ2134_VOUTEN_MASK, \
0302 .suspend_vsel_reg = RTQ2134_REG_BUCK##_id##_DVS1CFG1, \
0303 .suspend_vsel_mask = RTQ2134_VOUT_MASK, \
0304 .dvs_ctrl_reg = RTQ2134_REG_BUCK##_id##_DVSCFG, \
0305 }
0306
0307 static const struct rtq2134_regulator_desc rtq2134_regulator_descs[] = {
0308 RTQ2134_BUCK_DESC(1),
0309 RTQ2134_BUCK_DESC(2),
0310 RTQ2134_BUCK_DESC(3)
0311 };
0312
0313 static bool rtq2134_is_accissible_reg(struct device *dev, unsigned int reg)
0314 {
0315 if (reg >= RTQ2134_REG_IO_CHIPNAME && reg <= RTQ2134_REG_BUCK3_SLEWCTRL)
0316 return true;
0317 return false;
0318 }
0319
0320 static const struct regmap_config rtq2134_regmap_config = {
0321 .reg_bits = 8,
0322 .val_bits = 8,
0323 .max_register = RTQ2134_REG_BUCK3_SLEWCTRL,
0324
0325 .readable_reg = rtq2134_is_accissible_reg,
0326 .writeable_reg = rtq2134_is_accissible_reg,
0327 };
0328
0329 static int rtq2134_probe(struct i2c_client *i2c)
0330 {
0331 struct regmap *regmap;
0332 struct regulator_dev *rdev;
0333 struct regulator_config regulator_cfg = {};
0334 int i;
0335
0336 regmap = devm_regmap_init_i2c(i2c, &rtq2134_regmap_config);
0337 if (IS_ERR(regmap)) {
0338 dev_err(&i2c->dev, "Failed to allocate regmap\n");
0339 return PTR_ERR(regmap);
0340 }
0341
0342 regulator_cfg.dev = &i2c->dev;
0343 regulator_cfg.regmap = regmap;
0344 for (i = 0; i < ARRAY_SIZE(rtq2134_regulator_descs); i++) {
0345 rdev = devm_regulator_register(&i2c->dev,
0346 &rtq2134_regulator_descs[i].desc,
0347 ®ulator_cfg);
0348 if (IS_ERR(rdev)) {
0349 dev_err(&i2c->dev, "Failed to init %d regulator\n", i);
0350 return PTR_ERR(rdev);
0351 }
0352 }
0353
0354 return 0;
0355 }
0356
0357 static const struct of_device_id __maybe_unused rtq2134_device_tables[] = {
0358 { .compatible = "richtek,rtq2134", },
0359 {}
0360 };
0361 MODULE_DEVICE_TABLE(of, rtq2134_device_tables);
0362
0363 static struct i2c_driver rtq2134_driver = {
0364 .driver = {
0365 .name = "rtq2134",
0366 .of_match_table = rtq2134_device_tables,
0367 },
0368 .probe_new = rtq2134_probe,
0369 };
0370 module_i2c_driver(rtq2134_driver);
0371
0372 MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");
0373 MODULE_DESCRIPTION("Richtek RTQ2134 Regulator Driver");
0374 MODULE_LICENSE("GPL v2");
