drivers/regulator/qcom_spmi-regulator.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
0004  */
0005
0006 #include <linux/module.h>
0007 #include <linux/delay.h>
0008 #include <linux/devm-helpers.h>
0009 #include <linux/err.h>
0010 #include <linux/kernel.h>
0011 #include <linux/interrupt.h>
0012 #include <linux/bitops.h>
0013 #include <linux/slab.h>
0014 #include <linux/of.h>
0015 #include <linux/of_device.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/ktime.h>
0018 #include <linux/regulator/driver.h>
0019 #include <linux/regmap.h>
0020 #include <linux/list.h>
0021 #include <linux/mfd/syscon.h>
0022 #include <linux/io.h>
0023
0024 /* Pin control enable input pins. */
0025 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE     0x00
0026 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0      0x01
0027 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1      0x02
0028 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2      0x04
0029 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3      0x08
0030 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT   0x10
0031
0032 /* Pin control high power mode input pins. */
0033 #define SPMI_REGULATOR_PIN_CTRL_HPM_NONE        0x00
0034 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN0         0x01
0035 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN1         0x02
0036 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN2         0x04
0037 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN3         0x08
0038 #define SPMI_REGULATOR_PIN_CTRL_HPM_SLEEP_B     0x10
0039 #define SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT      0x20
0040
0041 /*
0042  * Used with enable parameters to specify that hardware default register values
0043  * should be left unaltered.
0044  */
0045 #define SPMI_REGULATOR_USE_HW_DEFAULT           2
0046
0047 /* Soft start strength of a voltage switch type regulator */
0048 enum spmi_vs_soft_start_str {
0049     SPMI_VS_SOFT_START_STR_0P05_UA = 0,
0050     SPMI_VS_SOFT_START_STR_0P25_UA,
0051     SPMI_VS_SOFT_START_STR_0P55_UA,
0052     SPMI_VS_SOFT_START_STR_0P75_UA,
0053     SPMI_VS_SOFT_START_STR_HW_DEFAULT,
0054 };
0055
0056 /**
0057  * struct spmi_regulator_init_data - spmi-regulator initialization data
0058  * @pin_ctrl_enable:        Bit mask specifying which hardware pins should be
0059  *              used to enable the regulator, if any
0060  *              Value should be an ORing of
0061  *              SPMI_REGULATOR_PIN_CTRL_ENABLE_* constants.  If
0062  *              the bit specified by
0063  *              SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT is
0064  *              set, then pin control enable hardware registers
0065  *              will not be modified.
0066  * @pin_ctrl_hpm:           Bit mask specifying which hardware pins should be
0067  *              used to force the regulator into high power
0068  *              mode, if any
0069  *              Value should be an ORing of
0070  *              SPMI_REGULATOR_PIN_CTRL_HPM_* constants.  If
0071  *              the bit specified by
0072  *              SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT is
0073  *              set, then pin control mode hardware registers
0074  *              will not be modified.
0075  * @vs_soft_start_strength: This parameter sets the soft start strength for
0076  *              voltage switch type regulators.  Its value
0077  *              should be one of SPMI_VS_SOFT_START_STR_*.  If
0078  *              its value is SPMI_VS_SOFT_START_STR_HW_DEFAULT,
0079  *              then the soft start strength will be left at its
0080  *              default hardware value.
0081  */
0082 struct spmi_regulator_init_data {
0083     unsigned                pin_ctrl_enable;
0084     unsigned                pin_ctrl_hpm;
0085     enum spmi_vs_soft_start_str     vs_soft_start_strength;
0086 };
0087
0088 /* These types correspond to unique register layouts. */
0089 enum spmi_regulator_logical_type {
0090     SPMI_REGULATOR_LOGICAL_TYPE_SMPS,
0091     SPMI_REGULATOR_LOGICAL_TYPE_LDO,
0092     SPMI_REGULATOR_LOGICAL_TYPE_VS,
0093     SPMI_REGULATOR_LOGICAL_TYPE_BOOST,
0094     SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS,
0095     SPMI_REGULATOR_LOGICAL_TYPE_BOOST_BYP,
0096     SPMI_REGULATOR_LOGICAL_TYPE_LN_LDO,
0097     SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS,
0098     SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS,
0099     SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO,
0100     SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426,
0101     SPMI_REGULATOR_LOGICAL_TYPE_HFS430,
0102 };
0103
0104 enum spmi_regulator_type {
0105     SPMI_REGULATOR_TYPE_BUCK        = 0x03,
0106     SPMI_REGULATOR_TYPE_LDO         = 0x04,
0107     SPMI_REGULATOR_TYPE_VS          = 0x05,
0108     SPMI_REGULATOR_TYPE_BOOST       = 0x1b,
0109     SPMI_REGULATOR_TYPE_FTS         = 0x1c,
0110     SPMI_REGULATOR_TYPE_BOOST_BYP       = 0x1f,
0111     SPMI_REGULATOR_TYPE_ULT_LDO     = 0x21,
0112     SPMI_REGULATOR_TYPE_ULT_BUCK        = 0x22,
0113 };
0114
0115 enum spmi_regulator_subtype {
0116     SPMI_REGULATOR_SUBTYPE_GP_CTL       = 0x08,
0117     SPMI_REGULATOR_SUBTYPE_RF_CTL       = 0x09,
0118     SPMI_REGULATOR_SUBTYPE_N50      = 0x01,
0119     SPMI_REGULATOR_SUBTYPE_N150     = 0x02,
0120     SPMI_REGULATOR_SUBTYPE_N300     = 0x03,
0121     SPMI_REGULATOR_SUBTYPE_N600     = 0x04,
0122     SPMI_REGULATOR_SUBTYPE_N1200        = 0x05,
0123     SPMI_REGULATOR_SUBTYPE_N600_ST      = 0x06,
0124     SPMI_REGULATOR_SUBTYPE_N1200_ST     = 0x07,
0125     SPMI_REGULATOR_SUBTYPE_N900_ST      = 0x14,
0126     SPMI_REGULATOR_SUBTYPE_N300_ST      = 0x15,
0127     SPMI_REGULATOR_SUBTYPE_P50      = 0x08,
0128     SPMI_REGULATOR_SUBTYPE_P150     = 0x09,
0129     SPMI_REGULATOR_SUBTYPE_P300     = 0x0a,
0130     SPMI_REGULATOR_SUBTYPE_P600     = 0x0b,
0131     SPMI_REGULATOR_SUBTYPE_P1200        = 0x0c,
0132     SPMI_REGULATOR_SUBTYPE_LN       = 0x10,
0133     SPMI_REGULATOR_SUBTYPE_LV_P50       = 0x28,
0134     SPMI_REGULATOR_SUBTYPE_LV_P150      = 0x29,
0135     SPMI_REGULATOR_SUBTYPE_LV_P300      = 0x2a,
0136     SPMI_REGULATOR_SUBTYPE_LV_P600      = 0x2b,
0137     SPMI_REGULATOR_SUBTYPE_LV_P1200     = 0x2c,
0138     SPMI_REGULATOR_SUBTYPE_LV_P450      = 0x2d,
0139     SPMI_REGULATOR_SUBTYPE_HT_N300_ST   = 0x30,
0140     SPMI_REGULATOR_SUBTYPE_HT_N600_ST   = 0x31,
0141     SPMI_REGULATOR_SUBTYPE_HT_N1200_ST  = 0x32,
0142     SPMI_REGULATOR_SUBTYPE_HT_LVP150    = 0x3b,
0143     SPMI_REGULATOR_SUBTYPE_HT_LVP300    = 0x3c,
0144     SPMI_REGULATOR_SUBTYPE_L660_N300_ST = 0x42,
0145     SPMI_REGULATOR_SUBTYPE_L660_N600_ST = 0x43,
0146     SPMI_REGULATOR_SUBTYPE_L660_P50     = 0x46,
0147     SPMI_REGULATOR_SUBTYPE_L660_P150    = 0x47,
0148     SPMI_REGULATOR_SUBTYPE_L660_P600    = 0x49,
0149     SPMI_REGULATOR_SUBTYPE_L660_LVP150  = 0x4d,
0150     SPMI_REGULATOR_SUBTYPE_L660_LVP600  = 0x4f,
0151     SPMI_REGULATOR_SUBTYPE_LV100        = 0x01,
0152     SPMI_REGULATOR_SUBTYPE_LV300        = 0x02,
0153     SPMI_REGULATOR_SUBTYPE_MV300        = 0x08,
0154     SPMI_REGULATOR_SUBTYPE_MV500        = 0x09,
0155     SPMI_REGULATOR_SUBTYPE_HDMI     = 0x10,
0156     SPMI_REGULATOR_SUBTYPE_OTG      = 0x11,
0157     SPMI_REGULATOR_SUBTYPE_5V_BOOST     = 0x01,
0158     SPMI_REGULATOR_SUBTYPE_FTS_CTL      = 0x08,
0159     SPMI_REGULATOR_SUBTYPE_FTS2p5_CTL   = 0x09,
0160     SPMI_REGULATOR_SUBTYPE_FTS426_CTL   = 0x0a,
0161     SPMI_REGULATOR_SUBTYPE_BB_2A        = 0x01,
0162     SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL1  = 0x0d,
0163     SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2  = 0x0e,
0164     SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3  = 0x0f,
0165     SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4  = 0x10,
0166     SPMI_REGULATOR_SUBTYPE_HFS430       = 0x0a,
0167     SPMI_REGULATOR_SUBTYPE_HT_P150      = 0x35,
0168     SPMI_REGULATOR_SUBTYPE_HT_P600      = 0x3d,
0169 };
0170
0171 enum spmi_common_regulator_registers {
0172     SPMI_COMMON_REG_DIG_MAJOR_REV       = 0x01,
0173     SPMI_COMMON_REG_TYPE            = 0x04,
0174     SPMI_COMMON_REG_SUBTYPE         = 0x05,
0175     SPMI_COMMON_REG_VOLTAGE_RANGE       = 0x40,
0176     SPMI_COMMON_REG_VOLTAGE_SET     = 0x41,
0177     SPMI_COMMON_REG_MODE            = 0x45,
0178     SPMI_COMMON_REG_ENABLE          = 0x46,
0179     SPMI_COMMON_REG_PULL_DOWN       = 0x48,
0180     SPMI_COMMON_REG_SOFT_START      = 0x4c,
0181     SPMI_COMMON_REG_STEP_CTRL       = 0x61,
0182 };
0183
0184 /*
0185  * Second common register layout used by newer devices starting with ftsmps426
0186  * Note that some of the registers from the first common layout remain
0187  * unchanged and their definition is not duplicated.
0188  */
0189 enum spmi_ftsmps426_regulator_registers {
0190     SPMI_FTSMPS426_REG_VOLTAGE_LSB      = 0x40,
0191     SPMI_FTSMPS426_REG_VOLTAGE_MSB      = 0x41,
0192     SPMI_FTSMPS426_REG_VOLTAGE_ULS_LSB  = 0x68,
0193     SPMI_FTSMPS426_REG_VOLTAGE_ULS_MSB  = 0x69,
0194 };
0195
0196 enum spmi_vs_registers {
0197     SPMI_VS_REG_OCP             = 0x4a,
0198     SPMI_VS_REG_SOFT_START          = 0x4c,
0199 };
0200
0201 enum spmi_boost_registers {
0202     SPMI_BOOST_REG_CURRENT_LIMIT        = 0x4a,
0203 };
0204
0205 enum spmi_boost_byp_registers {
0206     SPMI_BOOST_BYP_REG_CURRENT_LIMIT    = 0x4b,
0207 };
0208
0209 enum spmi_saw3_registers {
0210     SAW3_SECURE             = 0x00,
0211     SAW3_ID                 = 0x04,
0212     SAW3_SPM_STS                = 0x0C,
0213     SAW3_AVS_STS                = 0x10,
0214     SAW3_PMIC_STS               = 0x14,
0215     SAW3_RST                = 0x18,
0216     SAW3_VCTL               = 0x1C,
0217     SAW3_AVS_CTL                = 0x20,
0218     SAW3_AVS_LIMIT              = 0x24,
0219     SAW3_AVS_DLY                = 0x28,
0220     SAW3_AVS_HYSTERESIS         = 0x2C,
0221     SAW3_SPM_STS2               = 0x38,
0222     SAW3_SPM_PMIC_DATA_3            = 0x4C,
0223     SAW3_VERSION                = 0xFD0,
0224 };
0225
0226 /* Used for indexing into ctrl_reg.  These are offets from 0x40 */
0227 enum spmi_common_control_register_index {
0228     SPMI_COMMON_IDX_VOLTAGE_RANGE       = 0,
0229     SPMI_COMMON_IDX_VOLTAGE_SET     = 1,
0230     SPMI_COMMON_IDX_MODE            = 5,
0231     SPMI_COMMON_IDX_ENABLE          = 6,
0232 };
0233
0234 /* Common regulator control register layout */
0235 #define SPMI_COMMON_ENABLE_MASK         0x80
0236 #define SPMI_COMMON_ENABLE          0x80
0237 #define SPMI_COMMON_DISABLE         0x00
0238 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN3_MASK   0x08
0239 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN2_MASK   0x04
0240 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN1_MASK   0x02
0241 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN0_MASK   0x01
0242 #define SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK  0x0f
0243
0244 /* Common regulator mode register layout */
0245 #define SPMI_COMMON_MODE_HPM_MASK       0x80
0246 #define SPMI_COMMON_MODE_AUTO_MASK      0x40
0247 #define SPMI_COMMON_MODE_BYPASS_MASK        0x20
0248 #define SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK  0x10
0249 #define SPMI_COMMON_MODE_FOLLOW_HW_EN3_MASK 0x08
0250 #define SPMI_COMMON_MODE_FOLLOW_HW_EN2_MASK 0x04
0251 #define SPMI_COMMON_MODE_FOLLOW_HW_EN1_MASK 0x02
0252 #define SPMI_COMMON_MODE_FOLLOW_HW_EN0_MASK 0x01
0253 #define SPMI_COMMON_MODE_FOLLOW_ALL_MASK    0x1f
0254
0255 #define SPMI_FTSMPS426_MODE_BYPASS_MASK     3
0256 #define SPMI_FTSMPS426_MODE_RETENTION_MASK  4
0257 #define SPMI_FTSMPS426_MODE_LPM_MASK        5
0258 #define SPMI_FTSMPS426_MODE_AUTO_MASK       6
0259 #define SPMI_FTSMPS426_MODE_HPM_MASK        7
0260
0261 #define SPMI_FTSMPS426_MODE_MASK        0x07
0262
0263 /* Common regulator pull down control register layout */
0264 #define SPMI_COMMON_PULL_DOWN_ENABLE_MASK   0x80
0265
0266 /* LDO regulator current limit control register layout */
0267 #define SPMI_LDO_CURRENT_LIMIT_ENABLE_MASK  0x80
0268
0269 /* LDO regulator soft start control register layout */
0270 #define SPMI_LDO_SOFT_START_ENABLE_MASK     0x80
0271
0272 /* VS regulator over current protection control register layout */
0273 #define SPMI_VS_OCP_OVERRIDE            0x01
0274 #define SPMI_VS_OCP_NO_OVERRIDE         0x00
0275
0276 /* VS regulator soft start control register layout */
0277 #define SPMI_VS_SOFT_START_ENABLE_MASK      0x80
0278 #define SPMI_VS_SOFT_START_SEL_MASK     0x03
0279
0280 /* Boost regulator current limit control register layout */
0281 #define SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK    0x80
0282 #define SPMI_BOOST_CURRENT_LIMIT_MASK       0x07
0283
0284 #define SPMI_VS_OCP_DEFAULT_MAX_RETRIES     10
0285 #define SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS  30
0286 #define SPMI_VS_OCP_FALL_DELAY_US       90
0287 #define SPMI_VS_OCP_FAULT_DELAY_US      20000
0288
0289 #define SPMI_FTSMPS_STEP_CTRL_STEP_MASK     0x18
0290 #define SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT    3
0291 #define SPMI_FTSMPS_STEP_CTRL_DELAY_MASK    0x07
0292 #define SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT   0
0293
0294 /* Clock rate in kHz of the FTSMPS regulator reference clock. */
0295 #define SPMI_FTSMPS_CLOCK_RATE      19200
0296
0297 /* Minimum voltage stepper delay for each step. */
0298 #define SPMI_FTSMPS_STEP_DELAY      8
0299 #define SPMI_DEFAULT_STEP_DELAY     20
0300
0301 /*
0302  * The ratio SPMI_FTSMPS_STEP_MARGIN_NUM/SPMI_FTSMPS_STEP_MARGIN_DEN is used to
0303  * adjust the step rate in order to account for oscillator variance.
0304  */
0305 #define SPMI_FTSMPS_STEP_MARGIN_NUM 4
0306 #define SPMI_FTSMPS_STEP_MARGIN_DEN 5
0307
0308 #define SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK 0x03
0309 #define SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT    0
0310
0311 /* Clock rate in kHz of the FTSMPS426 regulator reference clock. */
0312 #define SPMI_FTSMPS426_CLOCK_RATE       4800
0313
0314 #define SPMI_HFS430_CLOCK_RATE          1600
0315
0316 /* Minimum voltage stepper delay for each step. */
0317 #define SPMI_FTSMPS426_STEP_DELAY       2
0318
0319 /*
0320  * The ratio SPMI_FTSMPS426_STEP_MARGIN_NUM/SPMI_FTSMPS426_STEP_MARGIN_DEN is
0321  * used to adjust the step rate in order to account for oscillator variance.
0322  */
0323 #define SPMI_FTSMPS426_STEP_MARGIN_NUM  10
0324 #define SPMI_FTSMPS426_STEP_MARGIN_DEN  11
0325
0326
0327 /* VSET value to decide the range of ULT SMPS */
0328 #define ULT_SMPS_RANGE_SPLIT 0x60
0329
0330 /**
0331  * struct spmi_voltage_range - regulator set point voltage mapping description
0332  * @min_uV:     Minimum programmable output voltage resulting from
0333  *          set point register value 0x00
0334  * @max_uV:     Maximum programmable output voltage
0335  * @step_uV:        Output voltage increase resulting from the set point
0336  *          register value increasing by 1
0337  * @set_point_min_uV:   Minimum allowed voltage
0338  * @set_point_max_uV:   Maximum allowed voltage.  This may be tweaked in order
0339  *          to pick which range should be used in the case of
0340  *          overlapping set points.
0341  * @n_voltages:     Number of preferred voltage set points present in this
0342  *          range
0343  * @range_sel:      Voltage range register value corresponding to this range
0344  *
0345  * The following relationships must be true for the values used in this struct:
0346  * (max_uV - min_uV) % step_uV == 0
0347  * (set_point_min_uV - min_uV) % step_uV == 0*
0348  * (set_point_max_uV - min_uV) % step_uV == 0*
0349  * n_voltages = (set_point_max_uV - set_point_min_uV) / step_uV + 1
0350  *
0351  * *Note, set_point_min_uV == set_point_max_uV == 0 is allowed in order to
0352  * specify that the voltage range has meaning, but is not preferred.
0353  */
0354 struct spmi_voltage_range {
0355     int                 min_uV;
0356     int                 max_uV;
0357     int                 step_uV;
0358     int                 set_point_min_uV;
0359     int                 set_point_max_uV;
0360     unsigned                n_voltages;
0361     u8                  range_sel;
0362 };
0363
0364 /*
0365  * The ranges specified in the spmi_voltage_set_points struct must be listed
0366  * so that range[i].set_point_max_uV < range[i+1].set_point_min_uV.
0367  */
0368 struct spmi_voltage_set_points {
0369     struct spmi_voltage_range       *range;
0370     int                 count;
0371     unsigned                n_voltages;
0372 };
0373
0374 struct spmi_regulator {
0375     struct regulator_desc           desc;
0376     struct device               *dev;
0377     struct delayed_work         ocp_work;
0378     struct regmap               *regmap;
0379     struct spmi_voltage_set_points      *set_points;
0380     enum spmi_regulator_logical_type    logical_type;
0381     int                 ocp_irq;
0382     int                 ocp_count;
0383     int                 ocp_max_retries;
0384     int                 ocp_retry_delay_ms;
0385     int                 hpm_min_load;
0386     int                 slew_rate;
0387     ktime_t                 vs_enable_time;
0388     u16                 base;
0389     struct list_head            node;
0390 };
0391
0392 struct spmi_regulator_mapping {
0393     enum spmi_regulator_type        type;
0394     enum spmi_regulator_subtype     subtype;
0395     enum spmi_regulator_logical_type    logical_type;
0396     u32                 revision_min;
0397     u32                 revision_max;
0398     const struct regulator_ops      *ops;
0399     struct spmi_voltage_set_points      *set_points;
0400     int                 hpm_min_load;
0401 };
0402
0403 struct spmi_regulator_data {
0404     const char          *name;
0405     u16             base;
0406     const char          *supply;
0407     const char          *ocp;
0408     u16             force_type;
0409 };
0410
0411 #define SPMI_VREG(_type, _subtype, _dig_major_min, _dig_major_max, \
0412               _logical_type, _ops_val, _set_points_val, _hpm_min_load) \
0413     { \
0414         .type       = SPMI_REGULATOR_TYPE_##_type, \
0415         .subtype    = SPMI_REGULATOR_SUBTYPE_##_subtype, \
0416         .revision_min   = _dig_major_min, \
0417         .revision_max   = _dig_major_max, \
0418         .logical_type   = SPMI_REGULATOR_LOGICAL_TYPE_##_logical_type, \
0419         .ops        = &spmi_##_ops_val##_ops, \
0420         .set_points = &_set_points_val##_set_points, \
0421         .hpm_min_load   = _hpm_min_load, \
0422     }
0423
0424 #define SPMI_VREG_VS(_subtype, _dig_major_min, _dig_major_max) \
0425     { \
0426         .type       = SPMI_REGULATOR_TYPE_VS, \
0427         .subtype    = SPMI_REGULATOR_SUBTYPE_##_subtype, \
0428         .revision_min   = _dig_major_min, \
0429         .revision_max   = _dig_major_max, \
0430         .logical_type   = SPMI_REGULATOR_LOGICAL_TYPE_VS, \
0431         .ops        = &spmi_vs_ops, \
0432     }
0433
0434 #define SPMI_VOLTAGE_RANGE(_range_sel, _min_uV, _set_point_min_uV, \
0435             _set_point_max_uV, _max_uV, _step_uV) \
0436     { \
0437         .min_uV         = _min_uV, \
0438         .max_uV         = _max_uV, \
0439         .set_point_min_uV   = _set_point_min_uV, \
0440         .set_point_max_uV   = _set_point_max_uV, \
0441         .step_uV        = _step_uV, \
0442         .range_sel      = _range_sel, \
0443     }
0444
0445 #define DEFINE_SPMI_SET_POINTS(name) \
0446 struct spmi_voltage_set_points name##_set_points = { \
0447     .range  = name##_ranges, \
0448     .count  = ARRAY_SIZE(name##_ranges), \
0449 }
0450
0451 /*
0452  * These tables contain the physically available PMIC regulator voltage setpoint
0453  * ranges.  Where two ranges overlap in hardware, one of the ranges is trimmed
0454  * to ensure that the setpoints available to software are monotonically
0455  * increasing and unique.  The set_voltage callback functions expect these
0456  * properties to hold.
0457  */
0458 static struct spmi_voltage_range pldo_ranges[] = {
0459     SPMI_VOLTAGE_RANGE(2,  750000,  750000, 1537500, 1537500, 12500),
0460     SPMI_VOLTAGE_RANGE(3, 1500000, 1550000, 3075000, 3075000, 25000),
0461     SPMI_VOLTAGE_RANGE(4, 1750000, 3100000, 4900000, 4900000, 50000),
0462 };
0463
0464 static struct spmi_voltage_range nldo1_ranges[] = {
0465     SPMI_VOLTAGE_RANGE(2,  750000,  750000, 1537500, 1537500, 12500),
0466 };
0467
0468 static struct spmi_voltage_range nldo2_ranges[] = {
0469     SPMI_VOLTAGE_RANGE(0,  375000,       0,       0, 1537500, 12500),
0470     SPMI_VOLTAGE_RANGE(1,  375000,  375000,  768750,  768750,  6250),
0471     SPMI_VOLTAGE_RANGE(2,  750000,  775000, 1537500, 1537500, 12500),
0472 };
0473
0474 static struct spmi_voltage_range nldo3_ranges[] = {
0475     SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1537500, 1537500, 12500),
0476     SPMI_VOLTAGE_RANGE(1,  375000,       0,       0, 1537500, 12500),
0477     SPMI_VOLTAGE_RANGE(2,  750000,       0,       0, 1537500, 12500),
0478 };
0479
0480 static struct spmi_voltage_range ln_ldo_ranges[] = {
0481     SPMI_VOLTAGE_RANGE(1,  690000,  690000, 1110000, 1110000, 60000),
0482     SPMI_VOLTAGE_RANGE(0, 1380000, 1380000, 2220000, 2220000, 120000),
0483 };
0484
0485 static struct spmi_voltage_range smps_ranges[] = {
0486     SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1562500, 1562500, 12500),
0487     SPMI_VOLTAGE_RANGE(1, 1550000, 1575000, 3125000, 3125000, 25000),
0488 };
0489
0490 static struct spmi_voltage_range ftsmps_ranges[] = {
0491     SPMI_VOLTAGE_RANGE(0,       0,  350000, 1275000, 1275000,  5000),
0492     SPMI_VOLTAGE_RANGE(1,       0, 1280000, 2040000, 2040000, 10000),
0493 };
0494
0495 static struct spmi_voltage_range ftsmps2p5_ranges[] = {
0496     SPMI_VOLTAGE_RANGE(0,   80000,  350000, 1355000, 1355000,  5000),
0497     SPMI_VOLTAGE_RANGE(1,  160000, 1360000, 2200000, 2200000, 10000),
0498 };
0499
0500 static struct spmi_voltage_range ftsmps426_ranges[] = {
0501     SPMI_VOLTAGE_RANGE(0,       0,  320000, 1352000, 1352000,  4000),
0502 };
0503
0504 static struct spmi_voltage_range boost_ranges[] = {
0505     SPMI_VOLTAGE_RANGE(0, 4000000, 4000000, 5550000, 5550000, 50000),
0506 };
0507
0508 static struct spmi_voltage_range boost_byp_ranges[] = {
0509     SPMI_VOLTAGE_RANGE(0, 2500000, 2500000, 5200000, 5650000, 50000),
0510 };
0511
0512 static struct spmi_voltage_range ult_lo_smps_ranges[] = {
0513     SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1562500, 1562500, 12500),
0514     SPMI_VOLTAGE_RANGE(1,  750000,       0,       0, 1525000, 25000),
0515 };
0516
0517 static struct spmi_voltage_range ult_ho_smps_ranges[] = {
0518     SPMI_VOLTAGE_RANGE(0, 1550000, 1550000, 2325000, 2325000, 25000),
0519 };
0520
0521 static struct spmi_voltage_range ult_nldo_ranges[] = {
0522     SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1537500, 1537500, 12500),
0523 };
0524
0525 static struct spmi_voltage_range ult_pldo_ranges[] = {
0526     SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500),
0527 };
0528
0529 static struct spmi_voltage_range pldo660_ranges[] = {
0530     SPMI_VOLTAGE_RANGE(0, 1504000, 1504000, 3544000, 3544000, 8000),
0531 };
0532
0533 static struct spmi_voltage_range nldo660_ranges[] = {
0534     SPMI_VOLTAGE_RANGE(0,  320000,  320000, 1304000, 1304000, 8000),
0535 };
0536
0537 static struct spmi_voltage_range ht_lvpldo_ranges[] = {
0538     SPMI_VOLTAGE_RANGE(0, 1504000, 1504000, 2000000, 2000000, 8000),
0539 };
0540
0541 static struct spmi_voltage_range ht_nldo_ranges[] = {
0542     SPMI_VOLTAGE_RANGE(0,  312000,  312000, 1304000, 1304000, 8000),
0543 };
0544
0545 static struct spmi_voltage_range hfs430_ranges[] = {
0546     SPMI_VOLTAGE_RANGE(0, 320000, 320000, 2040000, 2040000, 8000),
0547 };
0548
0549 static struct spmi_voltage_range ht_p150_ranges[] = {
0550     SPMI_VOLTAGE_RANGE(0, 1616000, 1616000, 3304000, 3304000, 8000),
0551 };
0552
0553 static struct spmi_voltage_range ht_p600_ranges[] = {
0554     SPMI_VOLTAGE_RANGE(0, 1704000, 1704000, 1896000, 1896000, 8000),
0555 };
0556
0557 static DEFINE_SPMI_SET_POINTS(pldo);
0558 static DEFINE_SPMI_SET_POINTS(nldo1);
0559 static DEFINE_SPMI_SET_POINTS(nldo2);
0560 static DEFINE_SPMI_SET_POINTS(nldo3);
0561 static DEFINE_SPMI_SET_POINTS(ln_ldo);
0562 static DEFINE_SPMI_SET_POINTS(smps);
0563 static DEFINE_SPMI_SET_POINTS(ftsmps);
0564 static DEFINE_SPMI_SET_POINTS(ftsmps2p5);
0565 static DEFINE_SPMI_SET_POINTS(ftsmps426);
0566 static DEFINE_SPMI_SET_POINTS(boost);
0567 static DEFINE_SPMI_SET_POINTS(boost_byp);
0568 static DEFINE_SPMI_SET_POINTS(ult_lo_smps);
0569 static DEFINE_SPMI_SET_POINTS(ult_ho_smps);
0570 static DEFINE_SPMI_SET_POINTS(ult_nldo);
0571 static DEFINE_SPMI_SET_POINTS(ult_pldo);
0572 static DEFINE_SPMI_SET_POINTS(pldo660);
0573 static DEFINE_SPMI_SET_POINTS(nldo660);
0574 static DEFINE_SPMI_SET_POINTS(ht_lvpldo);
0575 static DEFINE_SPMI_SET_POINTS(ht_nldo);
0576 static DEFINE_SPMI_SET_POINTS(hfs430);
0577 static DEFINE_SPMI_SET_POINTS(ht_p150);
0578 static DEFINE_SPMI_SET_POINTS(ht_p600);
0579
0580 static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf,
0581                  int len)
0582 {
0583     return regmap_bulk_read(vreg->regmap, vreg->base + addr, buf, len);
0584 }
0585
0586 static inline int spmi_vreg_write(struct spmi_regulator *vreg, u16 addr,
0587                 u8 *buf, int len)
0588 {
0589     return regmap_bulk_write(vreg->regmap, vreg->base + addr, buf, len);
0590 }
0591
0592 static int spmi_vreg_update_bits(struct spmi_regulator *vreg, u16 addr, u8 val,
0593         u8 mask)
0594 {
0595     return regmap_update_bits(vreg->regmap, vreg->base + addr, mask, val);
0596 }
0597
0598 static int spmi_regulator_vs_enable(struct regulator_dev *rdev)
0599 {
0600     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
0601
0602     if (vreg->ocp_irq) {
0603         vreg->ocp_count = 0;
0604         vreg->vs_enable_time = ktime_get();
0605     }
0606
0607     return regulator_enable_regmap(rdev);
0608 }
0609
0610 static int spmi_regulator_vs_ocp(struct regulator_dev *rdev, int lim_uA,
0611                  int severity, bool enable)
0612 {
0613     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
0614     u8 reg = SPMI_VS_OCP_OVERRIDE;
0615
0616     if (lim_uA || !enable || severity != REGULATOR_SEVERITY_PROT)
0617         return -EINVAL;
0618
0619     return spmi_vreg_write(vreg, SPMI_VS_REG_OCP, &reg, 1);
0620 }
0621
0622 static int spmi_regulator_select_voltage(struct spmi_regulator *vreg,
0623                      int min_uV, int max_uV)
0624 {
0625     const struct spmi_voltage_range *range;
0626     int uV = min_uV;
0627     int lim_min_uV, lim_max_uV, i, range_id, range_max_uV;
0628     int selector, voltage_sel;
0629
0630     /* Check if request voltage is outside of physically settable range. */
0631     lim_min_uV = vreg->set_points->range[0].set_point_min_uV;
0632     lim_max_uV =
0633       vreg->set_points->range[vreg->set_points->count - 1].set_point_max_uV;
0634
0635     if (uV < lim_min_uV && max_uV >= lim_min_uV)
0636         uV = lim_min_uV;
0637
0638     if (uV < lim_min_uV || uV > lim_max_uV) {
0639         dev_err(vreg->dev,
0640             "request v=[%d, %d] is outside possible v=[%d, %d]\n",
0641              min_uV, max_uV, lim_min_uV, lim_max_uV);
0642         return -EINVAL;
0643     }
0644
0645     /* Find the range which uV is inside of. */
0646     for (i = vreg->set_points->count - 1; i > 0; i--) {
0647         range_max_uV = vreg->set_points->range[i - 1].set_point_max_uV;
0648         if (uV > range_max_uV && range_max_uV > 0)
0649             break;
0650     }
0651
0652     range_id = i;
0653     range = &vreg->set_points->range[range_id];
0654
0655     /*
0656      * Force uV to be an allowed set point by applying a ceiling function to
0657      * the uV value.
0658      */
0659     voltage_sel = DIV_ROUND_UP(uV - range->min_uV, range->step_uV);
0660     uV = voltage_sel * range->step_uV + range->min_uV;
0661
0662     if (uV > max_uV) {
0663         dev_err(vreg->dev,
0664             "request v=[%d, %d] cannot be met by any set point; "
0665             "next set point: %d\n",
0666             min_uV, max_uV, uV);
0667         return -EINVAL;
0668     }
0669
0670     selector = 0;
0671     for (i = 0; i < range_id; i++)
0672         selector += vreg->set_points->range[i].n_voltages;
0673     selector += (uV - range->set_point_min_uV) / range->step_uV;
0674
0675     return selector;
0676 }
0677
0678 static int spmi_sw_selector_to_hw(struct spmi_regulator *vreg,
0679                   unsigned selector, u8 *range_sel,
0680                   u8 *voltage_sel)
0681 {
0682     const struct spmi_voltage_range *range, *end;
0683     unsigned offset;
0684
0685     range = vreg->set_points->range;
0686     end = range + vreg->set_points->count;
0687
0688     for (; range < end; range++) {
0689         if (selector < range->n_voltages) {
0690             /*
0691              * hardware selectors between set point min and real
0692              * min are invalid so we ignore them
0693              */
0694             offset = range->set_point_min_uV - range->min_uV;
0695             offset /= range->step_uV;
0696             *voltage_sel = selector + offset;
0697             *range_sel = range->range_sel;
0698             return 0;
0699         }
0700
0701         selector -= range->n_voltages;
0702     }
0703
0704     return -EINVAL;
0705 }
0706
0707 static int spmi_hw_selector_to_sw(struct spmi_regulator *vreg, u8 hw_sel,
0708                   const struct spmi_voltage_range *range)
0709 {
0710     unsigned sw_sel = 0;
0711     unsigned offset, max_hw_sel;
0712     const struct spmi_voltage_range *r = vreg->set_points->range;
0713     const struct spmi_voltage_range *end = r + vreg->set_points->count;
0714
0715     for (; r < end; r++) {
0716         if (r == range && range->n_voltages) {
0717             /*
0718              * hardware selectors between set point min and real
0719              * min and between set point max and real max are
0720              * invalid so we return an error if they're
0721              * programmed into the hardware
0722              */
0723             offset = range->set_point_min_uV - range->min_uV;
0724             offset /= range->step_uV;
0725             if (hw_sel < offset)
0726                 return -EINVAL;
0727
0728             max_hw_sel = range->set_point_max_uV - range->min_uV;
0729             max_hw_sel /= range->step_uV;
0730             if (hw_sel > max_hw_sel)
0731                 return -EINVAL;
0732
0733             return sw_sel + hw_sel - offset;
0734         }
0735         sw_sel += r->n_voltages;
0736     }
0737
0738     return -EINVAL;
0739 }
0740
0741 static const struct spmi_voltage_range *
0742 spmi_regulator_find_range(struct spmi_regulator *vreg)
0743 {
0744     u8 range_sel;
0745     const struct spmi_voltage_range *range, *end;
0746
0747     range = vreg->set_points->range;
0748     end = range + vreg->set_points->count;
0749
0750     spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, &range_sel, 1);
0751
0752     for (; range < end; range++)
0753         if (range->range_sel == range_sel)
0754             return range;
0755
0756     return NULL;
0757 }
0758
0759 static int spmi_regulator_select_voltage_same_range(struct spmi_regulator *vreg,
0760         int min_uV, int max_uV)
0761 {
0762     const struct spmi_voltage_range *range;
0763     int uV = min_uV;
0764     int i, selector;
0765
0766     range = spmi_regulator_find_range(vreg);
0767     if (!range)
0768         goto different_range;
0769
0770     if (uV < range->min_uV && max_uV >= range->min_uV)
0771         uV = range->min_uV;
0772
0773     if (uV < range->min_uV || uV > range->max_uV) {
0774         /* Current range doesn't support the requested voltage. */
0775         goto different_range;
0776     }
0777
0778     /*
0779      * Force uV to be an allowed set point by applying a ceiling function to
0780      * the uV value.
0781      */
0782     uV = DIV_ROUND_UP(uV - range->min_uV, range->step_uV);
0783     uV = uV * range->step_uV + range->min_uV;
0784
0785     if (uV > max_uV) {
0786         /*
0787          * No set point in the current voltage range is within the
0788          * requested min_uV to max_uV range.
0789          */
0790         goto different_range;
0791     }
0792
0793     selector = 0;
0794     for (i = 0; i < vreg->set_points->count; i++) {
0795         if (uV >= vreg->set_points->range[i].set_point_min_uV
0796             && uV <= vreg->set_points->range[i].set_point_max_uV) {
0797             selector +=
0798                 (uV - vreg->set_points->range[i].set_point_min_uV)
0799                 / vreg->set_points->range[i].step_uV;
0800             break;
0801         }
0802
0803         selector += vreg->set_points->range[i].n_voltages;
0804     }
0805
0806     if (selector >= vreg->set_points->n_voltages)
0807         goto different_range;
0808
0809     return selector;
0810
0811 different_range:
0812     return spmi_regulator_select_voltage(vreg, min_uV, max_uV);
0813 }
0814
0815 static int spmi_regulator_common_map_voltage(struct regulator_dev *rdev,
0816                          int min_uV, int max_uV)
0817 {
0818     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
0819
0820     /*
0821      * Favor staying in the current voltage range if possible.  This avoids
0822      * voltage spikes that occur when changing the voltage range.
0823      */
0824     return spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV);
0825 }
0826
0827 static int
0828 spmi_regulator_common_set_voltage(struct regulator_dev *rdev, unsigned selector)
0829 {
0830     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
0831     int ret;
0832     u8 buf[2];
0833     u8 range_sel, voltage_sel;
0834
0835     ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel);
0836     if (ret)
0837         return ret;
0838
0839     buf[0] = range_sel;
0840     buf[1] = voltage_sel;
0841     return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, buf, 2);
0842 }
0843
0844 static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev,
0845                           unsigned selector);
0846
0847 static int spmi_regulator_ftsmps426_set_voltage(struct regulator_dev *rdev,
0848                           unsigned selector)
0849 {
0850     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
0851     u8 buf[2];
0852     int mV;
0853
0854     mV = spmi_regulator_common_list_voltage(rdev, selector) / 1000;
0855
0856     buf[0] = mV & 0xff;
0857     buf[1] = mV >> 8;
0858     return spmi_vreg_write(vreg, SPMI_FTSMPS426_REG_VOLTAGE_LSB, buf, 2);
0859 }
0860
0861 static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
0862         unsigned int old_selector, unsigned int new_selector)
0863 {
0864     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
0865     int diff_uV;
0866
0867     diff_uV = abs(spmi_regulator_common_list_voltage(rdev, new_selector) -
0868               spmi_regulator_common_list_voltage(rdev, old_selector));
0869
0870     return DIV_ROUND_UP(diff_uV, vreg->slew_rate);
0871 }
0872
0873 static int spmi_regulator_common_get_voltage(struct regulator_dev *rdev)
0874 {
0875     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
0876     const struct spmi_voltage_range *range;
0877     u8 voltage_sel;
0878
0879     spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1);
0880
0881     range = spmi_regulator_find_range(vreg);
0882     if (!range)
0883         return -EINVAL;
0884
0885     return spmi_hw_selector_to_sw(vreg, voltage_sel, range);
0886 }
0887
0888 static int spmi_regulator_ftsmps426_get_voltage(struct regulator_dev *rdev)
0889 {
0890     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
0891     const struct spmi_voltage_range *range;
0892     u8 buf[2];
0893     int uV;
0894
0895     spmi_vreg_read(vreg, SPMI_FTSMPS426_REG_VOLTAGE_LSB, buf, 2);
0896
0897     uV = (((unsigned int)buf[1] << 8) | (unsigned int)buf[0]) * 1000;
0898     range = vreg->set_points->range;
0899
0900     return (uV - range->set_point_min_uV) / range->step_uV;
0901 }
0902
0903 static int spmi_regulator_single_map_voltage(struct regulator_dev *rdev,
0904         int min_uV, int max_uV)
0905 {
0906     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
0907
0908     return spmi_regulator_select_voltage(vreg, min_uV, max_uV);
0909 }
0910
0911 static int spmi_regulator_single_range_set_voltage(struct regulator_dev *rdev,
0912                            unsigned selector)
0913 {
0914     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
0915     u8 sel = selector;
0916
0917     /*
0918      * Certain types of regulators do not have a range select register so
0919      * only voltage set register needs to be written.
0920      */
0921     return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &sel, 1);
0922 }
0923
0924 static int spmi_regulator_single_range_get_voltage(struct regulator_dev *rdev)
0925 {
0926     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
0927     u8 selector;
0928     int ret;
0929
0930     ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &selector, 1);
0931     if (ret)
0932         return ret;
0933
0934     return selector;
0935 }
0936
0937 static int spmi_regulator_ult_lo_smps_set_voltage(struct regulator_dev *rdev,
0938                           unsigned selector)
0939 {
0940     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
0941     int ret;
0942     u8 range_sel, voltage_sel;
0943
0944     ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel);
0945     if (ret)
0946         return ret;
0947
0948     /*
0949      * Calculate VSET based on range
0950      * In case of range 0: voltage_sel is a 7 bit value, can be written
0951      *          witout any modification.
0952      * In case of range 1: voltage_sel is a 5 bit value, bits[7-5] set to
0953      *          [011].
0954      */
0955     if (range_sel == 1)
0956         voltage_sel |= ULT_SMPS_RANGE_SPLIT;
0957
0958     return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_VOLTAGE_SET,
0959                      voltage_sel, 0xff);
0960 }
0961
0962 static int spmi_regulator_ult_lo_smps_get_voltage(struct regulator_dev *rdev)
0963 {
0964     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
0965     const struct spmi_voltage_range *range;
0966     u8 voltage_sel;
0967
0968     spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1);
0969
0970     range = spmi_regulator_find_range(vreg);
0971     if (!range)
0972         return -EINVAL;
0973
0974     if (range->range_sel == 1)
0975         voltage_sel &= ~ULT_SMPS_RANGE_SPLIT;
0976
0977     return spmi_hw_selector_to_sw(vreg, voltage_sel, range);
0978 }
0979
0980 static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev,
0981             unsigned selector)
0982 {
0983     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
0984     int uV = 0;
0985     int i;
0986
0987     if (selector >= vreg->set_points->n_voltages)
0988         return 0;
0989
0990     for (i = 0; i < vreg->set_points->count; i++) {
0991         if (selector < vreg->set_points->range[i].n_voltages) {
0992             uV = selector * vreg->set_points->range[i].step_uV
0993                 + vreg->set_points->range[i].set_point_min_uV;
0994             break;
0995         }
0996
0997         selector -= vreg->set_points->range[i].n_voltages;
0998     }
0999
1000     return uV;
1001 }
1002
1003 static int
1004 spmi_regulator_common_set_bypass(struct regulator_dev *rdev, bool enable)
1005 {
1006     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
1007     u8 mask = SPMI_COMMON_MODE_BYPASS_MASK;
1008     u8 val = 0;
1009
1010     if (enable)
1011         val = mask;
1012
1013     return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
1014 }
1015
1016 static int
1017 spmi_regulator_common_get_bypass(struct regulator_dev *rdev, bool *enable)
1018 {
1019     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
1020     u8 val;
1021     int ret;
1022
1023     ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &val, 1);
1024     *enable = val & SPMI_COMMON_MODE_BYPASS_MASK;
1025
1026     return ret;
1027 }
1028
1029 static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev)
1030 {
1031     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
1032     u8 reg;
1033
1034     spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &reg, 1);
1035
1036     reg &= SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK;
1037
1038     switch (reg) {
1039     case SPMI_COMMON_MODE_HPM_MASK:
1040         return REGULATOR_MODE_NORMAL;
1041     case SPMI_COMMON_MODE_AUTO_MASK:
1042         return REGULATOR_MODE_FAST;
1043     default:
1044         return REGULATOR_MODE_IDLE;
1045     }
1046 }
1047
1048 static unsigned int spmi_regulator_ftsmps426_get_mode(struct regulator_dev *rdev)
1049 {
1050     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
1051     u8 reg;
1052
1053     spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &reg, 1);
1054
1055     switch (reg) {
1056     case SPMI_FTSMPS426_MODE_HPM_MASK:
1057         return REGULATOR_MODE_NORMAL;
1058     case SPMI_FTSMPS426_MODE_AUTO_MASK:
1059         return REGULATOR_MODE_FAST;
1060     default:
1061         return REGULATOR_MODE_IDLE;
1062     }
1063 }
1064
1065 static int
1066 spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode)
1067 {
1068     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
1069     u8 mask = SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK;
1070     u8 val;
1071
1072     switch (mode) {
1073     case REGULATOR_MODE_NORMAL:
1074         val = SPMI_COMMON_MODE_HPM_MASK;
1075         break;
1076     case REGULATOR_MODE_FAST:
1077         val = SPMI_COMMON_MODE_AUTO_MASK;
1078         break;
1079     default:
1080         val = 0;
1081         break;
1082     }
1083
1084     return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
1085 }
1086
1087 static int
1088 spmi_regulator_ftsmps426_set_mode(struct regulator_dev *rdev, unsigned int mode)
1089 {
1090     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
1091     u8 mask = SPMI_FTSMPS426_MODE_MASK;
1092     u8 val;
1093
1094     switch (mode) {
1095     case REGULATOR_MODE_NORMAL:
1096         val = SPMI_FTSMPS426_MODE_HPM_MASK;
1097         break;
1098     case REGULATOR_MODE_FAST:
1099         val = SPMI_FTSMPS426_MODE_AUTO_MASK;
1100         break;
1101     case REGULATOR_MODE_IDLE:
1102         val = SPMI_FTSMPS426_MODE_LPM_MASK;
1103         break;
1104     default:
1105         return -EINVAL;
1106     }
1107
1108     return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
1109 }
1110
1111 static int
1112 spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA)
1113 {
1114     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
1115     unsigned int mode;
1116
1117     if (load_uA >= vreg->hpm_min_load)
1118         mode = REGULATOR_MODE_NORMAL;
1119     else
1120         mode = REGULATOR_MODE_IDLE;
1121
1122     return spmi_regulator_common_set_mode(rdev, mode);
1123 }
1124
1125 static int spmi_regulator_common_set_pull_down(struct regulator_dev *rdev)
1126 {
1127     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
1128     unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK;
1129
1130     return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_PULL_DOWN,
1131                      mask, mask);
1132 }
1133
1134 static int spmi_regulator_common_set_soft_start(struct regulator_dev *rdev)
1135 {
1136     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
1137     unsigned int mask = SPMI_LDO_SOFT_START_ENABLE_MASK;
1138
1139     return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_SOFT_START,
1140                      mask, mask);
1141 }
1142
1143 static int spmi_regulator_set_ilim(struct regulator_dev *rdev, int ilim_uA)
1144 {
1145     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
1146     enum spmi_regulator_logical_type type = vreg->logical_type;
1147     unsigned int current_reg;
1148     u8 reg;
1149     u8 mask = SPMI_BOOST_CURRENT_LIMIT_MASK |
1150           SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK;
1151     int max = (SPMI_BOOST_CURRENT_LIMIT_MASK + 1) * 500;
1152
1153     if (type == SPMI_REGULATOR_LOGICAL_TYPE_BOOST)
1154         current_reg = SPMI_BOOST_REG_CURRENT_LIMIT;
1155     else
1156         current_reg = SPMI_BOOST_BYP_REG_CURRENT_LIMIT;
1157
1158     if (ilim_uA > max || ilim_uA <= 0)
1159         return -EINVAL;
1160
1161     reg = (ilim_uA - 1) / 500;
1162     reg |= SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK;
1163
1164     return spmi_vreg_update_bits(vreg, current_reg, reg, mask);
1165 }
1166
1167 static int spmi_regulator_vs_clear_ocp(struct spmi_regulator *vreg)
1168 {
1169     int ret;
1170
1171     ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
1172         SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK);
1173
1174     vreg->vs_enable_time = ktime_get();
1175
1176     ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
1177         SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK);
1178
1179     return ret;
1180 }
1181
1182 static void spmi_regulator_vs_ocp_work(struct work_struct *work)
1183 {
1184     struct delayed_work *dwork = to_delayed_work(work);
1185     struct spmi_regulator *vreg
1186         = container_of(dwork, struct spmi_regulator, ocp_work);
1187
1188     spmi_regulator_vs_clear_ocp(vreg);
1189 }
1190
1191 static irqreturn_t spmi_regulator_vs_ocp_isr(int irq, void *data)
1192 {
1193     struct spmi_regulator *vreg = data;
1194     ktime_t ocp_irq_time;
1195     s64 ocp_trigger_delay_us;
1196
1197     ocp_irq_time = ktime_get();
1198     ocp_trigger_delay_us = ktime_us_delta(ocp_irq_time,
1199                         vreg->vs_enable_time);
1200
1201     /*
1202      * Reset the OCP count if there is a large delay between switch enable
1203      * and when OCP triggers.  This is indicative of a hotplug event as
1204      * opposed to a fault.
1205      */
1206     if (ocp_trigger_delay_us > SPMI_VS_OCP_FAULT_DELAY_US)
1207         vreg->ocp_count = 0;
1208
1209     /* Wait for switch output to settle back to 0 V after OCP triggered. */
1210     udelay(SPMI_VS_OCP_FALL_DELAY_US);
1211
1212     vreg->ocp_count++;
1213
1214     if (vreg->ocp_count == 1) {
1215         /* Immediately clear the over current condition. */
1216         spmi_regulator_vs_clear_ocp(vreg);
1217     } else if (vreg->ocp_count <= vreg->ocp_max_retries) {
1218         /* Schedule the over current clear task to run later. */
1219         schedule_delayed_work(&vreg->ocp_work,
1220             msecs_to_jiffies(vreg->ocp_retry_delay_ms) + 1);
1221     } else {
1222         dev_err(vreg->dev,
1223             "OCP triggered %d times; no further retries\n",
1224             vreg->ocp_count);
1225     }
1226
1227     return IRQ_HANDLED;
1228 }
1229
1230 #define SAW3_VCTL_DATA_MASK 0xFF
1231 #define SAW3_VCTL_CLEAR_MASK    0x700FF
1232 #define SAW3_AVS_CTL_EN_MASK    0x1
1233 #define SAW3_AVS_CTL_TGGL_MASK  0x8000000
1234 #define SAW3_AVS_CTL_CLEAR_MASK 0x7efc00
1235
1236 static struct regmap *saw_regmap;
1237
1238 static void spmi_saw_set_vdd(void *data)
1239 {
1240     u32 vctl, data3, avs_ctl, pmic_sts;
1241     bool avs_enabled = false;
1242     unsigned long timeout;
1243     u8 voltage_sel = *(u8 *)data;
1244
1245     regmap_read(saw_regmap, SAW3_AVS_CTL, &avs_ctl);
1246     regmap_read(saw_regmap, SAW3_VCTL, &vctl);
1247     regmap_read(saw_regmap, SAW3_SPM_PMIC_DATA_3, &data3);
1248
1249     /* select the band */
1250     vctl &= ~SAW3_VCTL_CLEAR_MASK;
1251     vctl |= (u32)voltage_sel;
1252
1253     data3 &= ~SAW3_VCTL_CLEAR_MASK;
1254     data3 |= (u32)voltage_sel;
1255
1256     /* If AVS is enabled, switch it off during the voltage change */
1257     avs_enabled = SAW3_AVS_CTL_EN_MASK & avs_ctl;
1258     if (avs_enabled) {
1259         avs_ctl &= ~SAW3_AVS_CTL_TGGL_MASK;
1260         regmap_write(saw_regmap, SAW3_AVS_CTL, avs_ctl);
1261     }
1262
1263     regmap_write(saw_regmap, SAW3_RST, 1);
1264     regmap_write(saw_regmap, SAW3_VCTL, vctl);
1265     regmap_write(saw_regmap, SAW3_SPM_PMIC_DATA_3, data3);
1266
1267     timeout = jiffies + usecs_to_jiffies(100);
1268     do {
1269         regmap_read(saw_regmap, SAW3_PMIC_STS, &pmic_sts);
1270         pmic_sts &= SAW3_VCTL_DATA_MASK;
1271         if (pmic_sts == (u32)voltage_sel)
1272             break;
1273
1274         cpu_relax();
1275
1276     } while (time_before(jiffies, timeout));
1277
1278     /* After successful voltage change, switch the AVS back on */
1279     if (avs_enabled) {
1280         pmic_sts &= 0x3f;
1281         avs_ctl &= ~SAW3_AVS_CTL_CLEAR_MASK;
1282         avs_ctl |= ((pmic_sts - 4) << 10);
1283         avs_ctl |= (pmic_sts << 17);
1284         avs_ctl |= SAW3_AVS_CTL_TGGL_MASK;
1285         regmap_write(saw_regmap, SAW3_AVS_CTL, avs_ctl);
1286     }
1287 }
1288
1289 static int
1290 spmi_regulator_saw_set_voltage(struct regulator_dev *rdev, unsigned selector)
1291 {
1292     struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
1293     int ret;
1294     u8 range_sel, voltage_sel;
1295
1296     ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel);
1297     if (ret)
1298         return ret;
1299
1300     if (0 != range_sel) {
1301         dev_dbg(&rdev->dev, "range_sel = %02X voltage_sel = %02X", \
1302             range_sel, voltage_sel);
1303         return -EINVAL;
1304     }
1305
1306     /* Always do the SAW register writes on the first CPU */
1307     return smp_call_function_single(0, spmi_saw_set_vdd, \
1308                     &voltage_sel, true);
1309 }
1310
1311 static struct regulator_ops spmi_saw_ops = {};
1312
1313 static const struct regulator_ops spmi_smps_ops = {
1314     .enable         = regulator_enable_regmap,
1315     .disable        = regulator_disable_regmap,
1316     .is_enabled     = regulator_is_enabled_regmap,
1317     .set_voltage_sel    = spmi_regulator_common_set_voltage,
1318     .set_voltage_time_sel   = spmi_regulator_set_voltage_time_sel,
1319     .get_voltage_sel    = spmi_regulator_common_get_voltage,
1320     .map_voltage        = spmi_regulator_common_map_voltage,
1321     .list_voltage       = spmi_regulator_common_list_voltage,
1322     .set_mode       = spmi_regulator_common_set_mode,
1323     .get_mode       = spmi_regulator_common_get_mode,
1324     .set_load       = spmi_regulator_common_set_load,
1325     .set_pull_down      = spmi_regulator_common_set_pull_down,
1326 };
1327
1328 static const struct regulator_ops spmi_ldo_ops = {
1329     .enable         = regulator_enable_regmap,
1330     .disable        = regulator_disable_regmap,
1331     .is_enabled     = regulator_is_enabled_regmap,
1332     .set_voltage_sel    = spmi_regulator_common_set_voltage,
1333     .get_voltage_sel    = spmi_regulator_common_get_voltage,
1334     .map_voltage        = spmi_regulator_common_map_voltage,
1335     .list_voltage       = spmi_regulator_common_list_voltage,
1336     .set_mode       = spmi_regulator_common_set_mode,
1337     .get_mode       = spmi_regulator_common_get_mode,
1338     .set_load       = spmi_regulator_common_set_load,
1339     .set_bypass     = spmi_regulator_common_set_bypass,
1340     .get_bypass     = spmi_regulator_common_get_bypass,
1341     .set_pull_down      = spmi_regulator_common_set_pull_down,
1342     .set_soft_start     = spmi_regulator_common_set_soft_start,
1343 };
1344
1345 static const struct regulator_ops spmi_ln_ldo_ops = {
1346     .enable         = regulator_enable_regmap,
1347     .disable        = regulator_disable_regmap,
1348     .is_enabled     = regulator_is_enabled_regmap,
1349     .set_voltage_sel    = spmi_regulator_common_set_voltage,
1350     .get_voltage_sel    = spmi_regulator_common_get_voltage,
1351     .map_voltage        = spmi_regulator_common_map_voltage,
1352     .list_voltage       = spmi_regulator_common_list_voltage,
1353     .set_bypass     = spmi_regulator_common_set_bypass,
1354     .get_bypass     = spmi_regulator_common_get_bypass,
1355 };
1356
1357 static const struct regulator_ops spmi_vs_ops = {
1358     .enable         = spmi_regulator_vs_enable,
1359     .disable        = regulator_disable_regmap,
1360     .is_enabled     = regulator_is_enabled_regmap,
1361     .set_pull_down      = spmi_regulator_common_set_pull_down,
1362     .set_soft_start     = spmi_regulator_common_set_soft_start,
1363     .set_over_current_protection = spmi_regulator_vs_ocp,
1364     .set_mode       = spmi_regulator_common_set_mode,
1365     .get_mode       = spmi_regulator_common_get_mode,
1366 };
1367
1368 static const struct regulator_ops spmi_boost_ops = {
1369     .enable         = regulator_enable_regmap,
1370     .disable        = regulator_disable_regmap,
1371     .is_enabled     = regulator_is_enabled_regmap,
1372     .set_voltage_sel    = spmi_regulator_single_range_set_voltage,
1373     .get_voltage_sel    = spmi_regulator_single_range_get_voltage,
1374     .map_voltage        = spmi_regulator_single_map_voltage,
1375     .list_voltage       = spmi_regulator_common_list_voltage,
1376     .set_input_current_limit = spmi_regulator_set_ilim,
1377 };
1378
1379 static const struct regulator_ops spmi_ftsmps_ops = {
1380     .enable         = regulator_enable_regmap,
1381     .disable        = regulator_disable_regmap,
1382     .is_enabled     = regulator_is_enabled_regmap,
1383     .set_voltage_sel    = spmi_regulator_common_set_voltage,
1384     .set_voltage_time_sel   = spmi_regulator_set_voltage_time_sel,
1385     .get_voltage_sel    = spmi_regulator_common_get_voltage,
1386     .map_voltage        = spmi_regulator_common_map_voltage,
1387     .list_voltage       = spmi_regulator_common_list_voltage,
1388     .set_mode       = spmi_regulator_common_set_mode,
1389     .get_mode       = spmi_regulator_common_get_mode,
1390     .set_load       = spmi_regulator_common_set_load,
1391     .set_pull_down      = spmi_regulator_common_set_pull_down,
1392 };
1393
1394 static const struct regulator_ops spmi_ult_lo_smps_ops = {
1395     .enable         = regulator_enable_regmap,
1396     .disable        = regulator_disable_regmap,
1397     .is_enabled     = regulator_is_enabled_regmap,
1398     .set_voltage_sel    = spmi_regulator_ult_lo_smps_set_voltage,
1399     .set_voltage_time_sel   = spmi_regulator_set_voltage_time_sel,
1400     .get_voltage_sel    = spmi_regulator_ult_lo_smps_get_voltage,
1401     .list_voltage       = spmi_regulator_common_list_voltage,
1402     .set_mode       = spmi_regulator_common_set_mode,
1403     .get_mode       = spmi_regulator_common_get_mode,
1404     .set_load       = spmi_regulator_common_set_load,
1405     .set_pull_down      = spmi_regulator_common_set_pull_down,
1406 };
1407
1408 static const struct regulator_ops spmi_ult_ho_smps_ops = {
1409     .enable         = regulator_enable_regmap,
1410     .disable        = regulator_disable_regmap,
1411     .is_enabled     = regulator_is_enabled_regmap,
1412     .set_voltage_sel    = spmi_regulator_single_range_set_voltage,
1413     .set_voltage_time_sel   = spmi_regulator_set_voltage_time_sel,
1414     .get_voltage_sel    = spmi_regulator_single_range_get_voltage,
1415     .map_voltage        = spmi_regulator_single_map_voltage,
1416     .list_voltage       = spmi_regulator_common_list_voltage,
1417     .set_mode       = spmi_regulator_common_set_mode,
1418     .get_mode       = spmi_regulator_common_get_mode,
1419     .set_load       = spmi_regulator_common_set_load,
1420     .set_pull_down      = spmi_regulator_common_set_pull_down,
1421 };
1422
1423 static const struct regulator_ops spmi_ult_ldo_ops = {
1424     .enable         = regulator_enable_regmap,
1425     .disable        = regulator_disable_regmap,
1426     .is_enabled     = regulator_is_enabled_regmap,
1427     .set_voltage_sel    = spmi_regulator_single_range_set_voltage,
1428     .get_voltage_sel    = spmi_regulator_single_range_get_voltage,
1429     .map_voltage        = spmi_regulator_single_map_voltage,
1430     .list_voltage       = spmi_regulator_common_list_voltage,
1431     .set_mode       = spmi_regulator_common_set_mode,
1432     .get_mode       = spmi_regulator_common_get_mode,
1433     .set_load       = spmi_regulator_common_set_load,
1434     .set_bypass     = spmi_regulator_common_set_bypass,
1435     .get_bypass     = spmi_regulator_common_get_bypass,
1436     .set_pull_down      = spmi_regulator_common_set_pull_down,
1437     .set_soft_start     = spmi_regulator_common_set_soft_start,
1438 };
1439
1440 static const struct regulator_ops spmi_ftsmps426_ops = {
1441     .enable         = regulator_enable_regmap,
1442     .disable        = regulator_disable_regmap,
1443     .is_enabled     = regulator_is_enabled_regmap,
1444     .set_voltage_sel    = spmi_regulator_ftsmps426_set_voltage,
1445     .set_voltage_time_sel   = spmi_regulator_set_voltage_time_sel,
1446     .get_voltage_sel    = spmi_regulator_ftsmps426_get_voltage,
1447     .map_voltage        = spmi_regulator_single_map_voltage,
1448     .list_voltage       = spmi_regulator_common_list_voltage,
1449     .set_mode       = spmi_regulator_ftsmps426_set_mode,
1450     .get_mode       = spmi_regulator_ftsmps426_get_mode,
1451     .set_load       = spmi_regulator_common_set_load,
1452     .set_pull_down      = spmi_regulator_common_set_pull_down,
1453 };
1454
1455 static const struct regulator_ops spmi_hfs430_ops = {
1456     .enable         = regulator_enable_regmap,
1457     .disable        = regulator_disable_regmap,
1458     .is_enabled     = regulator_is_enabled_regmap,
1459     .set_voltage_sel    = spmi_regulator_ftsmps426_set_voltage,
1460     .set_voltage_time_sel   = spmi_regulator_set_voltage_time_sel,
1461     .get_voltage_sel    = spmi_regulator_ftsmps426_get_voltage,
1462     .map_voltage        = spmi_regulator_single_map_voltage,
1463     .list_voltage       = spmi_regulator_common_list_voltage,
1464     .set_mode       = spmi_regulator_ftsmps426_set_mode,
1465     .get_mode       = spmi_regulator_ftsmps426_get_mode,
1466 };
1467
1468 /* Maximum possible digital major revision value */
1469 #define INF 0xFF
1470
1471 static const struct spmi_regulator_mapping supported_regulators[] = {
1472     /*           type subtype dig_min dig_max ltype ops setpoints hpm_min */
1473     SPMI_VREG(LDO,   HT_P600,  0, INF, HFS430, hfs430, ht_p600, 10000),
1474     SPMI_VREG(LDO,   HT_P150,  0, INF, HFS430, hfs430, ht_p150, 10000),
1475     SPMI_VREG(BUCK,  GP_CTL,   0, INF, SMPS,   smps,   smps,   100000),
1476     SPMI_VREG(BUCK,  HFS430,   0, INF, HFS430, hfs430, hfs430,  10000),
1477     SPMI_VREG(LDO,   N300,     0, INF, LDO,    ldo,    nldo1,   10000),
1478     SPMI_VREG(LDO,   N600,     0,   0, LDO,    ldo,    nldo2,   10000),
1479     SPMI_VREG(LDO,   N1200,    0,   0, LDO,    ldo,    nldo2,   10000),
1480     SPMI_VREG(LDO,   N600,     1, INF, LDO,    ldo,    nldo3,   10000),
1481     SPMI_VREG(LDO,   N1200,    1, INF, LDO,    ldo,    nldo3,   10000),
1482     SPMI_VREG(LDO,   N600_ST,  0,   0, LDO,    ldo,    nldo2,   10000),
1483     SPMI_VREG(LDO,   N1200_ST, 0,   0, LDO,    ldo,    nldo2,   10000),
1484     SPMI_VREG(LDO,   N600_ST,  1, INF, LDO,    ldo,    nldo3,   10000),
1485     SPMI_VREG(LDO,   N1200_ST, 1, INF, LDO,    ldo,    nldo3,   10000),
1486     SPMI_VREG(LDO,   P50,      0, INF, LDO,    ldo,    pldo,     5000),
1487     SPMI_VREG(LDO,   P150,     0, INF, LDO,    ldo,    pldo,    10000),
1488     SPMI_VREG(LDO,   P300,     0, INF, LDO,    ldo,    pldo,    10000),
1489     SPMI_VREG(LDO,   P600,     0, INF, LDO,    ldo,    pldo,    10000),
1490     SPMI_VREG(LDO,   P1200,    0, INF, LDO,    ldo,    pldo,    10000),
1491     SPMI_VREG(LDO,   LN,       0, INF, LN_LDO, ln_ldo, ln_ldo,      0),
1492     SPMI_VREG(LDO,   LV_P50,   0, INF, LDO,    ldo,    pldo,     5000),
1493     SPMI_VREG(LDO,   LV_P150,  0, INF, LDO,    ldo,    pldo,    10000),
1494     SPMI_VREG(LDO,   LV_P300,  0, INF, LDO,    ldo,    pldo,    10000),
1495     SPMI_VREG(LDO,   LV_P600,  0, INF, LDO,    ldo,    pldo,    10000),
1496     SPMI_VREG(LDO,   LV_P1200, 0, INF, LDO,    ldo,    pldo,    10000),
1497     SPMI_VREG(LDO, HT_N300_ST,   0, INF, FTSMPS426, ftsmps426,
1498                             ht_nldo,   30000),
1499     SPMI_VREG(LDO, HT_N600_ST,   0, INF, FTSMPS426, ftsmps426,
1500                             ht_nldo,   30000),
1501     SPMI_VREG(LDO, HT_N1200_ST,  0, INF, FTSMPS426, ftsmps426,
1502                             ht_nldo,   30000),
1503     SPMI_VREG(LDO, HT_LVP150,    0, INF, FTSMPS426, ftsmps426,
1504                             ht_lvpldo, 10000),
1505     SPMI_VREG(LDO, HT_LVP300,    0, INF, FTSMPS426, ftsmps426,
1506                             ht_lvpldo, 10000),
1507     SPMI_VREG(LDO, L660_N300_ST, 0, INF, FTSMPS426, ftsmps426,
1508                             nldo660,   10000),
1509     SPMI_VREG(LDO, L660_N600_ST, 0, INF, FTSMPS426, ftsmps426,
1510                             nldo660,   10000),
1511     SPMI_VREG(LDO, L660_P50,     0, INF, FTSMPS426, ftsmps426,
1512                             pldo660,   10000),
1513     SPMI_VREG(LDO, L660_P150,    0, INF, FTSMPS426, ftsmps426,
1514                             pldo660,   10000),
1515     SPMI_VREG(LDO, L660_P600,    0, INF, FTSMPS426, ftsmps426,
1516                             pldo660,   10000),
1517     SPMI_VREG(LDO, L660_LVP150,  0, INF, FTSMPS426, ftsmps426,
1518                             ht_lvpldo, 10000),
1519     SPMI_VREG(LDO, L660_LVP600,  0, INF, FTSMPS426, ftsmps426,
1520                             ht_lvpldo, 10000),
1521     SPMI_VREG_VS(LV100,        0, INF),
1522     SPMI_VREG_VS(LV300,        0, INF),
1523     SPMI_VREG_VS(MV300,        0, INF),
1524     SPMI_VREG_VS(MV500,        0, INF),
1525     SPMI_VREG_VS(HDMI,         0, INF),
1526     SPMI_VREG_VS(OTG,          0, INF),
1527     SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST,  boost,  boost,       0),
1528     SPMI_VREG(FTS,   FTS_CTL,  0, INF, FTSMPS, ftsmps, ftsmps, 100000),
1529     SPMI_VREG(FTS, FTS2p5_CTL, 0, INF, FTSMPS, ftsmps, ftsmps2p5, 100000),
1530     SPMI_VREG(FTS, FTS426_CTL, 0, INF, FTSMPS426, ftsmps426, ftsmps426, 100000),
1531     SPMI_VREG(BOOST_BYP, BB_2A, 0, INF, BOOST_BYP, boost, boost_byp, 0),
1532     SPMI_VREG(ULT_BUCK, ULT_HF_CTL1, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1533                         ult_lo_smps,   100000),
1534     SPMI_VREG(ULT_BUCK, ULT_HF_CTL2, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1535                         ult_lo_smps,   100000),
1536     SPMI_VREG(ULT_BUCK, ULT_HF_CTL3, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1537                         ult_lo_smps,   100000),
1538     SPMI_VREG(ULT_BUCK, ULT_HF_CTL4, 0, INF, ULT_HO_SMPS, ult_ho_smps,
1539                         ult_ho_smps,   100000),
1540     SPMI_VREG(ULT_LDO, N300_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1541     SPMI_VREG(ULT_LDO, N600_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1542     SPMI_VREG(ULT_LDO, N900_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1543     SPMI_VREG(ULT_LDO, N1200_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1544     SPMI_VREG(ULT_LDO, LV_P50,   0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1545     SPMI_VREG(ULT_LDO, LV_P150,  0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1546     SPMI_VREG(ULT_LDO, LV_P300,  0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1547     SPMI_VREG(ULT_LDO, LV_P450,  0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1548     SPMI_VREG(ULT_LDO, P600,     0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1549     SPMI_VREG(ULT_LDO, P300,     0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1550     SPMI_VREG(ULT_LDO, P150,     0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1551     SPMI_VREG(ULT_LDO, P50,     0, INF, ULT_LDO, ult_ldo, ult_pldo, 5000),
1552 };
1553
1554 static void spmi_calculate_num_voltages(struct spmi_voltage_set_points *points)
1555 {
1556     unsigned int n;
1557     struct spmi_voltage_range *range = points->range;
1558
1559     for (; range < points->range + points->count; range++) {
1560         n = 0;
1561         if (range->set_point_max_uV) {
1562             n = range->set_point_max_uV - range->set_point_min_uV;
1563             n = (n / range->step_uV) + 1;
1564         }
1565         range->n_voltages = n;
1566         points->n_voltages += n;
1567     }
1568 }
1569
1570 static int spmi_regulator_match(struct spmi_regulator *vreg, u16 force_type)
1571 {
1572     const struct spmi_regulator_mapping *mapping;
1573     int ret, i;
1574     u32 dig_major_rev;
1575     u8 version[SPMI_COMMON_REG_SUBTYPE - SPMI_COMMON_REG_DIG_MAJOR_REV + 1];
1576     u8 type, subtype;
1577
1578     ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_DIG_MAJOR_REV, version,
1579         ARRAY_SIZE(version));
1580     if (ret) {
1581         dev_dbg(vreg->dev, "could not read version registers\n");
1582         return ret;
1583     }
1584     dig_major_rev   = version[SPMI_COMMON_REG_DIG_MAJOR_REV
1585                     - SPMI_COMMON_REG_DIG_MAJOR_REV];
1586
1587     if (!force_type) {
1588         type        = version[SPMI_COMMON_REG_TYPE -
1589                       SPMI_COMMON_REG_DIG_MAJOR_REV];
1590         subtype     = version[SPMI_COMMON_REG_SUBTYPE -
1591                       SPMI_COMMON_REG_DIG_MAJOR_REV];
1592     } else {
1593         type = force_type >> 8;
1594         subtype = force_type;
1595     }
1596
1597     for (i = 0; i < ARRAY_SIZE(supported_regulators); i++) {
1598         mapping = &supported_regulators[i];
1599         if (mapping->type == type && mapping->subtype == subtype
1600             && mapping->revision_min <= dig_major_rev
1601             && mapping->revision_max >= dig_major_rev)
1602             goto found;
1603     }
1604
1605     dev_err(vreg->dev,
1606         "unsupported regulator: name=%s type=0x%02X, subtype=0x%02X, dig major rev=0x%02X\n",
1607         vreg->desc.name, type, subtype, dig_major_rev);
1608
1609     return -ENODEV;
1610
1611 found:
1612     vreg->logical_type  = mapping->logical_type;
1613     vreg->set_points    = mapping->set_points;
1614     vreg->hpm_min_load  = mapping->hpm_min_load;
1615     vreg->desc.ops      = mapping->ops;
1616
1617     if (mapping->set_points) {
1618         if (!mapping->set_points->n_voltages)
1619             spmi_calculate_num_voltages(mapping->set_points);
1620         vreg->desc.n_voltages = mapping->set_points->n_voltages;
1621     }
1622
1623     return 0;
1624 }
1625
1626 static int spmi_regulator_init_slew_rate(struct spmi_regulator *vreg)
1627 {
1628     int ret;
1629     u8 reg = 0;
1630     int step, delay, slew_rate, step_delay;
1631     const struct spmi_voltage_range *range;
1632
1633     ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, &reg, 1);
1634     if (ret) {
1635         dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret);
1636         return ret;
1637     }
1638
1639     range = spmi_regulator_find_range(vreg);
1640     if (!range)
1641         return -EINVAL;
1642
1643     switch (vreg->logical_type) {
1644     case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS:
1645         step_delay = SPMI_FTSMPS_STEP_DELAY;
1646         break;
1647     default:
1648         step_delay = SPMI_DEFAULT_STEP_DELAY;
1649         break;
1650     }
1651
1652     step = reg & SPMI_FTSMPS_STEP_CTRL_STEP_MASK;
1653     step >>= SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT;
1654
1655     delay = reg & SPMI_FTSMPS_STEP_CTRL_DELAY_MASK;
1656     delay >>= SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT;
1657
1658     /* slew_rate has units of uV/us */
1659     slew_rate = SPMI_FTSMPS_CLOCK_RATE * range->step_uV * (1 << step);
1660     slew_rate /= 1000 * (step_delay << delay);
1661     slew_rate *= SPMI_FTSMPS_STEP_MARGIN_NUM;
1662     slew_rate /= SPMI_FTSMPS_STEP_MARGIN_DEN;
1663
1664     /* Ensure that the slew rate is greater than 0 */
1665     vreg->slew_rate = max(slew_rate, 1);
1666
1667     return ret;
1668 }
1669
1670 static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg,
1671                            int clock_rate)
1672 {
1673     int ret;
1674     u8 reg = 0;
1675     int delay, slew_rate;
1676     const struct spmi_voltage_range *range = &vreg->set_points->range[0];
1677
1678     ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, &reg, 1);
1679     if (ret) {
1680         dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret);
1681         return ret;
1682     }
1683
1684     delay = reg & SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK;
1685     delay >>= SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT;
1686
1687     /* slew_rate has units of uV/us */
1688     slew_rate = clock_rate * range->step_uV;
1689     slew_rate /= 1000 * (SPMI_FTSMPS426_STEP_DELAY << delay);
1690     slew_rate *= SPMI_FTSMPS426_STEP_MARGIN_NUM;
1691     slew_rate /= SPMI_FTSMPS426_STEP_MARGIN_DEN;
1692
1693     /* Ensure that the slew rate is greater than 0 */
1694     vreg->slew_rate = max(slew_rate, 1);
1695
1696     return ret;
1697 }
1698
1699 static int spmi_regulator_init_registers(struct spmi_regulator *vreg,
1700                 const struct spmi_regulator_init_data *data)
1701 {
1702     int ret;
1703     enum spmi_regulator_logical_type type;
1704     u8 ctrl_reg[8], reg, mask;
1705
1706     type = vreg->logical_type;
1707
1708     ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8);
1709     if (ret)
1710         return ret;
1711
1712     /* Set up enable pin control. */
1713     if (!(data->pin_ctrl_enable & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) {
1714         switch (type) {
1715         case SPMI_REGULATOR_LOGICAL_TYPE_SMPS:
1716         case SPMI_REGULATOR_LOGICAL_TYPE_LDO:
1717         case SPMI_REGULATOR_LOGICAL_TYPE_VS:
1718             ctrl_reg[SPMI_COMMON_IDX_ENABLE] &=
1719                 ~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
1720             ctrl_reg[SPMI_COMMON_IDX_ENABLE] |=
1721                 data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
1722             break;
1723         default:
1724             break;
1725         }
1726     }
1727
1728     /* Set up mode pin control. */
1729     if (!(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1730         switch (type) {
1731         case SPMI_REGULATOR_LOGICAL_TYPE_SMPS:
1732         case SPMI_REGULATOR_LOGICAL_TYPE_LDO:
1733             ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1734                 ~SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
1735             ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1736                 data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
1737             break;
1738         case SPMI_REGULATOR_LOGICAL_TYPE_VS:
1739         case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS:
1740         case SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS:
1741         case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO:
1742             ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1743                 ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1744             ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1745                 data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1746             break;
1747         default:
1748             break;
1749         }
1750     }
1751
1752     /* Write back any control register values that were modified. */
1753     ret = spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8);
1754     if (ret)
1755         return ret;
1756
1757     /* Set soft start strength and over current protection for VS. */
1758     if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS) {
1759         if (data->vs_soft_start_strength
1760                 != SPMI_VS_SOFT_START_STR_HW_DEFAULT) {
1761             reg = data->vs_soft_start_strength
1762                 & SPMI_VS_SOFT_START_SEL_MASK;
1763             mask = SPMI_VS_SOFT_START_SEL_MASK;
1764             return spmi_vreg_update_bits(vreg,
1765                              SPMI_VS_REG_SOFT_START,
1766                              reg, mask);
1767         }
1768     }
1769
1770     return 0;
1771 }
1772
1773 static void spmi_regulator_get_dt_config(struct spmi_regulator *vreg,
1774         struct device_node *node, struct spmi_regulator_init_data *data)
1775 {
1776     /*
1777      * Initialize configuration parameters to use hardware default in case
1778      * no value is specified via device tree.
1779      */
1780     data->pin_ctrl_enable       = SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT;
1781     data->pin_ctrl_hpm      = SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT;
1782     data->vs_soft_start_strength    = SPMI_VS_SOFT_START_STR_HW_DEFAULT;
1783
1784     /* These bindings are optional, so it is okay if they aren't found. */
1785     of_property_read_u32(node, "qcom,ocp-max-retries",
1786         &vreg->ocp_max_retries);
1787     of_property_read_u32(node, "qcom,ocp-retry-delay",
1788         &vreg->ocp_retry_delay_ms);
1789     of_property_read_u32(node, "qcom,pin-ctrl-enable",
1790         &data->pin_ctrl_enable);
1791     of_property_read_u32(node, "qcom,pin-ctrl-hpm", &data->pin_ctrl_hpm);
1792     of_property_read_u32(node, "qcom,vs-soft-start-strength",
1793         &data->vs_soft_start_strength);
1794 }
1795
1796 static unsigned int spmi_regulator_of_map_mode(unsigned int mode)
1797 {
1798     if (mode == 1)
1799         return REGULATOR_MODE_NORMAL;
1800     if (mode == 2)
1801         return REGULATOR_MODE_FAST;
1802
1803     return REGULATOR_MODE_IDLE;
1804 }
1805
1806 static int spmi_regulator_of_parse(struct device_node *node,
1807                 const struct regulator_desc *desc,
1808                 struct regulator_config *config)
1809 {
1810     struct spmi_regulator_init_data data = { };
1811     struct spmi_regulator *vreg = config->driver_data;
1812     struct device *dev = config->dev;
1813     int ret;
1814
1815     spmi_regulator_get_dt_config(vreg, node, &data);
1816
1817     if (!vreg->ocp_max_retries)
1818         vreg->ocp_max_retries = SPMI_VS_OCP_DEFAULT_MAX_RETRIES;
1819     if (!vreg->ocp_retry_delay_ms)
1820         vreg->ocp_retry_delay_ms = SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS;
1821
1822     ret = spmi_regulator_init_registers(vreg, &data);
1823     if (ret) {
1824         dev_err(dev, "common initialization failed, ret=%d\n", ret);
1825         return ret;
1826     }
1827
1828     switch (vreg->logical_type) {
1829     case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS:
1830     case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS:
1831     case SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS:
1832     case SPMI_REGULATOR_LOGICAL_TYPE_SMPS:
1833         ret = spmi_regulator_init_slew_rate(vreg);
1834         if (ret)
1835             return ret;
1836         break;
1837     case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426:
1838         ret = spmi_regulator_init_slew_rate_ftsmps426(vreg,
1839                         SPMI_FTSMPS426_CLOCK_RATE);
1840         if (ret)
1841             return ret;
1842         break;
1843     case SPMI_REGULATOR_LOGICAL_TYPE_HFS430:
1844         ret = spmi_regulator_init_slew_rate_ftsmps426(vreg,
1845                             SPMI_HFS430_CLOCK_RATE);
1846         if (ret)
1847             return ret;
1848         break;
1849     default:
1850         break;
1851     }
1852
1853     if (vreg->logical_type != SPMI_REGULATOR_LOGICAL_TYPE_VS)
1854         vreg->ocp_irq = 0;
1855
1856     if (vreg->ocp_irq) {
1857         ret = devm_request_irq(dev, vreg->ocp_irq,
1858             spmi_regulator_vs_ocp_isr, IRQF_TRIGGER_RISING, "ocp",
1859             vreg);
1860         if (ret < 0) {
1861             dev_err(dev, "failed to request irq %d, ret=%d\n",
1862                 vreg->ocp_irq, ret);
1863             return ret;
1864         }
1865
1866         ret = devm_delayed_work_autocancel(dev, &vreg->ocp_work,
1867                            spmi_regulator_vs_ocp_work);
1868         if (ret)
1869             return ret;
1870     }
1871
1872     return 0;
1873 }
1874
1875 static const struct spmi_regulator_data pm8941_regulators[] = {
1876     { "s1", 0x1400, "vdd_s1", },
1877     { "s2", 0x1700, "vdd_s2", },
1878     { "s3", 0x1a00, "vdd_s3", },
1879     { "s4", 0xa000, },
1880     { "l1", 0x4000, "vdd_l1_l3", },
1881     { "l2", 0x4100, "vdd_l2_lvs_1_2_3", },
1882     { "l3", 0x4200, "vdd_l1_l3", },
1883     { "l4", 0x4300, "vdd_l4_l11", },
1884     { "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 },
1885     { "l6", 0x4500, "vdd_l6_l12_l14_l15", },
1886     { "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 },
1887     { "l8", 0x4700, "vdd_l8_l16_l18_19", },
1888     { "l9", 0x4800, "vdd_l9_l10_l17_l22", },
1889     { "l10", 0x4900, "vdd_l9_l10_l17_l22", },
1890     { "l11", 0x4a00, "vdd_l4_l11", },
1891     { "l12", 0x4b00, "vdd_l6_l12_l14_l15", },
1892     { "l13", 0x4c00, "vdd_l13_l20_l23_l24", },
1893     { "l14", 0x4d00, "vdd_l6_l12_l14_l15", },
1894     { "l15", 0x4e00, "vdd_l6_l12_l14_l15", },
1895     { "l16", 0x4f00, "vdd_l8_l16_l18_19", },
1896     { "l17", 0x5000, "vdd_l9_l10_l17_l22", },
1897     { "l18", 0x5100, "vdd_l8_l16_l18_19", },
1898     { "l19", 0x5200, "vdd_l8_l16_l18_19", },
1899     { "l20", 0x5300, "vdd_l13_l20_l23_l24", },
1900     { "l21", 0x5400, "vdd_l21", },
1901     { "l22", 0x5500, "vdd_l9_l10_l17_l22", },
1902     { "l23", 0x5600, "vdd_l13_l20_l23_l24", },
1903     { "l24", 0x5700, "vdd_l13_l20_l23_l24", },
1904     { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", },
1905     { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", },
1906     { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", },
1907     { "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", },
1908     { "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", },
1909     { }
1910 };
1911
1912 static const struct spmi_regulator_data pm8226_regulators[] = {
1913     { "s1", 0x1400, "vdd_s1", },
1914     { "s2", 0x1700, "vdd_s2", },
1915     { "s3", 0x1a00, "vdd_s3", },
1916     { "s4", 0x1d00, "vdd_s4", },
1917     { "s5", 0x2000, "vdd_s5", },
1918     { "l1", 0x4000, "vdd_l1_l2_l4_l5", },
1919     { "l2", 0x4100, "vdd_l1_l2_l4_l5", },
1920     { "l3", 0x4200, "vdd_l3_l24_l26", },
1921     { "l4", 0x4300, "vdd_l1_l2_l4_l5", },
1922     { "l5", 0x4400, "vdd_l1_l2_l4_l5", },
1923     { "l6", 0x4500, "vdd_l6_l7_l8_l9_l27", },
1924     { "l7", 0x4600, "vdd_l6_l7_l8_l9_l27", },
1925     { "l8", 0x4700, "vdd_l6_l7_l8_l9_l27", },
1926     { "l9", 0x4800, "vdd_l6_l7_l8_l9_l27", },
1927     { "l10", 0x4900, "vdd_l10_l11_l13", },
1928     { "l11", 0x4a00, "vdd_l10_l11_l13", },
1929     { "l12", 0x4b00, "vdd_l12_l14", },
1930     { "l13", 0x4c00, "vdd_l10_l11_l13", },
1931     { "l14", 0x4d00, "vdd_l12_l14", },
1932     { "l15", 0x4e00, "vdd_l15_l16_l17_l18", },
1933     { "l16", 0x4f00, "vdd_l15_l16_l17_l18", },
1934     { "l17", 0x5000, "vdd_l15_l16_l17_l18", },
1935     { "l18", 0x5100, "vdd_l15_l16_l17_l18", },
1936     { "l19", 0x5200, "vdd_l19_l20_l21_l22_l23_l28", },
1937     { "l20", 0x5300, "vdd_l19_l20_l21_l22_l23_l28", },
1938     { "l21", 0x5400, "vdd_l19_l20_l21_l22_l23_l28", },
1939     { "l22", 0x5500, "vdd_l19_l20_l21_l22_l23_l28", },
1940     { "l23", 0x5600, "vdd_l19_l20_l21_l22_l23_l28", },
1941     { "l24", 0x5700, "vdd_l3_l24_l26", },
1942     { "l25", 0x5800, "vdd_l25", },
1943     { "l26", 0x5900, "vdd_l3_l24_l26", },
1944     { "l27", 0x5a00, "vdd_l6_l7_l8_l9_l27", },
1945     { "l28", 0x5b00, "vdd_l19_l20_l21_l22_l23_l28", },
1946     { "lvs1", 0x8000, "vdd_lvs1", },
1947     { }
1948 };
1949
1950 static const struct spmi_regulator_data pm8841_regulators[] = {
1951     { "s1", 0x1400, "vdd_s1", },
1952     { "s2", 0x1700, "vdd_s2", NULL, 0x1c08 },
1953     { "s3", 0x1a00, "vdd_s3", },
1954     { "s4", 0x1d00, "vdd_s4", NULL, 0x1c08 },
1955     { "s5", 0x2000, "vdd_s5", NULL, 0x1c08 },
1956     { "s6", 0x2300, "vdd_s6", NULL, 0x1c08 },
1957     { "s7", 0x2600, "vdd_s7", NULL, 0x1c08 },
1958     { "s8", 0x2900, "vdd_s8", NULL, 0x1c08 },
1959     { }
1960 };
1961
1962 static const struct spmi_regulator_data pm8916_regulators[] = {
1963     { "s1", 0x1400, "vdd_s1", },
1964     { "s2", 0x1700, "vdd_s2", },
1965     { "s3", 0x1a00, "vdd_s3", },
1966     { "s4", 0x1d00, "vdd_s4", },
1967     { "l1", 0x4000, "vdd_l1_l3", },
1968     { "l2", 0x4100, "vdd_l2", },
1969     { "l3", 0x4200, "vdd_l1_l3", },
1970     { "l4", 0x4300, "vdd_l4_l5_l6", },
1971     { "l5", 0x4400, "vdd_l4_l5_l6", },
1972     { "l6", 0x4500, "vdd_l4_l5_l6", },
1973     { "l7", 0x4600, "vdd_l7", },
1974     { "l8", 0x4700, "vdd_l8_l11_l14_l15_l16", },
1975     { "l9", 0x4800, "vdd_l9_l10_l12_l13_l17_l18", },
1976     { "l10", 0x4900, "vdd_l9_l10_l12_l13_l17_l18", },
1977     { "l11", 0x4a00, "vdd_l8_l11_l14_l15_l16", },
1978     { "l12", 0x4b00, "vdd_l9_l10_l12_l13_l17_l18", },
1979     { "l13", 0x4c00, "vdd_l9_l10_l12_l13_l17_l18", },
1980     { "l14", 0x4d00, "vdd_l8_l11_l14_l15_l16", },
1981     { "l15", 0x4e00, "vdd_l8_l11_l14_l15_l16", },
1982     { "l16", 0x4f00, "vdd_l8_l11_l14_l15_l16", },
1983     { "l17", 0x5000, "vdd_l9_l10_l12_l13_l17_l18", },
1984     { "l18", 0x5100, "vdd_l9_l10_l12_l13_l17_l18", },
1985     { }
1986 };
1987
1988 static const struct spmi_regulator_data pm8950_regulators[] = {
1989     { "s1", 0x1400, "vdd_s1", },
1990     { "s2", 0x1700, "vdd_s2", },
1991     { "s3", 0x1a00, "vdd_s3", },
1992     { "s4", 0x1d00, "vdd_s4", },
1993     { "s5", 0x2000, "vdd_s5", },
1994     { "s6", 0x2300, "vdd_s6", },
1995     { "l1", 0x4000, "vdd_l1_l19", },
1996     { "l2", 0x4100, "vdd_l2_l23", },
1997     { "l3", 0x4200, "vdd_l3", },
1998     { "l4", 0x4300, "vdd_l4_l5_l6_l7_l16", },
1999     { "l5", 0x4400, "vdd_l4_l5_l6_l7_l16", },
2000     { "l6", 0x4500, "vdd_l4_l5_l6_l7_l16", },
2001     { "l7", 0x4600, "vdd_l4_l5_l6_l7_l16", },
2002     { "l8", 0x4700, "vdd_l8_l11_l12_l17_l22", },
2003     { "l9", 0x4800, "vdd_l9_l10_l13_l14_l15_l18", },
2004     { "l10", 0x4900, "vdd_l9_l10_l13_l14_l15_l18", },
2005     { "l11", 0x4a00, "vdd_l8_l11_l12_l17_l22", },
2006     { "l12", 0x4b00, "vdd_l8_l11_l12_l17_l22", },
2007     { "l13", 0x4c00, "vdd_l9_l10_l13_l14_l15_l18", },
2008     { "l14", 0x4d00, "vdd_l9_l10_l13_l14_l15_l18", },
2009     { "l15", 0x4e00, "vdd_l9_l10_l13_l14_l15_l18", },
2010     { "l16", 0x4f00, "vdd_l4_l5_l6_l7_l16", },
2011     { "l17", 0x5000, "vdd_l8_l11_l12_l17_l22", },
2012     { "l18", 0x5100, "vdd_l9_l10_l13_l14_l15_l18", },
2013     { "l19", 0x5200, "vdd_l1_l19", },
2014     { "l20", 0x5300, "vdd_l20", },
2015     { "l21", 0x5400, "vdd_l21", },
2016     { "l22", 0x5500, "vdd_l8_l11_l12_l17_l22", },
2017     { "l23", 0x5600, "vdd_l2_l23", },
2018     { }
2019 };
2020
2021 static const struct spmi_regulator_data pm8994_regulators[] = {
2022     { "s1", 0x1400, "vdd_s1", },
2023     { "s2", 0x1700, "vdd_s2", },
2024     { "s3", 0x1a00, "vdd_s3", },
2025     { "s4", 0x1d00, "vdd_s4", },
2026     { "s5", 0x2000, "vdd_s5", },
2027     { "s6", 0x2300, "vdd_s6", },
2028     { "s7", 0x2600, "vdd_s7", },
2029     { "s8", 0x2900, "vdd_s8", },
2030     { "s9", 0x2c00, "vdd_s9", },
2031     { "s10", 0x2f00, "vdd_s10", },
2032     { "s11", 0x3200, "vdd_s11", },
2033     { "s12", 0x3500, "vdd_s12", },
2034     { "l1", 0x4000, "vdd_l1", },
2035     { "l2", 0x4100, "vdd_l2_l26_l28", },
2036     { "l3", 0x4200, "vdd_l3_l11", },
2037     { "l4", 0x4300, "vdd_l4_l27_l31", },
2038     { "l5", 0x4400, "vdd_l5_l7", },
2039     { "l6", 0x4500, "vdd_l6_l12_l32", },
2040     { "l7", 0x4600, "vdd_l5_l7", },
2041     { "l8", 0x4700, "vdd_l8_l16_l30", },
2042     { "l9", 0x4800, "vdd_l9_l10_l18_l22", },
2043     { "l10", 0x4900, "vdd_l9_l10_l18_l22", },
2044     { "l11", 0x4a00, "vdd_l3_l11", },
2045     { "l12", 0x4b00, "vdd_l6_l12_l32", },
2046     { "l13", 0x4c00, "vdd_l13_l19_l23_l24", },
2047     { "l14", 0x4d00, "vdd_l14_l15", },
2048     { "l15", 0x4e00, "vdd_l14_l15", },
2049     { "l16", 0x4f00, "vdd_l8_l16_l30", },
2050     { "l17", 0x5000, "vdd_l17_l29", },
2051     { "l18", 0x5100, "vdd_l9_l10_l18_l22", },
2052     { "l19", 0x5200, "vdd_l13_l19_l23_l24", },
2053     { "l20", 0x5300, "vdd_l20_l21", },
2054     { "l21", 0x5400, "vdd_l20_l21", },
2055     { "l22", 0x5500, "vdd_l9_l10_l18_l22", },
2056     { "l23", 0x5600, "vdd_l13_l19_l23_l24", },
2057     { "l24", 0x5700, "vdd_l13_l19_l23_l24", },
2058     { "l25", 0x5800, "vdd_l25", },
2059     { "l26", 0x5900, "vdd_l2_l26_l28", },
2060     { "l27", 0x5a00, "vdd_l4_l27_l31", },
2061     { "l28", 0x5b00, "vdd_l2_l26_l28", },
2062     { "l29", 0x5c00, "vdd_l17_l29", },
2063     { "l30", 0x5d00, "vdd_l8_l16_l30", },
2064     { "l31", 0x5e00, "vdd_l4_l27_l31", },
2065     { "l32", 0x5f00, "vdd_l6_l12_l32", },
2066     { "lvs1", 0x8000, "vdd_lvs_1_2", },
2067     { "lvs2", 0x8100, "vdd_lvs_1_2", },
2068     { }
2069 };
2070
2071 static const struct spmi_regulator_data pmi8994_regulators[] = {
2072     { "s1", 0x1400, "vdd_s1", },
2073     { "s2", 0x1700, "vdd_s2", },
2074     { "s3", 0x1a00, "vdd_s3", },
2075     { "l1", 0x4000, "vdd_l1", },
2076     { }
2077 };
2078
2079 static const struct spmi_regulator_data pm660_regulators[] = {
2080     { "s1", 0x1400, "vdd_s1", },
2081     { "s2", 0x1700, "vdd_s2", },
2082     { "s3", 0x1a00, "vdd_s3", },
2083     { "s4", 0x1d00, "vdd_s3", },
2084     { "s5", 0x2000, "vdd_s5", },
2085     { "s6", 0x2300, "vdd_s6", },
2086     { "l1", 0x4000, "vdd_l1_l6_l7", },
2087     { "l2", 0x4100, "vdd_l2_l3", },
2088     { "l3", 0x4200, "vdd_l2_l3", },
2089     /* l4 is unaccessible on PM660 */
2090     { "l5", 0x4400, "vdd_l5", },
2091     { "l6", 0x4500, "vdd_l1_l6_l7", },
2092     { "l7", 0x4600, "vdd_l1_l6_l7", },
2093     { "l8", 0x4700, "vdd_l8_l9_l10_l11_l12_l13_l14", },
2094     { "l9", 0x4800, "vdd_l8_l9_l10_l11_l12_l13_l14", },
2095     { "l10", 0x4900, "vdd_l8_l9_l10_l11_l12_l13_l14", },
2096     { "l11", 0x4a00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
2097     { "l12", 0x4b00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
2098     { "l13", 0x4c00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
2099     { "l14", 0x4d00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
2100     { "l15", 0x4e00, "vdd_l15_l16_l17_l18_l19", },
2101     { "l16", 0x4f00, "vdd_l15_l16_l17_l18_l19", },
2102     { "l17", 0x5000, "vdd_l15_l16_l17_l18_l19", },
2103     { "l18", 0x5100, "vdd_l15_l16_l17_l18_l19", },
2104     { "l19", 0x5200, "vdd_l15_l16_l17_l18_l19", },
2105     { }
2106 };
2107
2108 static const struct spmi_regulator_data pm660l_regulators[] = {
2109     { "s1", 0x1400, "vdd_s1", },
2110     { "s2", 0x1700, "vdd_s2", },
2111     { "s3", 0x1a00, "vdd_s3", },
2112     { "s4", 0x1d00, "vdd_s4", },
2113     { "s5", 0x2000, "vdd_s5", },
2114     { "l1", 0x4000, "vdd_l1_l9_l10", },
2115     { "l2", 0x4100, "vdd_l2", },
2116     { "l3", 0x4200, "vdd_l3_l5_l7_l8", },
2117     { "l4", 0x4300, "vdd_l4_l6", },
2118     { "l5", 0x4400, "vdd_l3_l5_l7_l8", },
2119     { "l6", 0x4500, "vdd_l4_l6", },
2120     { "l7", 0x4600, "vdd_l3_l5_l7_l8", },
2121     { "l8", 0x4700, "vdd_l3_l5_l7_l8", },
2122     { "l9", 0x4800, "vdd_l1_l9_l10", },
2123     { "l10", 0x4900, "vdd_l1_l9_l10", },
2124     { }
2125 };
2126
2127
2128 static const struct spmi_regulator_data pm8004_regulators[] = {
2129     { "s2", 0x1700, "vdd_s2", },
2130     { "s5", 0x2000, "vdd_s5", },
2131     { }
2132 };
2133
2134 static const struct spmi_regulator_data pm8005_regulators[] = {
2135     { "s1", 0x1400, "vdd_s1", },
2136     { "s2", 0x1700, "vdd_s2", },
2137     { "s3", 0x1a00, "vdd_s3", },
2138     { "s4", 0x1d00, "vdd_s4", },
2139     { }
2140 };
2141
2142 static const struct spmi_regulator_data pmp8074_regulators[] = {
2143     { "s1", 0x1400, "vdd_s1"},
2144     { "s2", 0x1700, "vdd_s2"},
2145     { "s3", 0x1a00, "vdd_s3"},
2146     { "s4", 0x1d00, "vdd_s4"},
2147     { "s5", 0x2000, "vdd_s5"},
2148     { "l1", 0x4000, "vdd_l1_l2"},
2149     { "l2", 0x4100, "vdd_l1_l2"},
2150     { "l3", 0x4200, "vdd_l3_l8"},
2151     { "l4", 0x4300, "vdd_l4"},
2152     { "l5", 0x4400, "vdd_l5_l6_l15"},
2153     { "l6", 0x4500, "vdd_l5_l6_l15"},
2154     { "l7", 0x4600, "vdd_l7"},
2155     { "l8", 0x4700, "vdd_l3_l8"},
2156     { "l9", 0x4800, "vdd_l9"},
2157     /* l10 is currently unsupported HT_P50 */
2158     { "l11", 0x4a00, "vdd_l10_l11_l12_l13"},
2159     { "l12", 0x4b00, "vdd_l10_l11_l12_l13"},
2160     { "l13", 0x4c00, "vdd_l10_l11_l12_l13"},
2161     { }
2162 };
2163
2164 static const struct spmi_regulator_data pms405_regulators[] = {
2165     { "s3", 0x1a00, "vdd_s3"},
2166     { }
2167 };
2168
2169 static const struct of_device_id qcom_spmi_regulator_match[] = {
2170     { .compatible = "qcom,pm8004-regulators", .data = &pm8004_regulators },
2171     { .compatible = "qcom,pm8005-regulators", .data = &pm8005_regulators },
2172     { .compatible = "qcom,pm8226-regulators", .data = &pm8226_regulators },
2173     { .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators },
2174     { .compatible = "qcom,pm8916-regulators", .data = &pm8916_regulators },
2175     { .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators },
2176     { .compatible = "qcom,pm8950-regulators", .data = &pm8950_regulators },
2177     { .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators },
2178     { .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators },
2179     { .compatible = "qcom,pm660-regulators", .data = &pm660_regulators },
2180     { .compatible = "qcom,pm660l-regulators", .data = &pm660l_regulators },
2181     { .compatible = "qcom,pmp8074-regulators", .data = &pmp8074_regulators },
2182     { .compatible = "qcom,pms405-regulators", .data = &pms405_regulators },
2183     { }
2184 };
2185 MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match);
2186
2187 static int qcom_spmi_regulator_probe(struct platform_device *pdev)
2188 {
2189     const struct spmi_regulator_data *reg;
2190     const struct spmi_voltage_range *range;
2191     const struct of_device_id *match;
2192     struct regulator_config config = { };
2193     struct regulator_dev *rdev;
2194     struct spmi_regulator *vreg;
2195     struct regmap *regmap;
2196     const char *name;
2197     struct device *dev = &pdev->dev;
2198     struct device_node *node = pdev->dev.of_node;
2199     struct device_node *syscon, *reg_node;
2200     struct property *reg_prop;
2201     int ret, lenp;
2202     struct list_head *vreg_list;
2203
2204     vreg_list = devm_kzalloc(dev, sizeof(*vreg_list), GFP_KERNEL);
2205     if (!vreg_list)
2206         return -ENOMEM;
2207     INIT_LIST_HEAD(vreg_list);
2208     platform_set_drvdata(pdev, vreg_list);
2209
2210     regmap = dev_get_regmap(dev->parent, NULL);
2211     if (!regmap)
2212         return -ENODEV;
2213
2214     match = of_match_device(qcom_spmi_regulator_match, &pdev->dev);
2215     if (!match)
2216         return -ENODEV;
2217
2218     if (of_find_property(node, "qcom,saw-reg", &lenp)) {
2219         syscon = of_parse_phandle(node, "qcom,saw-reg", 0);
2220         saw_regmap = syscon_node_to_regmap(syscon);
2221         of_node_put(syscon);
2222         if (IS_ERR(saw_regmap))
2223             dev_err(dev, "ERROR reading SAW regmap\n");
2224     }
2225
2226     for (reg = match->data; reg->name; reg++) {
2227
2228         if (saw_regmap) {
2229             reg_node = of_get_child_by_name(node, reg->name);
2230             reg_prop = of_find_property(reg_node, "qcom,saw-slave",
2231                             &lenp);
2232             of_node_put(reg_node);
2233             if (reg_prop)
2234                 continue;
2235         }
2236
2237         vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
2238         if (!vreg)
2239             return -ENOMEM;
2240
2241         vreg->dev = dev;
2242         vreg->base = reg->base;
2243         vreg->regmap = regmap;
2244         if (reg->ocp) {
2245             vreg->ocp_irq = platform_get_irq_byname(pdev, reg->ocp);
2246             if (vreg->ocp_irq < 0)
2247                 return vreg->ocp_irq;
2248         }
2249         vreg->desc.id = -1;
2250         vreg->desc.owner = THIS_MODULE;
2251         vreg->desc.type = REGULATOR_VOLTAGE;
2252         vreg->desc.enable_reg = reg->base + SPMI_COMMON_REG_ENABLE;
2253         vreg->desc.enable_mask = SPMI_COMMON_ENABLE_MASK;
2254         vreg->desc.enable_val = SPMI_COMMON_ENABLE;
2255         vreg->desc.name = name = reg->name;
2256         vreg->desc.supply_name = reg->supply;
2257         vreg->desc.of_match = reg->name;
2258         vreg->desc.of_parse_cb = spmi_regulator_of_parse;
2259         vreg->desc.of_map_mode = spmi_regulator_of_map_mode;
2260
2261         ret = spmi_regulator_match(vreg, reg->force_type);
2262         if (ret)
2263             continue;
2264
2265         if (saw_regmap) {
2266             reg_node = of_get_child_by_name(node, reg->name);
2267             reg_prop = of_find_property(reg_node, "qcom,saw-leader",
2268                             &lenp);
2269             of_node_put(reg_node);
2270             if (reg_prop) {
2271                 spmi_saw_ops = *(vreg->desc.ops);
2272                 spmi_saw_ops.set_voltage_sel =
2273                     spmi_regulator_saw_set_voltage;
2274                 vreg->desc.ops = &spmi_saw_ops;
2275             }
2276         }
2277
2278         if (vreg->set_points && vreg->set_points->count == 1) {
2279             /* since there is only one range */
2280             range = vreg->set_points->range;
2281             vreg->desc.uV_step = range->step_uV;
2282         }
2283
2284         config.dev = dev;
2285         config.driver_data = vreg;
2286         config.regmap = regmap;
2287         rdev = devm_regulator_register(dev, &vreg->desc, &config);
2288         if (IS_ERR(rdev)) {
2289             dev_err(dev, "failed to register %s\n", name);
2290             return PTR_ERR(rdev);
2291         }
2292
2293         INIT_LIST_HEAD(&vreg->node);
2294         list_add(&vreg->node, vreg_list);
2295     }
2296
2297     return 0;
2298 }
2299
2300 static struct platform_driver qcom_spmi_regulator_driver = {
2301     .driver     = {
2302         .name   = "qcom-spmi-regulator",
2303         .of_match_table = qcom_spmi_regulator_match,
2304     },
2305     .probe      = qcom_spmi_regulator_probe,
2306 };
2307 module_platform_driver(qcom_spmi_regulator_driver);
2308
2309 MODULE_DESCRIPTION("Qualcomm SPMI PMIC regulator driver");
2310 MODULE_LICENSE("GPL v2");
2311 MODULE_ALIAS("platform:qcom-spmi-regulator");