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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2015, Sony Mobile Communications AB.
0004  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
0005  */
0006 
0007 #include <linux/module.h>
0008 #include <linux/of.h>
0009 #include <linux/of_device.h>
0010 #include <linux/platform_device.h>
0011 #include <linux/regulator/driver.h>
0012 #include <linux/regulator/of_regulator.h>
0013 #include <linux/soc/qcom/smd-rpm.h>
0014 
0015 struct qcom_rpm_reg {
0016     struct device *dev;
0017 
0018     struct qcom_smd_rpm *rpm;
0019 
0020     u32 type;
0021     u32 id;
0022 
0023     struct regulator_desc desc;
0024 
0025     int is_enabled;
0026     int uV;
0027     u32 load;
0028 
0029     unsigned int enabled_updated:1;
0030     unsigned int uv_updated:1;
0031     unsigned int load_updated:1;
0032 };
0033 
0034 struct rpm_regulator_req {
0035     __le32 key;
0036     __le32 nbytes;
0037     __le32 value;
0038 };
0039 
0040 #define RPM_KEY_SWEN    0x6e657773 /* "swen" */
0041 #define RPM_KEY_UV  0x00007675 /* "uv" */
0042 #define RPM_KEY_MA  0x0000616d /* "ma" */
0043 
0044 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg)
0045 {
0046     struct rpm_regulator_req req[3];
0047     int reqlen = 0;
0048     int ret;
0049 
0050     if (vreg->enabled_updated) {
0051         req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN);
0052         req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
0053         req[reqlen].value = cpu_to_le32(vreg->is_enabled);
0054         reqlen++;
0055     }
0056 
0057     if (vreg->uv_updated && vreg->is_enabled) {
0058         req[reqlen].key = cpu_to_le32(RPM_KEY_UV);
0059         req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
0060         req[reqlen].value = cpu_to_le32(vreg->uV);
0061         reqlen++;
0062     }
0063 
0064     if (vreg->load_updated && vreg->is_enabled) {
0065         req[reqlen].key = cpu_to_le32(RPM_KEY_MA);
0066         req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
0067         req[reqlen].value = cpu_to_le32(vreg->load / 1000);
0068         reqlen++;
0069     }
0070 
0071     if (!reqlen)
0072         return 0;
0073 
0074     ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE,
0075                  vreg->type, vreg->id,
0076                  req, sizeof(req[0]) * reqlen);
0077     if (!ret) {
0078         vreg->enabled_updated = 0;
0079         vreg->uv_updated = 0;
0080         vreg->load_updated = 0;
0081     }
0082 
0083     return ret;
0084 }
0085 
0086 static int rpm_reg_enable(struct regulator_dev *rdev)
0087 {
0088     struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
0089     int ret;
0090 
0091     vreg->is_enabled = 1;
0092     vreg->enabled_updated = 1;
0093 
0094     ret = rpm_reg_write_active(vreg);
0095     if (ret)
0096         vreg->is_enabled = 0;
0097 
0098     return ret;
0099 }
0100 
0101 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
0102 {
0103     struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
0104 
0105     return vreg->is_enabled;
0106 }
0107 
0108 static int rpm_reg_disable(struct regulator_dev *rdev)
0109 {
0110     struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
0111     int ret;
0112 
0113     vreg->is_enabled = 0;
0114     vreg->enabled_updated = 1;
0115 
0116     ret = rpm_reg_write_active(vreg);
0117     if (ret)
0118         vreg->is_enabled = 1;
0119 
0120     return ret;
0121 }
0122 
0123 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
0124 {
0125     struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
0126 
0127     return vreg->uV;
0128 }
0129 
0130 static int rpm_reg_set_voltage(struct regulator_dev *rdev,
0131                    int min_uV,
0132                    int max_uV,
0133                    unsigned *selector)
0134 {
0135     struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
0136     int ret;
0137     int old_uV = vreg->uV;
0138 
0139     vreg->uV = min_uV;
0140     vreg->uv_updated = 1;
0141 
0142     ret = rpm_reg_write_active(vreg);
0143     if (ret)
0144         vreg->uV = old_uV;
0145 
0146     return ret;
0147 }
0148 
0149 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
0150 {
0151     struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
0152     u32 old_load = vreg->load;
0153     int ret;
0154 
0155     vreg->load = load_uA;
0156     vreg->load_updated = 1;
0157     ret = rpm_reg_write_active(vreg);
0158     if (ret)
0159         vreg->load = old_load;
0160 
0161     return ret;
0162 }
0163 
0164 static const struct regulator_ops rpm_smps_ldo_ops = {
0165     .enable = rpm_reg_enable,
0166     .disable = rpm_reg_disable,
0167     .is_enabled = rpm_reg_is_enabled,
0168     .list_voltage = regulator_list_voltage_linear_range,
0169 
0170     .get_voltage = rpm_reg_get_voltage,
0171     .set_voltage = rpm_reg_set_voltage,
0172 
0173     .set_load = rpm_reg_set_load,
0174 };
0175 
0176 static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
0177     .enable = rpm_reg_enable,
0178     .disable = rpm_reg_disable,
0179     .is_enabled = rpm_reg_is_enabled,
0180 
0181     .get_voltage = rpm_reg_get_voltage,
0182     .set_voltage = rpm_reg_set_voltage,
0183 
0184     .set_load = rpm_reg_set_load,
0185 };
0186 
0187 static const struct regulator_ops rpm_switch_ops = {
0188     .enable = rpm_reg_enable,
0189     .disable = rpm_reg_disable,
0190     .is_enabled = rpm_reg_is_enabled,
0191 };
0192 
0193 static const struct regulator_ops rpm_bob_ops = {
0194     .enable = rpm_reg_enable,
0195     .disable = rpm_reg_disable,
0196     .is_enabled = rpm_reg_is_enabled,
0197 
0198     .get_voltage = rpm_reg_get_voltage,
0199     .set_voltage = rpm_reg_set_voltage,
0200 };
0201 
0202 static const struct regulator_ops rpm_mp5496_ops = {
0203     .enable = rpm_reg_enable,
0204     .disable = rpm_reg_disable,
0205     .is_enabled = rpm_reg_is_enabled,
0206     .list_voltage = regulator_list_voltage_linear_range,
0207 
0208     .get_voltage = rpm_reg_get_voltage,
0209     .set_voltage = rpm_reg_set_voltage,
0210 };
0211 
0212 static const struct regulator_desc pma8084_hfsmps = {
0213     .linear_ranges = (struct linear_range[]) {
0214         REGULATOR_LINEAR_RANGE(375000,  0,  95, 12500),
0215         REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
0216     },
0217     .n_linear_ranges = 2,
0218     .n_voltages = 159,
0219     .ops = &rpm_smps_ldo_ops,
0220 };
0221 
0222 static const struct regulator_desc pma8084_ftsmps = {
0223     .linear_ranges = (struct linear_range[]) {
0224         REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
0225         REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
0226     },
0227     .n_linear_ranges = 2,
0228     .n_voltages = 262,
0229     .ops = &rpm_smps_ldo_ops,
0230 };
0231 
0232 static const struct regulator_desc pma8084_pldo = {
0233     .linear_ranges = (struct linear_range[]) {
0234         REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
0235         REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
0236         REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
0237     },
0238     .n_linear_ranges = 3,
0239     .n_voltages = 164,
0240     .ops = &rpm_smps_ldo_ops,
0241 };
0242 
0243 static const struct regulator_desc pma8084_nldo = {
0244     .linear_ranges = (struct linear_range[]) {
0245         REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
0246     },
0247     .n_linear_ranges = 1,
0248     .n_voltages = 64,
0249     .ops = &rpm_smps_ldo_ops,
0250 };
0251 
0252 static const struct regulator_desc pma8084_switch = {
0253     .ops = &rpm_switch_ops,
0254 };
0255 
0256 static const struct regulator_desc pm8226_hfsmps = {
0257     .linear_ranges = (struct linear_range[]) {
0258         REGULATOR_LINEAR_RANGE(375000,   0,  95, 12500),
0259         REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
0260     },
0261     .n_linear_ranges = 2,
0262     .n_voltages = 159,
0263     .ops = &rpm_smps_ldo_ops,
0264 };
0265 
0266 static const struct regulator_desc pm8226_ftsmps = {
0267     .linear_ranges = (struct linear_range[]) {
0268         REGULATOR_LINEAR_RANGE(350000,    0, 184,  5000),
0269         REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
0270     },
0271     .n_linear_ranges = 2,
0272     .n_voltages = 262,
0273     .ops = &rpm_smps_ldo_ops,
0274 };
0275 
0276 static const struct regulator_desc pm8226_pldo = {
0277     .linear_ranges = (struct linear_range[]) {
0278         REGULATOR_LINEAR_RANGE(750000,    0,  63, 12500),
0279         REGULATOR_LINEAR_RANGE(1550000,  64, 126, 25000),
0280         REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
0281     },
0282     .n_linear_ranges = 3,
0283     .n_voltages = 164,
0284     .ops = &rpm_smps_ldo_ops,
0285 };
0286 
0287 static const struct regulator_desc pm8226_nldo = {
0288     .linear_ranges = (struct linear_range[]) {
0289         REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
0290     },
0291     .n_linear_ranges = 1,
0292     .n_voltages = 64,
0293     .ops = &rpm_smps_ldo_ops,
0294 };
0295 
0296 static const struct regulator_desc pm8226_switch = {
0297     .ops = &rpm_switch_ops,
0298 };
0299 
0300 static const struct regulator_desc pm8x41_hfsmps = {
0301     .linear_ranges = (struct linear_range[]) {
0302         REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
0303         REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
0304     },
0305     .n_linear_ranges = 2,
0306     .n_voltages = 159,
0307     .ops = &rpm_smps_ldo_ops,
0308 };
0309 
0310 static const struct regulator_desc pm8841_ftsmps = {
0311     .linear_ranges = (struct linear_range[]) {
0312         REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
0313         REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
0314     },
0315     .n_linear_ranges = 2,
0316     .n_voltages = 262,
0317     .ops = &rpm_smps_ldo_ops,
0318 };
0319 
0320 static const struct regulator_desc pm8941_boost = {
0321     .linear_ranges = (struct linear_range[]) {
0322         REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
0323     },
0324     .n_linear_ranges = 1,
0325     .n_voltages = 31,
0326     .ops = &rpm_smps_ldo_ops,
0327 };
0328 
0329 static const struct regulator_desc pm8941_pldo = {
0330     .linear_ranges = (struct linear_range[]) {
0331         REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
0332         REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
0333         REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
0334     },
0335     .n_linear_ranges = 3,
0336     .n_voltages = 164,
0337     .ops = &rpm_smps_ldo_ops,
0338 };
0339 
0340 static const struct regulator_desc pm8941_nldo = {
0341     .linear_ranges = (struct linear_range[]) {
0342         REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
0343     },
0344     .n_linear_ranges = 1,
0345     .n_voltages = 64,
0346     .ops = &rpm_smps_ldo_ops,
0347 };
0348 
0349 static const struct regulator_desc pm8941_lnldo = {
0350     .fixed_uV = 1740000,
0351     .n_voltages = 1,
0352     .ops = &rpm_smps_ldo_ops_fixed,
0353 };
0354 
0355 static const struct regulator_desc pm8941_switch = {
0356     .ops = &rpm_switch_ops,
0357 };
0358 
0359 static const struct regulator_desc pm8916_pldo = {
0360     .linear_ranges = (struct linear_range[]) {
0361         REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500),
0362     },
0363     .n_linear_ranges = 1,
0364     .n_voltages = 128,
0365     .ops = &rpm_smps_ldo_ops,
0366 };
0367 
0368 static const struct regulator_desc pm8916_nldo = {
0369     .linear_ranges = (struct linear_range[]) {
0370         REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
0371     },
0372     .n_linear_ranges = 1,
0373     .n_voltages = 94,
0374     .ops = &rpm_smps_ldo_ops,
0375 };
0376 
0377 static const struct regulator_desc pm8916_buck_lvo_smps = {
0378     .linear_ranges = (struct linear_range[]) {
0379         REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
0380         REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
0381     },
0382     .n_linear_ranges = 2,
0383     .n_voltages = 128,
0384     .ops = &rpm_smps_ldo_ops,
0385 };
0386 
0387 static const struct regulator_desc pm8916_buck_hvo_smps = {
0388     .linear_ranges = (struct linear_range[]) {
0389         REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
0390     },
0391     .n_linear_ranges = 1,
0392     .n_voltages = 32,
0393     .ops = &rpm_smps_ldo_ops,
0394 };
0395 
0396 static const struct regulator_desc pm8950_hfsmps = {
0397     .linear_ranges = (struct linear_range[]) {
0398         REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
0399         REGULATOR_LINEAR_RANGE(1550000, 96, 127, 25000),
0400     },
0401     .n_linear_ranges = 2,
0402     .n_voltages = 128,
0403     .ops = &rpm_smps_ldo_ops,
0404 };
0405 
0406 static const struct regulator_desc pm8950_ftsmps2p5 = {
0407     .linear_ranges = (struct linear_range[]) {
0408         REGULATOR_LINEAR_RANGE(80000, 0, 255, 5000),
0409         REGULATOR_LINEAR_RANGE(160000, 256, 460, 10000),
0410     },
0411     .n_linear_ranges = 2,
0412     .n_voltages = 461,
0413     .ops = &rpm_smps_ldo_ops,
0414 };
0415 
0416 static const struct regulator_desc pm8950_ult_nldo = {
0417     .linear_ranges = (struct linear_range[]) {
0418         REGULATOR_LINEAR_RANGE(375000, 0, 202, 12500),
0419     },
0420     .n_linear_ranges = 1,
0421     .n_voltages = 203,
0422     .ops = &rpm_smps_ldo_ops,
0423 };
0424 
0425 static const struct regulator_desc pm8950_ult_pldo = {
0426     .linear_ranges = (struct linear_range[]) {
0427         REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500),
0428     },
0429     .n_linear_ranges = 1,
0430     .n_voltages = 128,
0431     .ops = &rpm_smps_ldo_ops,
0432 };
0433 
0434 static const struct regulator_desc pm8950_pldo_lv = {
0435     .linear_ranges = (struct linear_range[]) {
0436         REGULATOR_LINEAR_RANGE(1500000, 0, 16, 25000),
0437     },
0438     .n_linear_ranges = 1,
0439     .n_voltages = 17,
0440     .ops = &rpm_smps_ldo_ops,
0441 };
0442 
0443 static const struct regulator_desc pm8950_pldo = {
0444     .linear_ranges = (struct linear_range[]) {
0445         REGULATOR_LINEAR_RANGE(975000, 0, 164, 12500),
0446     },
0447     .n_linear_ranges = 1,
0448     .n_voltages = 165,
0449     .ops = &rpm_smps_ldo_ops,
0450 };
0451 
0452 static const struct regulator_desc pm8953_lnldo = {
0453     .linear_ranges = (struct linear_range[]) {
0454         REGULATOR_LINEAR_RANGE(690000, 0, 7, 60000),
0455         REGULATOR_LINEAR_RANGE(1380000, 8, 15, 120000),
0456     },
0457     .n_linear_ranges = 2,
0458     .n_voltages = 16,
0459     .ops = &rpm_smps_ldo_ops,
0460 };
0461 
0462 static const struct regulator_desc pm8953_ult_nldo = {
0463     .linear_ranges = (struct linear_range[]) {
0464         REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
0465     },
0466     .n_linear_ranges = 1,
0467     .n_voltages = 94,
0468     .ops = &rpm_smps_ldo_ops,
0469 };
0470 
0471 static const struct regulator_desc pm8994_hfsmps = {
0472     .linear_ranges = (struct linear_range[]) {
0473         REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
0474         REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
0475     },
0476     .n_linear_ranges = 2,
0477     .n_voltages = 159,
0478     .ops = &rpm_smps_ldo_ops,
0479 };
0480 
0481 static const struct regulator_desc pm8994_ftsmps = {
0482     .linear_ranges = (struct linear_range[]) {
0483         REGULATOR_LINEAR_RANGE(350000,  0, 199, 5000),
0484         REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
0485     },
0486     .n_linear_ranges = 2,
0487     .n_voltages = 350,
0488     .ops = &rpm_smps_ldo_ops,
0489 };
0490 
0491 static const struct regulator_desc pm8994_nldo = {
0492     .linear_ranges = (struct linear_range[]) {
0493         REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
0494     },
0495     .n_linear_ranges = 1,
0496     .n_voltages = 64,
0497     .ops = &rpm_smps_ldo_ops,
0498 };
0499 
0500 static const struct regulator_desc pm8994_pldo = {
0501     .linear_ranges = (struct linear_range[]) {
0502         REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
0503         REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
0504         REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
0505     },
0506     .n_linear_ranges = 3,
0507     .n_voltages = 164,
0508     .ops = &rpm_smps_ldo_ops,
0509 };
0510 
0511 static const struct regulator_desc pm8994_switch = {
0512     .ops = &rpm_switch_ops,
0513 };
0514 
0515 static const struct regulator_desc pm8994_lnldo = {
0516     .fixed_uV = 1740000,
0517     .n_voltages = 1,
0518     .ops = &rpm_smps_ldo_ops_fixed,
0519 };
0520 
0521 static const struct regulator_desc pmi8994_ftsmps = {
0522     .linear_ranges = (struct linear_range[]) {
0523         REGULATOR_LINEAR_RANGE(350000,  0, 199, 5000),
0524         REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
0525     },
0526     .n_linear_ranges = 2,
0527     .n_voltages = 350,
0528     .ops = &rpm_smps_ldo_ops,
0529 };
0530 
0531 static const struct regulator_desc pmi8994_hfsmps = {
0532     .linear_ranges = (struct linear_range[]) {
0533         REGULATOR_LINEAR_RANGE(350000,  0,  80, 12500),
0534         REGULATOR_LINEAR_RANGE(700000, 81, 141, 25000),
0535     },
0536     .n_linear_ranges = 2,
0537     .n_voltages = 142,
0538     .ops = &rpm_smps_ldo_ops,
0539 };
0540 
0541 static const struct regulator_desc pmi8994_bby = {
0542     .linear_ranges = (struct linear_range[]) {
0543         REGULATOR_LINEAR_RANGE(3000000, 0, 44, 50000),
0544     },
0545     .n_linear_ranges = 1,
0546     .n_voltages = 45,
0547     .ops = &rpm_bob_ops,
0548 };
0549 
0550 static const struct regulator_desc pm8998_ftsmps = {
0551     .linear_ranges = (struct linear_range[]) {
0552         REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
0553     },
0554     .n_linear_ranges = 1,
0555     .n_voltages = 259,
0556     .ops = &rpm_smps_ldo_ops,
0557 };
0558 
0559 static const struct regulator_desc pm8998_hfsmps = {
0560     .linear_ranges = (struct linear_range[]) {
0561         REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
0562     },
0563     .n_linear_ranges = 1,
0564     .n_voltages = 216,
0565     .ops = &rpm_smps_ldo_ops,
0566 };
0567 
0568 static const struct regulator_desc pm8998_nldo = {
0569     .linear_ranges = (struct linear_range[]) {
0570         REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
0571     },
0572     .n_linear_ranges = 1,
0573     .n_voltages = 128,
0574     .ops = &rpm_smps_ldo_ops,
0575 };
0576 
0577 static const struct regulator_desc pm8998_pldo = {
0578     .linear_ranges = (struct linear_range[]) {
0579         REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
0580     },
0581     .n_linear_ranges = 1,
0582     .n_voltages = 256,
0583     .ops = &rpm_smps_ldo_ops,
0584 };
0585 
0586 static const struct regulator_desc pm8998_pldo_lv = {
0587     .linear_ranges = (struct linear_range[]) {
0588         REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
0589     },
0590     .n_linear_ranges = 1,
0591     .n_voltages = 128,
0592     .ops = &rpm_smps_ldo_ops,
0593 };
0594 
0595 static const struct regulator_desc pm8998_switch = {
0596     .ops = &rpm_switch_ops,
0597 };
0598 
0599 static const struct regulator_desc pmi8998_bob = {
0600     .linear_ranges = (struct linear_range[]) {
0601         REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
0602     },
0603     .n_linear_ranges = 1,
0604     .n_voltages = 84,
0605     .ops = &rpm_bob_ops,
0606 };
0607 
0608 static const struct regulator_desc pm660_ftsmps = {
0609     .linear_ranges = (struct linear_range[]) {
0610         REGULATOR_LINEAR_RANGE(355000, 0, 199, 5000),
0611     },
0612     .n_linear_ranges = 1,
0613     .n_voltages = 200,
0614     .ops = &rpm_smps_ldo_ops,
0615 };
0616 
0617 static const struct regulator_desc pm660_hfsmps = {
0618     .linear_ranges = (struct linear_range[]) {
0619         REGULATOR_LINEAR_RANGE(320000, 0, 216, 8000),
0620     },
0621     .n_linear_ranges = 1,
0622     .n_voltages = 217,
0623     .ops = &rpm_smps_ldo_ops,
0624 };
0625 
0626 static const struct regulator_desc pm660_ht_nldo = {
0627     .linear_ranges = (struct linear_range[]) {
0628         REGULATOR_LINEAR_RANGE(312000, 0, 124, 8000),
0629     },
0630     .n_linear_ranges = 1,
0631     .n_voltages = 125,
0632     .ops = &rpm_smps_ldo_ops,
0633 };
0634 
0635 static const struct regulator_desc pm660_ht_lvpldo = {
0636     .linear_ranges = (struct linear_range[]) {
0637         REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
0638     },
0639     .n_linear_ranges = 1,
0640     .n_voltages = 63,
0641     .ops = &rpm_smps_ldo_ops,
0642 };
0643 
0644 static const struct regulator_desc pm660_nldo660 = {
0645     .linear_ranges = (struct linear_range[]) {
0646         REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
0647     },
0648     .n_linear_ranges = 1,
0649     .n_voltages = 124,
0650     .ops = &rpm_smps_ldo_ops,
0651 };
0652 
0653 static const struct regulator_desc pm660_pldo660 = {
0654     .linear_ranges = (struct linear_range[]) {
0655         REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
0656     },
0657     .n_linear_ranges = 1,
0658     .n_voltages = 256,
0659     .ops = &rpm_smps_ldo_ops,
0660 };
0661 
0662 static const struct regulator_desc pm660l_bob = {
0663     .linear_ranges = (struct linear_range[]) {
0664         REGULATOR_LINEAR_RANGE(1800000, 0, 84, 32000),
0665     },
0666     .n_linear_ranges = 1,
0667     .n_voltages = 85,
0668     .ops = &rpm_bob_ops,
0669 };
0670 
0671 static const struct regulator_desc pms405_hfsmps3 = {
0672     .linear_ranges = (struct linear_range[]) {
0673         REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
0674     },
0675     .n_linear_ranges = 1,
0676     .n_voltages = 216,
0677     .ops = &rpm_smps_ldo_ops,
0678 };
0679 
0680 static const struct regulator_desc pms405_nldo300 = {
0681     .linear_ranges = (struct linear_range[]) {
0682         REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
0683     },
0684     .n_linear_ranges = 1,
0685     .n_voltages = 128,
0686     .ops = &rpm_smps_ldo_ops,
0687 };
0688 
0689 static const struct regulator_desc pms405_nldo1200 = {
0690     .linear_ranges = (struct linear_range[]) {
0691         REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
0692     },
0693     .n_linear_ranges = 1,
0694     .n_voltages = 128,
0695     .ops = &rpm_smps_ldo_ops,
0696 };
0697 
0698 static const struct regulator_desc pms405_pldo50 = {
0699     .linear_ranges = (struct linear_range[]) {
0700         REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
0701     },
0702     .n_linear_ranges = 1,
0703     .n_voltages = 129,
0704     .ops = &rpm_smps_ldo_ops,
0705 };
0706 
0707 static const struct regulator_desc pms405_pldo150 = {
0708     .linear_ranges = (struct linear_range[]) {
0709         REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
0710     },
0711     .n_linear_ranges = 1,
0712     .n_voltages = 129,
0713     .ops = &rpm_smps_ldo_ops,
0714 };
0715 
0716 static const struct regulator_desc pms405_pldo600 = {
0717     .linear_ranges = (struct linear_range[]) {
0718         REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000),
0719     },
0720     .n_linear_ranges = 1,
0721     .n_voltages = 99,
0722     .ops = &rpm_smps_ldo_ops,
0723 };
0724 
0725 static const struct regulator_desc mp5496_smpa2 = {
0726     .linear_ranges = (struct linear_range[]) {
0727         REGULATOR_LINEAR_RANGE(600000, 0, 127, 12500),
0728     },
0729     .n_linear_ranges = 1,
0730     .n_voltages = 128,
0731     .ops = &rpm_mp5496_ops,
0732 };
0733 
0734 static const struct regulator_desc mp5496_ldoa2 = {
0735     .linear_ranges = (struct linear_range[]) {
0736         REGULATOR_LINEAR_RANGE(800000, 0, 127, 25000),
0737     },
0738     .n_linear_ranges = 1,
0739     .n_voltages = 128,
0740     .ops = &rpm_mp5496_ops,
0741 };
0742 
0743 static const struct regulator_desc pm2250_lvftsmps = {
0744     .linear_ranges = (struct linear_range[]) {
0745         REGULATOR_LINEAR_RANGE(320000, 0, 269, 4000),
0746     },
0747     .n_linear_ranges = 1,
0748     .n_voltages = 270,
0749     .ops = &rpm_smps_ldo_ops,
0750 };
0751 
0752 static const struct regulator_desc pm2250_ftsmps = {
0753     .linear_ranges = (struct linear_range[]) {
0754         REGULATOR_LINEAR_RANGE(640000, 0, 269, 8000),
0755     },
0756     .n_linear_ranges = 1,
0757     .n_voltages = 270,
0758     .ops = &rpm_smps_ldo_ops,
0759 };
0760 
0761 struct rpm_regulator_data {
0762     const char *name;
0763     u32 type;
0764     u32 id;
0765     const struct regulator_desc *desc;
0766     const char *supply;
0767 };
0768 
0769 static const struct rpm_regulator_data rpm_mp5496_regulators[] = {
0770     { "s2", QCOM_SMD_RPM_SMPA, 2, &mp5496_smpa2, "s2" },
0771     { "l2", QCOM_SMD_RPM_LDOA, 2, &mp5496_ldoa2, "l2" },
0772     {}
0773 };
0774 
0775 static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
0776     { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
0777     { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
0778     { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
0779     { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
0780     { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
0781     { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
0782     { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
0783     { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
0784     {}
0785 };
0786 
0787 static const struct rpm_regulator_data rpm_pm8909_regulators[] = {
0788     { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
0789     { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_hvo_smps, "vdd_s2" },
0790     { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1" },
0791     { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l2_l5" },
0792     { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l3_l6_l10" },
0793     { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l7" },
0794     { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_pldo, "vdd_l2_l5" },
0795     { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l3_l6_l10" },
0796     { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l4_l7" },
0797     { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l11_l15_l18" },
0798     { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
0799     { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_nldo, "vdd_l3_l6_l10" },
0800     { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l8_l11_l15_l18" },
0801     { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
0802     { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l13" },
0803     { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
0804     { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l11_l15_l18" },
0805     { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
0806     { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l11_l15_l18" },
0807     {}
0808 };
0809 
0810 static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
0811     { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
0812     { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
0813     { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
0814     { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
0815     { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
0816     { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
0817     { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
0818     { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
0819     { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
0820     { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
0821     { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
0822     { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
0823     { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
0824     { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
0825     { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
0826     { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
0827     { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
0828     { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
0829     { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
0830     { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
0831     { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
0832     { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
0833     {}
0834 };
0835 
0836 static const struct rpm_regulator_data rpm_pm8226_regulators[] = {
0837     { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8226_hfsmps, "vdd_s1" },
0838     { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8226_ftsmps, "vdd_s2" },
0839     { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8226_hfsmps, "vdd_s3" },
0840     { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8226_hfsmps, "vdd_s4" },
0841     { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8226_hfsmps, "vdd_s5" },
0842     { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
0843     { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
0844     { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8226_nldo, "vdd_l3_l24_l26" },
0845     { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
0846     { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
0847     { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
0848     { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
0849     { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
0850     { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
0851     { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8226_pldo, "vdd_l10_l11_l13" },
0852     { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l10_l11_l13" },
0853     { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8226_pldo, "vdd_l12_l14" },
0854     { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8226_pldo, "vdd_l10_l11_l13" },
0855     { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8226_pldo, "vdd_l12_l14" },
0856     { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
0857     { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
0858     { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
0859     { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
0860     { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
0861     { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
0862     { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
0863     { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
0864     { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
0865     { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8226_nldo, "vdd_l3_l24_l26" },
0866     { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8226_pldo, "vdd_l25" },
0867     { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8226_nldo, "vdd_l3_l24_l26" },
0868     { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
0869     { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
0870     { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8226_switch, "vdd_lvs1" },
0871     {}
0872 };
0873 
0874 static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
0875     { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
0876     { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
0877     { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
0878     { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
0879 
0880     { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
0881     { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
0882     { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
0883     { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
0884     { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
0885     { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
0886     { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
0887     { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
0888     { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
0889     { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
0890     { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
0891     { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
0892     { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
0893     { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
0894     { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
0895     { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
0896     { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
0897     { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
0898     { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
0899     { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
0900     { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
0901     { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
0902     { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
0903     { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
0904 
0905     { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
0906     { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
0907     { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
0908 
0909     { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
0910     { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
0911 
0912     {}
0913 };
0914 
0915 static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
0916     { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
0917     { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
0918     { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
0919     { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
0920     { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
0921     { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
0922     { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
0923     { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
0924     { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
0925     { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
0926     { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
0927     { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
0928 
0929     { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
0930     { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
0931     { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
0932     { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
0933     { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
0934     { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
0935     { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
0936     { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
0937     { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
0938     { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
0939     { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
0940     { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
0941     { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
0942     { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
0943     { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
0944     { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
0945     { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
0946     { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
0947     { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
0948     { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
0949     { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
0950     { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
0951     { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
0952     { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
0953     { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
0954     { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
0955     { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
0956 
0957     { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
0958     { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
0959     { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
0960     { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
0961     { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
0962 
0963     {}
0964 };
0965 
0966 static const struct rpm_regulator_data rpm_pm8950_regulators[] = {
0967     { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" },
0968     { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" },
0969     { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8950_hfsmps, "vdd_s3" },
0970     { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8950_hfsmps, "vdd_s4" },
0971     /* S5 is managed via SPMI. */
0972     { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_hfsmps, "vdd_s6" },
0973 
0974     { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8950_ult_nldo, "vdd_l1_l19" },
0975     { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8950_ult_nldo, "vdd_l2_l23" },
0976     { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8950_ult_nldo, "vdd_l3" },
0977     /* L4 seems not to exist. */
0978     { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
0979     { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
0980     { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
0981     { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
0982     { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
0983     { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_nldo, "vdd_l9_l10_l13_l14_l15_l18"},
0984     { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
0985     { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
0986     { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
0987     { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
0988     { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
0989     { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l5_l6_l7_l16" },
0990     { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
0991     /* L18 seems not to exist. */
0992     { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8950_pldo, "vdd_l1_l19" },
0993     /* L20 & L21 seem not to exist. */
0994     { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_pldo, "vdd_l8_l11_l12_l17_l22" },
0995     { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8950_pldo, "vdd_l2_l23" },
0996     {}
0997 };
0998 
0999 static const struct rpm_regulator_data rpm_pm8953_regulators[] = {
1000     {  "s1", QCOM_SMD_RPM_SMPA,  1, &pm8998_hfsmps, "vdd_s1" },
1001     {  "s2", QCOM_SMD_RPM_SMPA,  2, &pm8998_hfsmps, "vdd_s2" },
1002     {  "s3", QCOM_SMD_RPM_SMPA,  3, &pm8998_hfsmps, "vdd_s3" },
1003     {  "s4", QCOM_SMD_RPM_SMPA,  4, &pm8998_hfsmps, "vdd_s4" },
1004     {  "s5", QCOM_SMD_RPM_SMPA,  5, &pm8950_ftsmps2p5, "vdd_s5" },
1005     {  "s6", QCOM_SMD_RPM_SMPA,  6, &pm8950_ftsmps2p5, "vdd_s6" },
1006     {  "s7", QCOM_SMD_RPM_SMPA,  7, &pm8998_hfsmps, "vdd_s7" },
1007 
1008     {  "l1", QCOM_SMD_RPM_LDOA,  1, &pm8953_ult_nldo, "vdd_l1" },
1009     {  "l2", QCOM_SMD_RPM_LDOA,  2, &pm8953_ult_nldo, "vdd_l2_l3" },
1010     {  "l3", QCOM_SMD_RPM_LDOA,  3, &pm8953_ult_nldo, "vdd_l2_l3" },
1011     {  "l4", QCOM_SMD_RPM_LDOA,  4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1012     {  "l5", QCOM_SMD_RPM_LDOA,  5, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1013     {  "l6", QCOM_SMD_RPM_LDOA,  6, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1014     {  "l7", QCOM_SMD_RPM_LDOA,  7, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1015     {  "l8", QCOM_SMD_RPM_LDOA,  8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1016     {  "l9", QCOM_SMD_RPM_LDOA,  9, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1017     { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1018     { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1019     { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1020     { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1021     { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1022     { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1023     { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1024     { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1025     { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1026     { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8953_ult_nldo, "vdd_l4_l5_l6_l7_l16_l19" },
1027     { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8953_lnldo,    "vdd_l20" },
1028     { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8953_lnldo,    "vdd_l21" },
1029     { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1030     { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8953_ult_nldo, "vdd_l23" },
1031     {}
1032 };
1033 
1034 static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
1035     { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
1036     { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
1037     { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
1038     { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
1039     { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" },
1040     { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" },
1041     { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" },
1042     { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" },
1043     { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" },
1044     { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" },
1045     { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" },
1046     { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" },
1047     { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" },
1048     { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" },
1049     { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" },
1050     { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" },
1051     { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" },
1052     { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" },
1053     { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" },
1054     { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" },
1055     { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1056     { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1057     { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" },
1058     { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" },
1059     { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1060     { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" },
1061     { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" },
1062     { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" },
1063     { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" },
1064     { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1065     { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1066     { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" },
1067     { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" },
1068     { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1069     { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1070     { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1071     { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" },
1072     { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" },
1073     { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" },
1074     { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" },
1075     { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" },
1076     { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" },
1077     { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" },
1078     { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" },
1079     { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
1080     { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
1081 
1082     {}
1083 };
1084 
1085 static const struct rpm_regulator_data rpm_pmi8994_regulators[] = {
1086     { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" },
1087     { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" },
1088     { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" },
1089     { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" },
1090     {}
1091 };
1092 
1093 static const struct rpm_regulator_data rpm_pm8998_regulators[] = {
1094     { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" },
1095     { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" },
1096     { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
1097     { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
1098     { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
1099     { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" },
1100     { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" },
1101     { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" },
1102     { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" },
1103     { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" },
1104     { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" },
1105     { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" },
1106     { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" },
1107     { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" },
1108     { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" },
1109     { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" },
1110     { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" },
1111     { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" },
1112     { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" },
1113     { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1114     { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" },
1115     { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" },
1116     { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" },
1117     { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" },
1118     { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1119     { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" },
1120     { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1121     { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1122     { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" },
1123     { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" },
1124     { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" },
1125     { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" },
1126     { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" },
1127     { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" },
1128     { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" },
1129     { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" },
1130     { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" },
1131     { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" },
1132     { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" },
1133     { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" },
1134     { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" },
1135     { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" },
1136     { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" },
1137     {}
1138 };
1139 
1140 static const struct rpm_regulator_data rpm_pmi8998_regulators[] = {
1141     { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" },
1142     {}
1143 };
1144 
1145 static const struct rpm_regulator_data rpm_pm660_regulators[] = {
1146     { "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" },
1147     { "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" },
1148     { "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" },
1149     { "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" },
1150     { "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" },
1151     { "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" },
1152     { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" },
1153     { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" },
1154     { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" },
1155     /* l4 is unaccessible on PM660 */
1156     { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" },
1157     { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" },
1158     { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" },
1159     { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1160     { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1161     { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1162     { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1163     { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1164     { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1165     { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
1166     { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1167     { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1168     { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1169     { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1170     { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
1171     { }
1172 };
1173 
1174 static const struct rpm_regulator_data rpm_pm660l_regulators[] = {
1175     { "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" },
1176     { "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" },
1177     { "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" },
1178     { "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" },
1179     { "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" },
1180     { "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" },
1181     { "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
1182     { "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" },
1183     { "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
1184     { "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" },
1185     { "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
1186     { "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
1187     { "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
1188     { "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
1189     { "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", },
1190     { }
1191 };
1192 
1193 static const struct rpm_regulator_data rpm_pms405_regulators[] = {
1194     { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" },
1195     { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" },
1196     { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" },
1197     { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" },
1198     { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" },
1199     { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" },
1200     { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" },
1201     { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" },
1202     { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" },
1203     { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" },
1204     { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" },
1205     { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" },
1206     { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" },
1207     { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" },
1208     { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" },
1209     { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1210     { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1211     { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1212     {}
1213 };
1214 
1215 static const struct rpm_regulator_data rpm_pm2250_regulators[] = {
1216     { "s1", QCOM_SMD_RPM_SMPA, 1, &pm2250_lvftsmps, "vdd_s1" },
1217     { "s2", QCOM_SMD_RPM_SMPA, 2, &pm2250_lvftsmps, "vdd_s2" },
1218     { "s3", QCOM_SMD_RPM_SMPA, 3, &pm2250_lvftsmps, "vdd_s3" },
1219     { "s4", QCOM_SMD_RPM_SMPA, 4, &pm2250_ftsmps, "vdd_s4" },
1220     { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1221     { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1222     { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1223     { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
1224     { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1225     { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1226     { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1227     { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1228     { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1229     { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1230     { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1231     { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
1232     { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
1233     { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
1234     { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
1235     { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
1236     { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
1237     { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
1238     { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
1239     { "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
1240     { "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
1241     { "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
1242     {}
1243 };
1244 
1245 static const struct of_device_id rpm_of_match[] = {
1246     { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators },
1247     { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
1248     { .compatible = "qcom,rpm-pm8909-regulators", .data = &rpm_pm8909_regulators },
1249     { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
1250     { .compatible = "qcom,rpm-pm8226-regulators", .data = &rpm_pm8226_regulators },
1251     { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
1252     { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators },
1253     { .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators },
1254     { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
1255     { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators },
1256     { .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators },
1257     { .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators },
1258     { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
1259     { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators },
1260     { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators },
1261     { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators },
1262     { .compatible = "qcom,rpm-pm2250-regulators", .data = &rpm_pm2250_regulators },
1263     {}
1264 };
1265 MODULE_DEVICE_TABLE(of, rpm_of_match);
1266 
1267 /**
1268  * rpm_regulator_init_vreg() - initialize all attributes of a qcom_smd-regulator
1269  * @vreg:       Pointer to the individual qcom_smd-regulator resource
1270  * @dev:        Pointer to the top level qcom_smd-regulator PMIC device
1271  * @node:       Pointer to the individual qcom_smd-regulator resource
1272  *          device node
1273  * @rpm:        Pointer to the rpm bus node
1274  * @pmic_rpm_data:  Pointer to a null-terminated array of qcom_smd-regulator
1275  *          resources defined for the top level PMIC device
1276  *
1277  * Return: 0 on success, errno on failure
1278  */
1279 static int rpm_regulator_init_vreg(struct qcom_rpm_reg *vreg, struct device *dev,
1280                    struct device_node *node, struct qcom_smd_rpm *rpm,
1281                    const struct rpm_regulator_data *pmic_rpm_data)
1282 {
1283     struct regulator_config config = {};
1284     const struct rpm_regulator_data *rpm_data;
1285     struct regulator_dev *rdev;
1286     int ret;
1287 
1288     for (rpm_data = pmic_rpm_data; rpm_data->name; rpm_data++)
1289         if (of_node_name_eq(node, rpm_data->name))
1290             break;
1291 
1292     if (!rpm_data->name) {
1293         dev_err(dev, "Unknown regulator %pOFn\n", node);
1294         return -EINVAL;
1295     }
1296 
1297     vreg->dev   = dev;
1298     vreg->rpm   = rpm;
1299     vreg->type  = rpm_data->type;
1300     vreg->id    = rpm_data->id;
1301 
1302     memcpy(&vreg->desc, rpm_data->desc, sizeof(vreg->desc));
1303     vreg->desc.name = rpm_data->name;
1304     vreg->desc.supply_name = rpm_data->supply;
1305     vreg->desc.owner = THIS_MODULE;
1306     vreg->desc.type = REGULATOR_VOLTAGE;
1307     vreg->desc.of_match = rpm_data->name;
1308 
1309     config.dev      = dev;
1310     config.of_node      = node;
1311     config.driver_data  = vreg;
1312 
1313     rdev = devm_regulator_register(dev, &vreg->desc, &config);
1314     if (IS_ERR(rdev)) {
1315         ret = PTR_ERR(rdev);
1316         dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n", node, ret);
1317         return ret;
1318     }
1319 
1320     return 0;
1321 }
1322 
1323 static int rpm_reg_probe(struct platform_device *pdev)
1324 {
1325     struct device *dev = &pdev->dev;
1326     const struct rpm_regulator_data *vreg_data;
1327     struct device_node *node;
1328     struct qcom_rpm_reg *vreg;
1329     struct qcom_smd_rpm *rpm;
1330     int ret;
1331 
1332     rpm = dev_get_drvdata(pdev->dev.parent);
1333     if (!rpm) {
1334         dev_err(&pdev->dev, "Unable to retrieve handle to rpm\n");
1335         return -ENODEV;
1336     }
1337 
1338     vreg_data = of_device_get_match_data(dev);
1339     if (!vreg_data)
1340         return -ENODEV;
1341 
1342     for_each_available_child_of_node(dev->of_node, node) {
1343         vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
1344         if (!vreg) {
1345             of_node_put(node);
1346             return -ENOMEM;
1347         }
1348 
1349         ret = rpm_regulator_init_vreg(vreg, dev, node, rpm, vreg_data);
1350 
1351         if (ret < 0) {
1352             of_node_put(node);
1353             return ret;
1354         }
1355     }
1356 
1357     return 0;
1358 }
1359 
1360 static struct platform_driver rpm_reg_driver = {
1361     .probe = rpm_reg_probe,
1362     .driver = {
1363         .name  = "qcom_rpm_smd_regulator",
1364         .of_match_table = rpm_of_match,
1365     },
1366 };
1367 
1368 static int __init rpm_reg_init(void)
1369 {
1370     return platform_driver_register(&rpm_reg_driver);
1371 }
1372 subsys_initcall(rpm_reg_init);
1373 
1374 static void __exit rpm_reg_exit(void)
1375 {
1376     platform_driver_unregister(&rpm_reg_driver);
1377 }
1378 module_exit(rpm_reg_exit)
1379 
1380 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
1381 MODULE_LICENSE("GPL v2");