0001
0002
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0004 #define pr_fmt(fmt) "%s: " fmt, __func__
0005
0006 #include <linux/err.h>
0007 #include <linux/kernel.h>
0008 #include <linux/module.h>
0009 #include <linux/of.h>
0010 #include <linux/of_device.h>
0011 #include <linux/platform_device.h>
0012 #include <linux/slab.h>
0013 #include <linux/string.h>
0014 #include <linux/regulator/driver.h>
0015 #include <linux/regulator/machine.h>
0016 #include <linux/regulator/of_regulator.h>
0017
0018 #include <soc/qcom/cmd-db.h>
0019 #include <soc/qcom/rpmh.h>
0020
0021 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
0022
0023
0024
0025
0026
0027
0028
0029
0030 enum rpmh_regulator_type {
0031 VRM,
0032 XOB,
0033 };
0034
0035 #define RPMH_REGULATOR_REG_VRM_VOLTAGE 0x0
0036 #define RPMH_REGULATOR_REG_ENABLE 0x4
0037 #define RPMH_REGULATOR_REG_VRM_MODE 0x8
0038
0039 #define PMIC4_LDO_MODE_RETENTION 4
0040 #define PMIC4_LDO_MODE_LPM 5
0041 #define PMIC4_LDO_MODE_HPM 7
0042
0043 #define PMIC4_SMPS_MODE_RETENTION 4
0044 #define PMIC4_SMPS_MODE_PFM 5
0045 #define PMIC4_SMPS_MODE_AUTO 6
0046 #define PMIC4_SMPS_MODE_PWM 7
0047
0048 #define PMIC4_BOB_MODE_PASS 0
0049 #define PMIC4_BOB_MODE_PFM 1
0050 #define PMIC4_BOB_MODE_AUTO 2
0051 #define PMIC4_BOB_MODE_PWM 3
0052
0053 #define PMIC5_LDO_MODE_RETENTION 3
0054 #define PMIC5_LDO_MODE_LPM 4
0055 #define PMIC5_LDO_MODE_HPM 7
0056
0057 #define PMIC5_SMPS_MODE_RETENTION 3
0058 #define PMIC5_SMPS_MODE_PFM 4
0059 #define PMIC5_SMPS_MODE_AUTO 6
0060 #define PMIC5_SMPS_MODE_PWM 7
0061
0062 #define PMIC5_BOB_MODE_PASS 2
0063 #define PMIC5_BOB_MODE_PFM 4
0064 #define PMIC5_BOB_MODE_AUTO 6
0065 #define PMIC5_BOB_MODE_PWM 7
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0086 struct rpmh_vreg_hw_data {
0087 enum rpmh_regulator_type regulator_type;
0088 const struct regulator_ops *ops;
0089 const struct linear_range voltage_range;
0090 int n_voltages;
0091 int hpm_min_load_uA;
0092 const int *pmic_mode_map;
0093 unsigned int (*of_map_mode)(unsigned int mode);
0094 };
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0120 struct rpmh_vreg {
0121 struct device *dev;
0122 u32 addr;
0123 struct regulator_desc rdesc;
0124 const struct rpmh_vreg_hw_data *hw_data;
0125 bool always_wait_for_ack;
0126
0127 int enabled;
0128 bool bypassed;
0129 int voltage_selector;
0130 unsigned int mode;
0131 };
0132
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0144
0145 struct rpmh_vreg_init_data {
0146 const char *name;
0147 const char *resource_name;
0148 const char *supply_name;
0149 const struct rpmh_vreg_hw_data *hw_data;
0150 };
0151
0152
0153
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0159
0160
0161 static int rpmh_regulator_send_request(struct rpmh_vreg *vreg,
0162 struct tcs_cmd *cmd, bool wait_for_ack)
0163 {
0164 int ret;
0165
0166 if (wait_for_ack || vreg->always_wait_for_ack)
0167 ret = rpmh_write(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd, 1);
0168 else
0169 ret = rpmh_write_async(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd,
0170 1);
0171
0172 return ret;
0173 }
0174
0175 static int _rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
0176 unsigned int selector, bool wait_for_ack)
0177 {
0178 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
0179 struct tcs_cmd cmd = {
0180 .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_VOLTAGE,
0181 };
0182 int ret;
0183
0184
0185 cmd.data = DIV_ROUND_UP(regulator_list_voltage_linear_range(rdev,
0186 selector), 1000);
0187
0188 ret = rpmh_regulator_send_request(vreg, &cmd, wait_for_ack);
0189 if (!ret)
0190 vreg->voltage_selector = selector;
0191
0192 return ret;
0193 }
0194
0195 static int rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
0196 unsigned int selector)
0197 {
0198 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
0199
0200 if (vreg->enabled == -EINVAL) {
0201
0202
0203
0204
0205 vreg->voltage_selector = selector;
0206 return 0;
0207 }
0208
0209 return _rpmh_regulator_vrm_set_voltage_sel(rdev, selector,
0210 selector > vreg->voltage_selector);
0211 }
0212
0213 static int rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev *rdev)
0214 {
0215 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
0216
0217 return vreg->voltage_selector;
0218 }
0219
0220 static int rpmh_regulator_is_enabled(struct regulator_dev *rdev)
0221 {
0222 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
0223
0224 return vreg->enabled;
0225 }
0226
0227 static int rpmh_regulator_set_enable_state(struct regulator_dev *rdev,
0228 bool enable)
0229 {
0230 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
0231 struct tcs_cmd cmd = {
0232 .addr = vreg->addr + RPMH_REGULATOR_REG_ENABLE,
0233 .data = enable,
0234 };
0235 int ret;
0236
0237 if (vreg->enabled == -EINVAL &&
0238 vreg->voltage_selector != -ENOTRECOVERABLE) {
0239 ret = _rpmh_regulator_vrm_set_voltage_sel(rdev,
0240 vreg->voltage_selector, true);
0241 if (ret < 0)
0242 return ret;
0243 }
0244
0245 ret = rpmh_regulator_send_request(vreg, &cmd, enable);
0246 if (!ret)
0247 vreg->enabled = enable;
0248
0249 return ret;
0250 }
0251
0252 static int rpmh_regulator_enable(struct regulator_dev *rdev)
0253 {
0254 return rpmh_regulator_set_enable_state(rdev, true);
0255 }
0256
0257 static int rpmh_regulator_disable(struct regulator_dev *rdev)
0258 {
0259 return rpmh_regulator_set_enable_state(rdev, false);
0260 }
0261
0262 static int rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg *vreg,
0263 unsigned int mode, bool bypassed)
0264 {
0265 struct tcs_cmd cmd = {
0266 .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_MODE,
0267 };
0268 int pmic_mode;
0269
0270 if (mode > REGULATOR_MODE_STANDBY)
0271 return -EINVAL;
0272
0273 pmic_mode = vreg->hw_data->pmic_mode_map[mode];
0274 if (pmic_mode < 0)
0275 return pmic_mode;
0276
0277 if (bypassed)
0278 cmd.data = PMIC4_BOB_MODE_PASS;
0279 else
0280 cmd.data = pmic_mode;
0281
0282 return rpmh_regulator_send_request(vreg, &cmd, true);
0283 }
0284
0285 static int rpmh_regulator_vrm_set_mode(struct regulator_dev *rdev,
0286 unsigned int mode)
0287 {
0288 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
0289 int ret;
0290
0291 if (mode == vreg->mode)
0292 return 0;
0293
0294 ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode, vreg->bypassed);
0295 if (!ret)
0296 vreg->mode = mode;
0297
0298 return ret;
0299 }
0300
0301 static unsigned int rpmh_regulator_vrm_get_mode(struct regulator_dev *rdev)
0302 {
0303 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
0304
0305 return vreg->mode;
0306 }
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0319 static int rpmh_regulator_vrm_set_load(struct regulator_dev *rdev, int load_uA)
0320 {
0321 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
0322 unsigned int mode;
0323
0324 if (load_uA >= vreg->hw_data->hpm_min_load_uA)
0325 mode = REGULATOR_MODE_NORMAL;
0326 else
0327 mode = REGULATOR_MODE_IDLE;
0328
0329 return rpmh_regulator_vrm_set_mode(rdev, mode);
0330 }
0331
0332 static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev,
0333 bool enable)
0334 {
0335 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
0336 int ret;
0337
0338 if (vreg->bypassed == enable)
0339 return 0;
0340
0341 ret = rpmh_regulator_vrm_set_mode_bypass(vreg, vreg->mode, enable);
0342 if (!ret)
0343 vreg->bypassed = enable;
0344
0345 return ret;
0346 }
0347
0348 static int rpmh_regulator_vrm_get_bypass(struct regulator_dev *rdev,
0349 bool *enable)
0350 {
0351 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
0352
0353 *enable = vreg->bypassed;
0354
0355 return 0;
0356 }
0357
0358 static const struct regulator_ops rpmh_regulator_vrm_ops = {
0359 .enable = rpmh_regulator_enable,
0360 .disable = rpmh_regulator_disable,
0361 .is_enabled = rpmh_regulator_is_enabled,
0362 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
0363 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
0364 .list_voltage = regulator_list_voltage_linear_range,
0365 .set_mode = rpmh_regulator_vrm_set_mode,
0366 .get_mode = rpmh_regulator_vrm_get_mode,
0367 };
0368
0369 static const struct regulator_ops rpmh_regulator_vrm_drms_ops = {
0370 .enable = rpmh_regulator_enable,
0371 .disable = rpmh_regulator_disable,
0372 .is_enabled = rpmh_regulator_is_enabled,
0373 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
0374 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
0375 .list_voltage = regulator_list_voltage_linear_range,
0376 .set_mode = rpmh_regulator_vrm_set_mode,
0377 .get_mode = rpmh_regulator_vrm_get_mode,
0378 .set_load = rpmh_regulator_vrm_set_load,
0379 };
0380
0381 static const struct regulator_ops rpmh_regulator_vrm_bypass_ops = {
0382 .enable = rpmh_regulator_enable,
0383 .disable = rpmh_regulator_disable,
0384 .is_enabled = rpmh_regulator_is_enabled,
0385 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
0386 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
0387 .list_voltage = regulator_list_voltage_linear_range,
0388 .set_mode = rpmh_regulator_vrm_set_mode,
0389 .get_mode = rpmh_regulator_vrm_get_mode,
0390 .set_bypass = rpmh_regulator_vrm_set_bypass,
0391 .get_bypass = rpmh_regulator_vrm_get_bypass,
0392 };
0393
0394 static const struct regulator_ops rpmh_regulator_xob_ops = {
0395 .enable = rpmh_regulator_enable,
0396 .disable = rpmh_regulator_disable,
0397 .is_enabled = rpmh_regulator_is_enabled,
0398 };
0399
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0412
0413 static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev,
0414 struct device_node *node, const char *pmic_id,
0415 const struct rpmh_vreg_init_data *pmic_rpmh_data)
0416 {
0417 struct regulator_config reg_config = {};
0418 char rpmh_resource_name[20] = "";
0419 const struct rpmh_vreg_init_data *rpmh_data;
0420 struct regulator_init_data *init_data;
0421 struct regulator_dev *rdev;
0422 int ret;
0423
0424 vreg->dev = dev;
0425
0426 for (rpmh_data = pmic_rpmh_data; rpmh_data->name; rpmh_data++)
0427 if (of_node_name_eq(node, rpmh_data->name))
0428 break;
0429
0430 if (!rpmh_data->name) {
0431 dev_err(dev, "Unknown regulator %pOFn\n", node);
0432 return -EINVAL;
0433 }
0434
0435 scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name),
0436 rpmh_data->resource_name, pmic_id);
0437
0438 vreg->addr = cmd_db_read_addr(rpmh_resource_name);
0439 if (!vreg->addr) {
0440 dev_err(dev, "%pOFn: could not find RPMh address for resource %s\n",
0441 node, rpmh_resource_name);
0442 return -ENODEV;
0443 }
0444
0445 vreg->rdesc.name = rpmh_data->name;
0446 vreg->rdesc.supply_name = rpmh_data->supply_name;
0447 vreg->hw_data = rpmh_data->hw_data;
0448
0449 vreg->enabled = -EINVAL;
0450 vreg->voltage_selector = -ENOTRECOVERABLE;
0451 vreg->mode = REGULATOR_MODE_INVALID;
0452
0453 if (rpmh_data->hw_data->n_voltages) {
0454 vreg->rdesc.linear_ranges = &rpmh_data->hw_data->voltage_range;
0455 vreg->rdesc.n_linear_ranges = 1;
0456 vreg->rdesc.n_voltages = rpmh_data->hw_data->n_voltages;
0457 }
0458
0459 vreg->always_wait_for_ack = of_property_read_bool(node,
0460 "qcom,always-wait-for-ack");
0461
0462 vreg->rdesc.owner = THIS_MODULE;
0463 vreg->rdesc.type = REGULATOR_VOLTAGE;
0464 vreg->rdesc.ops = vreg->hw_data->ops;
0465 vreg->rdesc.of_map_mode = vreg->hw_data->of_map_mode;
0466
0467 init_data = of_get_regulator_init_data(dev, node, &vreg->rdesc);
0468 if (!init_data)
0469 return -ENOMEM;
0470
0471 if (rpmh_data->hw_data->regulator_type == XOB &&
0472 init_data->constraints.min_uV &&
0473 init_data->constraints.min_uV == init_data->constraints.max_uV) {
0474 vreg->rdesc.fixed_uV = init_data->constraints.min_uV;
0475 vreg->rdesc.n_voltages = 1;
0476 }
0477
0478 reg_config.dev = dev;
0479 reg_config.init_data = init_data;
0480 reg_config.of_node = node;
0481 reg_config.driver_data = vreg;
0482
0483 rdev = devm_regulator_register(dev, &vreg->rdesc, ®_config);
0484 if (IS_ERR(rdev)) {
0485 ret = PTR_ERR(rdev);
0486 dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n",
0487 node, ret);
0488 return ret;
0489 }
0490
0491 dev_dbg(dev, "%pOFn regulator registered for RPMh resource %s @ 0x%05X\n",
0492 node, rpmh_resource_name, vreg->addr);
0493
0494 return 0;
0495 }
0496
0497 static const int pmic_mode_map_pmic4_ldo[REGULATOR_MODE_STANDBY + 1] = {
0498 [REGULATOR_MODE_INVALID] = -EINVAL,
0499 [REGULATOR_MODE_STANDBY] = PMIC4_LDO_MODE_RETENTION,
0500 [REGULATOR_MODE_IDLE] = PMIC4_LDO_MODE_LPM,
0501 [REGULATOR_MODE_NORMAL] = PMIC4_LDO_MODE_HPM,
0502 [REGULATOR_MODE_FAST] = -EINVAL,
0503 };
0504
0505 static const int pmic_mode_map_pmic5_ldo[REGULATOR_MODE_STANDBY + 1] = {
0506 [REGULATOR_MODE_INVALID] = -EINVAL,
0507 [REGULATOR_MODE_STANDBY] = PMIC5_LDO_MODE_RETENTION,
0508 [REGULATOR_MODE_IDLE] = PMIC5_LDO_MODE_LPM,
0509 [REGULATOR_MODE_NORMAL] = PMIC5_LDO_MODE_HPM,
0510 [REGULATOR_MODE_FAST] = -EINVAL,
0511 };
0512
0513 static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode)
0514 {
0515 unsigned int mode;
0516
0517 switch (rpmh_mode) {
0518 case RPMH_REGULATOR_MODE_HPM:
0519 mode = REGULATOR_MODE_NORMAL;
0520 break;
0521 case RPMH_REGULATOR_MODE_LPM:
0522 mode = REGULATOR_MODE_IDLE;
0523 break;
0524 case RPMH_REGULATOR_MODE_RET:
0525 mode = REGULATOR_MODE_STANDBY;
0526 break;
0527 default:
0528 mode = REGULATOR_MODE_INVALID;
0529 break;
0530 }
0531
0532 return mode;
0533 }
0534
0535 static const int pmic_mode_map_pmic4_smps[REGULATOR_MODE_STANDBY + 1] = {
0536 [REGULATOR_MODE_INVALID] = -EINVAL,
0537 [REGULATOR_MODE_STANDBY] = PMIC4_SMPS_MODE_RETENTION,
0538 [REGULATOR_MODE_IDLE] = PMIC4_SMPS_MODE_PFM,
0539 [REGULATOR_MODE_NORMAL] = PMIC4_SMPS_MODE_AUTO,
0540 [REGULATOR_MODE_FAST] = PMIC4_SMPS_MODE_PWM,
0541 };
0542
0543 static const int pmic_mode_map_pmic5_smps[REGULATOR_MODE_STANDBY + 1] = {
0544 [REGULATOR_MODE_INVALID] = -EINVAL,
0545 [REGULATOR_MODE_STANDBY] = PMIC5_SMPS_MODE_RETENTION,
0546 [REGULATOR_MODE_IDLE] = PMIC5_SMPS_MODE_PFM,
0547 [REGULATOR_MODE_NORMAL] = PMIC5_SMPS_MODE_AUTO,
0548 [REGULATOR_MODE_FAST] = PMIC5_SMPS_MODE_PWM,
0549 };
0550
0551 static unsigned int
0552 rpmh_regulator_pmic4_smps_of_map_mode(unsigned int rpmh_mode)
0553 {
0554 unsigned int mode;
0555
0556 switch (rpmh_mode) {
0557 case RPMH_REGULATOR_MODE_HPM:
0558 mode = REGULATOR_MODE_FAST;
0559 break;
0560 case RPMH_REGULATOR_MODE_AUTO:
0561 mode = REGULATOR_MODE_NORMAL;
0562 break;
0563 case RPMH_REGULATOR_MODE_LPM:
0564 mode = REGULATOR_MODE_IDLE;
0565 break;
0566 case RPMH_REGULATOR_MODE_RET:
0567 mode = REGULATOR_MODE_STANDBY;
0568 break;
0569 default:
0570 mode = REGULATOR_MODE_INVALID;
0571 break;
0572 }
0573
0574 return mode;
0575 }
0576
0577 static const int pmic_mode_map_pmic4_bob[REGULATOR_MODE_STANDBY + 1] = {
0578 [REGULATOR_MODE_INVALID] = -EINVAL,
0579 [REGULATOR_MODE_STANDBY] = -EINVAL,
0580 [REGULATOR_MODE_IDLE] = PMIC4_BOB_MODE_PFM,
0581 [REGULATOR_MODE_NORMAL] = PMIC4_BOB_MODE_AUTO,
0582 [REGULATOR_MODE_FAST] = PMIC4_BOB_MODE_PWM,
0583 };
0584
0585 static const int pmic_mode_map_pmic5_bob[REGULATOR_MODE_STANDBY + 1] = {
0586 [REGULATOR_MODE_INVALID] = -EINVAL,
0587 [REGULATOR_MODE_STANDBY] = -EINVAL,
0588 [REGULATOR_MODE_IDLE] = PMIC5_BOB_MODE_PFM,
0589 [REGULATOR_MODE_NORMAL] = PMIC5_BOB_MODE_AUTO,
0590 [REGULATOR_MODE_FAST] = PMIC5_BOB_MODE_PWM,
0591 };
0592
0593 static unsigned int rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode)
0594 {
0595 unsigned int mode;
0596
0597 switch (rpmh_mode) {
0598 case RPMH_REGULATOR_MODE_HPM:
0599 mode = REGULATOR_MODE_FAST;
0600 break;
0601 case RPMH_REGULATOR_MODE_AUTO:
0602 mode = REGULATOR_MODE_NORMAL;
0603 break;
0604 case RPMH_REGULATOR_MODE_LPM:
0605 mode = REGULATOR_MODE_IDLE;
0606 break;
0607 default:
0608 mode = REGULATOR_MODE_INVALID;
0609 break;
0610 }
0611
0612 return mode;
0613 }
0614
0615 static const struct rpmh_vreg_hw_data pmic4_pldo = {
0616 .regulator_type = VRM,
0617 .ops = &rpmh_regulator_vrm_drms_ops,
0618 .voltage_range = REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
0619 .n_voltages = 256,
0620 .hpm_min_load_uA = 10000,
0621 .pmic_mode_map = pmic_mode_map_pmic4_ldo,
0622 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
0623 };
0624
0625 static const struct rpmh_vreg_hw_data pmic4_pldo_lv = {
0626 .regulator_type = VRM,
0627 .ops = &rpmh_regulator_vrm_drms_ops,
0628 .voltage_range = REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
0629 .n_voltages = 128,
0630 .hpm_min_load_uA = 10000,
0631 .pmic_mode_map = pmic_mode_map_pmic4_ldo,
0632 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
0633 };
0634
0635 static const struct rpmh_vreg_hw_data pmic4_nldo = {
0636 .regulator_type = VRM,
0637 .ops = &rpmh_regulator_vrm_drms_ops,
0638 .voltage_range = REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
0639 .n_voltages = 128,
0640 .hpm_min_load_uA = 30000,
0641 .pmic_mode_map = pmic_mode_map_pmic4_ldo,
0642 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
0643 };
0644
0645 static const struct rpmh_vreg_hw_data pmic4_hfsmps3 = {
0646 .regulator_type = VRM,
0647 .ops = &rpmh_regulator_vrm_ops,
0648 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
0649 .n_voltages = 216,
0650 .pmic_mode_map = pmic_mode_map_pmic4_smps,
0651 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
0652 };
0653
0654 static const struct rpmh_vreg_hw_data pmic4_ftsmps426 = {
0655 .regulator_type = VRM,
0656 .ops = &rpmh_regulator_vrm_ops,
0657 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
0658 .n_voltages = 259,
0659 .pmic_mode_map = pmic_mode_map_pmic4_smps,
0660 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
0661 };
0662
0663 static const struct rpmh_vreg_hw_data pmic4_bob = {
0664 .regulator_type = VRM,
0665 .ops = &rpmh_regulator_vrm_bypass_ops,
0666 .voltage_range = REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
0667 .n_voltages = 84,
0668 .pmic_mode_map = pmic_mode_map_pmic4_bob,
0669 .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
0670 };
0671
0672 static const struct rpmh_vreg_hw_data pmic4_lvs = {
0673 .regulator_type = XOB,
0674 .ops = &rpmh_regulator_xob_ops,
0675
0676 };
0677
0678 static const struct rpmh_vreg_hw_data pmic5_pldo = {
0679 .regulator_type = VRM,
0680 .ops = &rpmh_regulator_vrm_drms_ops,
0681 .voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
0682 .n_voltages = 256,
0683 .hpm_min_load_uA = 10000,
0684 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
0685 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
0686 };
0687
0688 static const struct rpmh_vreg_hw_data pmic5_pldo_lv = {
0689 .regulator_type = VRM,
0690 .ops = &rpmh_regulator_vrm_drms_ops,
0691 .voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
0692 .n_voltages = 63,
0693 .hpm_min_load_uA = 10000,
0694 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
0695 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
0696 };
0697
0698 static const struct rpmh_vreg_hw_data pmic5_nldo = {
0699 .regulator_type = VRM,
0700 .ops = &rpmh_regulator_vrm_drms_ops,
0701 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
0702 .n_voltages = 124,
0703 .hpm_min_load_uA = 30000,
0704 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
0705 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
0706 };
0707
0708 static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = {
0709 .regulator_type = VRM,
0710 .ops = &rpmh_regulator_vrm_ops,
0711 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
0712 .n_voltages = 216,
0713 .pmic_mode_map = pmic_mode_map_pmic5_smps,
0714 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
0715 };
0716
0717 static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = {
0718 .regulator_type = VRM,
0719 .ops = &rpmh_regulator_vrm_ops,
0720 .voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
0721 .n_voltages = 264,
0722 .pmic_mode_map = pmic_mode_map_pmic5_smps,
0723 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
0724 };
0725
0726 static const struct rpmh_vreg_hw_data pmic5_ftsmps520 = {
0727 .regulator_type = VRM,
0728 .ops = &rpmh_regulator_vrm_ops,
0729 .voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
0730 .n_voltages = 264,
0731 .pmic_mode_map = pmic_mode_map_pmic5_smps,
0732 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
0733 };
0734
0735 static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = {
0736 .regulator_type = VRM,
0737 .ops = &rpmh_regulator_vrm_ops,
0738 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000),
0739 .n_voltages = 236,
0740 .pmic_mode_map = pmic_mode_map_pmic5_smps,
0741 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
0742 };
0743
0744 static const struct rpmh_vreg_hw_data pmic5_hfsmps515_1 = {
0745 .regulator_type = VRM,
0746 .ops = &rpmh_regulator_vrm_ops,
0747 .voltage_range = REGULATOR_LINEAR_RANGE(900000, 0, 4, 16000),
0748 .n_voltages = 5,
0749 .pmic_mode_map = pmic_mode_map_pmic5_smps,
0750 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
0751 };
0752
0753 static const struct rpmh_vreg_hw_data pmic5_bob = {
0754 .regulator_type = VRM,
0755 .ops = &rpmh_regulator_vrm_bypass_ops,
0756 .voltage_range = REGULATOR_LINEAR_RANGE(3000000, 0, 31, 32000),
0757 .n_voltages = 32,
0758 .pmic_mode_map = pmic_mode_map_pmic5_bob,
0759 .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
0760 };
0761
0762 #define RPMH_VREG(_name, _resource_name, _hw_data, _supply_name) \
0763 { \
0764 .name = _name, \
0765 .resource_name = _resource_name, \
0766 .hw_data = _hw_data, \
0767 .supply_name = _supply_name, \
0768 }
0769
0770 static const struct rpmh_vreg_init_data pm8998_vreg_data[] = {
0771 RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
0772 RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
0773 RPMH_VREG("smps3", "smp%s3", &pmic4_hfsmps3, "vdd-s3"),
0774 RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"),
0775 RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"),
0776 RPMH_VREG("smps6", "smp%s6", &pmic4_ftsmps426, "vdd-s6"),
0777 RPMH_VREG("smps7", "smp%s7", &pmic4_ftsmps426, "vdd-s7"),
0778 RPMH_VREG("smps8", "smp%s8", &pmic4_ftsmps426, "vdd-s8"),
0779 RPMH_VREG("smps9", "smp%s9", &pmic4_ftsmps426, "vdd-s9"),
0780 RPMH_VREG("smps10", "smp%s10", &pmic4_ftsmps426, "vdd-s10"),
0781 RPMH_VREG("smps11", "smp%s11", &pmic4_ftsmps426, "vdd-s11"),
0782 RPMH_VREG("smps12", "smp%s12", &pmic4_ftsmps426, "vdd-s12"),
0783 RPMH_VREG("smps13", "smp%s13", &pmic4_ftsmps426, "vdd-s13"),
0784 RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l27"),
0785 RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l8-l17"),
0786 RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l3-l11"),
0787 RPMH_VREG("ldo4", "ldo%s4", &pmic4_nldo, "vdd-l4-l5"),
0788 RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l4-l5"),
0789 RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l6"),
0790 RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
0791 RPMH_VREG("ldo8", "ldo%s8", &pmic4_nldo, "vdd-l2-l8-l17"),
0792 RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo, "vdd-l9"),
0793 RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo, "vdd-l10-l23-l25"),
0794 RPMH_VREG("ldo11", "ldo%s11", &pmic4_nldo, "vdd-l3-l11"),
0795 RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
0796 RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo, "vdd-l13-l19-l21"),
0797 RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
0798 RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
0799 RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l16-l28"),
0800 RPMH_VREG("ldo17", "ldo%s17", &pmic4_nldo, "vdd-l2-l8-l17"),
0801 RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l18-l22"),
0802 RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l13-l19-l21"),
0803 RPMH_VREG("ldo20", "ldo%s20", &pmic4_pldo, "vdd-l20-l24"),
0804 RPMH_VREG("ldo21", "ldo%s21", &pmic4_pldo, "vdd-l13-l19-l21"),
0805 RPMH_VREG("ldo22", "ldo%s22", &pmic4_pldo, "vdd-l18-l22"),
0806 RPMH_VREG("ldo23", "ldo%s23", &pmic4_pldo, "vdd-l10-l23-l25"),
0807 RPMH_VREG("ldo24", "ldo%s24", &pmic4_pldo, "vdd-l20-l24"),
0808 RPMH_VREG("ldo25", "ldo%s25", &pmic4_pldo, "vdd-l10-l23-l25"),
0809 RPMH_VREG("ldo26", "ldo%s26", &pmic4_nldo, "vdd-l26"),
0810 RPMH_VREG("ldo27", "ldo%s27", &pmic4_nldo, "vdd-l1-l27"),
0811 RPMH_VREG("ldo28", "ldo%s28", &pmic4_pldo, "vdd-l16-l28"),
0812 RPMH_VREG("lvs1", "vs%s1", &pmic4_lvs, "vin-lvs-1-2"),
0813 RPMH_VREG("lvs2", "vs%s2", &pmic4_lvs, "vin-lvs-1-2"),
0814 {}
0815 };
0816
0817 static const struct rpmh_vreg_init_data pmg1110_vreg_data[] = {
0818 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
0819 {}
0820 };
0821
0822 static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = {
0823 RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"),
0824 {}
0825 };
0826
0827 static const struct rpmh_vreg_init_data pm8005_vreg_data[] = {
0828 RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
0829 RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
0830 RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"),
0831 RPMH_VREG("smps4", "smp%s4", &pmic4_ftsmps426, "vdd-s4"),
0832 {}
0833 };
0834
0835 static const struct rpmh_vreg_init_data pm8150_vreg_data[] = {
0836 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
0837 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
0838 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
0839 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
0840 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
0841 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
0842 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
0843 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
0844 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
0845 RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
0846 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"),
0847 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"),
0848 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
0849 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
0850 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
0851 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"),
0852 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l12-l14-l15"),
0853 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"),
0854 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"),
0855 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"),
0856 RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"),
0857 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
0858 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"),
0859 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
0860 RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
0861 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"),
0862 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"),
0863 RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
0864 {}
0865 };
0866
0867 static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = {
0868 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
0869 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
0870 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
0871 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
0872 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
0873 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
0874 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
0875 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
0876 RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"),
0877 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
0878 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
0879 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"),
0880 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"),
0881 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"),
0882 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"),
0883 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l1-l8"),
0884 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"),
0885 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"),
0886 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"),
0887 RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
0888 {}
0889 };
0890
0891 static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = {
0892 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
0893 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
0894 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
0895 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
0896 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
0897 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
0898 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
0899 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
0900 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
0901 RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
0902 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"),
0903 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"),
0904 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
0905 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
0906 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
0907 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"),
0908 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
0909 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"),
0910 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"),
0911 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"),
0912 RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"),
0913 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
0914 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"),
0915 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
0916 RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
0917 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"),
0918 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"),
0919 RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
0920 {}
0921 };
0922
0923 static const struct rpmh_vreg_init_data pm8350_vreg_data[] = {
0924 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
0925 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
0926 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
0927 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
0928 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
0929 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
0930 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
0931 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
0932 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
0933 RPMH_VREG("smps10", "smp%s10", &pmic5_hfsmps510, "vdd-s10"),
0934 RPMH_VREG("smps11", "smp%s11", &pmic5_hfsmps510, "vdd-s11"),
0935 RPMH_VREG("smps12", "smp%s12", &pmic5_hfsmps510, "vdd-s12"),
0936 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4"),
0937 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"),
0938 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l5"),
0939 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4"),
0940 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l5"),
0941 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"),
0942 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"),
0943 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"),
0944 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"),
0945 RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"),
0946 {}
0947 };
0948
0949 static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = {
0950 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps515, "vdd-s1"),
0951 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
0952 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
0953 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
0954 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
0955 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
0956 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
0957 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
0958 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
0959 RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
0960 RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l12"),
0961 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo_lv, "vdd-l2-l8"),
0962 RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
0963 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
0964 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
0965 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l9-l11"),
0966 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
0967 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l2-l8"),
0968 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l6-l9-l11"),
0969 RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l10"),
0970 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l6-l9-l11"),
0971 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l1-l12"),
0972 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
0973 RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
0974 {}
0975 };
0976
0977 static const struct rpmh_vreg_init_data pm8450_vreg_data[] = {
0978 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"),
0979 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
0980 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"),
0981 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"),
0982 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"),
0983 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"),
0984 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
0985 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
0986 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
0987 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"),
0988 {}
0989 };
0990
0991 static const struct rpmh_vreg_init_data pm8009_vreg_data[] = {
0992 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
0993 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515, "vdd-s2"),
0994 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
0995 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
0996 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
0997 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
0998 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
0999 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
1000 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"),
1001 {}
1002 };
1003
1004 static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = {
1005 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
1006 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515_1, "vdd-s2"),
1007 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
1008 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
1009 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
1010 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
1011 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
1012 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
1013 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"),
1014 {}
1015 };
1016
1017 static const struct rpmh_vreg_init_data pm6150_vreg_data[] = {
1018 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
1019 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
1020 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
1021 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
1022 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
1023 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
1024 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
1025 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
1026 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l7-l8"),
1027 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1028 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6"),
1029 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l4-l7-l8"),
1030 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l4-l7-l8"),
1031 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l9"),
1032 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
1033 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
1034 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
1035 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
1036 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
1037 RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
1038 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1039 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1040 RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1041 RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1042 {}
1043 };
1044
1045 static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = {
1046 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
1047 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
1048 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
1049 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
1050 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
1051 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
1052 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
1053 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
1054 RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"),
1055 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
1056 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
1057 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"),
1058 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"),
1059 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"),
1060 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"),
1061 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l1-l8"),
1062 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"),
1063 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"),
1064 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"),
1065 RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
1066 {}
1067 };
1068
1069 static const struct rpmh_vreg_init_data pm6350_vreg_data[] = {
1070 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, NULL),
1071 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, NULL),
1072
1073 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, NULL),
1074 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, NULL),
1075 RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, NULL),
1076 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, NULL),
1077 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, NULL),
1078 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, NULL),
1079 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, NULL),
1080 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, NULL),
1081 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, NULL),
1082 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, NULL),
1083 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, NULL),
1084 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo, NULL),
1085 RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, NULL),
1086 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, NULL),
1087 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, NULL),
1088 RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, NULL),
1089
1090 RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, NULL),
1091 RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, NULL),
1092 RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, NULL),
1093 RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, NULL),
1094 RPMH_VREG("ldo22", "ldo%s22", &pmic5_nldo, NULL),
1095 };
1096
1097 static const struct rpmh_vreg_init_data pmx55_vreg_data[] = {
1098 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
1099 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"),
1100 RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"),
1101 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
1102 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
1103 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
1104 RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"),
1105 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"),
1106 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"),
1107 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l9"),
1108 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l12"),
1109 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
1110 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
1111 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7-l8"),
1112 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l7-l8"),
1113 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l3-l9"),
1114 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10-l11-l13"),
1115 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l10-l11-l13"),
1116 RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l4-l12"),
1117 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l10-l11-l13"),
1118 RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"),
1119 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"),
1120 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l16"),
1121 {}
1122 };
1123
1124 static const struct rpmh_vreg_init_data pmx65_vreg_data[] = {
1125 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
1126 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"),
1127 RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"),
1128 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
1129 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
1130 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
1131 RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"),
1132 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
1133 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
1134 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l18"),
1135 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
1136 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
1137 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6-l16"),
1138 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6-l16"),
1139 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7"),
1140 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8-l9"),
1141 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l8-l9"),
1142 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10"),
1143 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l11-l13"),
1144 RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l12"),
1145 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l11-l13"),
1146 RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"),
1147 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"),
1148 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l6-l16"),
1149 RPMH_VREG("ldo17", "ldo%s17", &pmic5_nldo, "vdd-l17"),
1150
1151 RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, "vdd-l19"),
1152 RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, "vdd-l20"),
1153 RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, "vdd-l21"),
1154 {}
1155 };
1156
1157 static const struct rpmh_vreg_init_data pm7325_vreg_data[] = {
1158 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
1159 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
1160 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"),
1161 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"),
1162 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"),
1163 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"),
1164 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps520, "vdd-s7"),
1165 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
1166 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1167 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"),
1168 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
1169 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1170 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5"),
1171 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"),
1172 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"),
1173 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"),
1174 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"),
1175 RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"),
1176 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1177 RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1178 RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, "vdd-l13"),
1179 RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14-l16"),
1180 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1181 RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, "vdd-l14-l16"),
1182 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1183 RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1184 RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1185 {}
1186 };
1187
1188 static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = {
1189 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"),
1190 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
1191 RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"),
1192 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"),
1193 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"),
1194 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
1195 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"),
1196 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5-l6"),
1197 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l5-l6"),
1198 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-bob"),
1199 {}
1200 };
1201
1202 static int rpmh_regulator_probe(struct platform_device *pdev)
1203 {
1204 struct device *dev = &pdev->dev;
1205 const struct rpmh_vreg_init_data *vreg_data;
1206 struct device_node *node;
1207 struct rpmh_vreg *vreg;
1208 const char *pmic_id;
1209 int ret;
1210
1211 vreg_data = of_device_get_match_data(dev);
1212 if (!vreg_data)
1213 return -ENODEV;
1214
1215 ret = of_property_read_string(dev->of_node, "qcom,pmic-id", &pmic_id);
1216 if (ret < 0) {
1217 dev_err(dev, "qcom,pmic-id missing in DT node\n");
1218 return ret;
1219 }
1220
1221 for_each_available_child_of_node(dev->of_node, node) {
1222 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
1223 if (!vreg) {
1224 of_node_put(node);
1225 return -ENOMEM;
1226 }
1227
1228 ret = rpmh_regulator_init_vreg(vreg, dev, node, pmic_id,
1229 vreg_data);
1230 if (ret < 0) {
1231 of_node_put(node);
1232 return ret;
1233 }
1234 }
1235
1236 return 0;
1237 }
1238
1239 static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = {
1240 {
1241 .compatible = "qcom,pm8005-rpmh-regulators",
1242 .data = pm8005_vreg_data,
1243 },
1244 {
1245 .compatible = "qcom,pm8009-rpmh-regulators",
1246 .data = pm8009_vreg_data,
1247 },
1248 {
1249 .compatible = "qcom,pm8009-1-rpmh-regulators",
1250 .data = pm8009_1_vreg_data,
1251 },
1252 {
1253 .compatible = "qcom,pm8150-rpmh-regulators",
1254 .data = pm8150_vreg_data,
1255 },
1256 {
1257 .compatible = "qcom,pm8150l-rpmh-regulators",
1258 .data = pm8150l_vreg_data,
1259 },
1260 {
1261 .compatible = "qcom,pm8350-rpmh-regulators",
1262 .data = pm8350_vreg_data,
1263 },
1264 {
1265 .compatible = "qcom,pm8350c-rpmh-regulators",
1266 .data = pm8350c_vreg_data,
1267 },
1268 {
1269 .compatible = "qcom,pm8450-rpmh-regulators",
1270 .data = pm8450_vreg_data,
1271 },
1272 {
1273 .compatible = "qcom,pm8998-rpmh-regulators",
1274 .data = pm8998_vreg_data,
1275 },
1276 {
1277 .compatible = "qcom,pmg1110-rpmh-regulators",
1278 .data = pmg1110_vreg_data,
1279 },
1280 {
1281 .compatible = "qcom,pmi8998-rpmh-regulators",
1282 .data = pmi8998_vreg_data,
1283 },
1284 {
1285 .compatible = "qcom,pm6150-rpmh-regulators",
1286 .data = pm6150_vreg_data,
1287 },
1288 {
1289 .compatible = "qcom,pm6150l-rpmh-regulators",
1290 .data = pm6150l_vreg_data,
1291 },
1292 {
1293 .compatible = "qcom,pm6350-rpmh-regulators",
1294 .data = pm6350_vreg_data,
1295 },
1296 {
1297 .compatible = "qcom,pmc8180-rpmh-regulators",
1298 .data = pm8150_vreg_data,
1299 },
1300 {
1301 .compatible = "qcom,pmc8180c-rpmh-regulators",
1302 .data = pm8150l_vreg_data,
1303 },
1304 {
1305 .compatible = "qcom,pmm8155au-rpmh-regulators",
1306 .data = pmm8155au_vreg_data,
1307 },
1308 {
1309 .compatible = "qcom,pmx55-rpmh-regulators",
1310 .data = pmx55_vreg_data,
1311 },
1312 {
1313 .compatible = "qcom,pmx65-rpmh-regulators",
1314 .data = pmx65_vreg_data,
1315 },
1316 {
1317 .compatible = "qcom,pm7325-rpmh-regulators",
1318 .data = pm7325_vreg_data,
1319 },
1320 {
1321 .compatible = "qcom,pmr735a-rpmh-regulators",
1322 .data = pmr735a_vreg_data,
1323 },
1324 {}
1325 };
1326 MODULE_DEVICE_TABLE(of, rpmh_regulator_match_table);
1327
1328 static struct platform_driver rpmh_regulator_driver = {
1329 .driver = {
1330 .name = "qcom-rpmh-regulator",
1331 .of_match_table = of_match_ptr(rpmh_regulator_match_table),
1332 },
1333 .probe = rpmh_regulator_probe,
1334 };
1335 module_platform_driver(rpmh_regulator_driver);
1336
1337 MODULE_DESCRIPTION("Qualcomm RPMh regulator driver");
1338 MODULE_LICENSE("GPL v2");