drivers/regulator/mt6380-regulator.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // Copyright (c) 2017 MediaTek Inc.
0004 // Author: Chenglin Xu <chenglin.xu@mediatek.com>
0005
0006 #include <linux/module.h>
0007 #include <linux/of.h>
0008 #include <linux/platform_device.h>
0009 #include <linux/regmap.h>
0010 #include <linux/regulator/driver.h>
0011 #include <linux/regulator/machine.h>
0012 #include <linux/regulator/mt6380-regulator.h>
0013 #include <linux/regulator/of_regulator.h>
0014
0015 /* PMIC Registers */
0016 #define MT6380_ALDO_CON_0                         0x0000
0017 #define MT6380_BTLDO_CON_0                        0x0004
0018 #define MT6380_COMP_CON_0                         0x0008
0019 #define MT6380_CPUBUCK_CON_0                      0x000C
0020 #define MT6380_CPUBUCK_CON_1                      0x0010
0021 #define MT6380_CPUBUCK_CON_2                      0x0014
0022 #define MT6380_DDRLDO_CON_0                       0x0018
0023 #define MT6380_MLDO_CON_0                         0x001C
0024 #define MT6380_PALDO_CON_0                        0x0020
0025 #define MT6380_PHYLDO_CON_0                       0x0024
0026 #define MT6380_SIDO_CON_0                         0x0028
0027 #define MT6380_SIDO_CON_1                         0x002C
0028 #define MT6380_SIDO_CON_2                         0x0030
0029 #define MT6380_SLDO_CON_0                         0x0034
0030 #define MT6380_TLDO_CON_0                         0x0038
0031 #define MT6380_STARTUP_CON_0                      0x003C
0032 #define MT6380_STARTUP_CON_1                      0x0040
0033 #define MT6380_SMPS_TOP_CON_0                     0x0044
0034 #define MT6380_SMPS_TOP_CON_1                     0x0048
0035 #define MT6380_ANA_CTRL_0                         0x0050
0036 #define MT6380_ANA_CTRL_1                         0x0054
0037 #define MT6380_ANA_CTRL_2                         0x0058
0038 #define MT6380_ANA_CTRL_3                         0x005C
0039 #define MT6380_ANA_CTRL_4                         0x0060
0040 #define MT6380_SPK_CON9                           0x0064
0041 #define MT6380_SPK_CON11                          0x0068
0042 #define MT6380_SPK_CON12                          0x006A
0043 #define MT6380_CLK_CTRL                           0x0070
0044 #define MT6380_PINMUX_CTRL                        0x0074
0045 #define MT6380_IO_CTRL                            0x0078
0046 #define MT6380_SLP_MODE_CTRL_0                    0x007C
0047 #define MT6380_SLP_MODE_CTRL_1                    0x0080
0048 #define MT6380_SLP_MODE_CTRL_2                    0x0084
0049 #define MT6380_SLP_MODE_CTRL_3                    0x0088
0050 #define MT6380_SLP_MODE_CTRL_4                    0x008C
0051 #define MT6380_SLP_MODE_CTRL_5                    0x0090
0052 #define MT6380_SLP_MODE_CTRL_6                    0x0094
0053 #define MT6380_SLP_MODE_CTRL_7                    0x0098
0054 #define MT6380_SLP_MODE_CTRL_8                    0x009C
0055 #define MT6380_FCAL_CTRL_0                        0x00A0
0056 #define MT6380_FCAL_CTRL_1                        0x00A4
0057 #define MT6380_LDO_CTRL_0                         0x00A8
0058 #define MT6380_LDO_CTRL_1                         0x00AC
0059 #define MT6380_LDO_CTRL_2                         0x00B0
0060 #define MT6380_LDO_CTRL_3                         0x00B4
0061 #define MT6380_LDO_CTRL_4                         0x00B8
0062 #define MT6380_DEBUG_CTRL_0                       0x00BC
0063 #define MT6380_EFU_CTRL_0                         0x0200
0064 #define MT6380_EFU_CTRL_1                         0x0201
0065 #define MT6380_EFU_CTRL_2                         0x0202
0066 #define MT6380_EFU_CTRL_3                         0x0203
0067 #define MT6380_EFU_CTRL_4                         0x0204
0068 #define MT6380_EFU_CTRL_5                         0x0205
0069 #define MT6380_EFU_CTRL_6                         0x0206
0070 #define MT6380_EFU_CTRL_7                         0x0207
0071 #define MT6380_EFU_CTRL_8                         0x0208
0072
0073 #define MT6380_REGULATOR_MODE_AUTO  0
0074 #define MT6380_REGULATOR_MODE_FORCE_PWM 1
0075
0076 /*
0077  * mt6380 regulators' information
0078  *
0079  * @desc: standard fields of regulator description
0080  * @vselon_reg: Register sections for hardware control mode of bucks
0081  * @modeset_reg: Register for controlling the buck/LDO control mode
0082  * @modeset_mask: Mask for controlling the buck/LDO control mode
0083  */
0084 struct mt6380_regulator_info {
0085     struct regulator_desc desc;
0086     u32 vselon_reg;
0087     u32 modeset_reg;
0088     u32 modeset_mask;
0089 };
0090
0091 #define MT6380_BUCK(match, vreg, min, max, step, volt_ranges, enreg,    \
0092             vosel, vosel_mask, enbit, voselon, _modeset_reg,    \
0093             _modeset_mask)                  \
0094 [MT6380_ID_##vreg] = {                          \
0095     .desc = {                           \
0096         .name = #vreg,                      \
0097         .of_match = of_match_ptr(match),            \
0098         .ops = &mt6380_volt_range_ops,              \
0099         .type = REGULATOR_VOLTAGE,              \
0100         .id = MT6380_ID_##vreg,                 \
0101         .owner = THIS_MODULE,                   \
0102         .n_voltages = ((max) - (min)) / (step) + 1,     \
0103         .linear_ranges = volt_ranges,               \
0104         .n_linear_ranges = ARRAY_SIZE(volt_ranges),     \
0105         .vsel_reg = vosel,                  \
0106         .vsel_mask = vosel_mask,                \
0107         .enable_reg = enreg,                    \
0108         .enable_mask = BIT(enbit),              \
0109     },                              \
0110     .vselon_reg = voselon,                      \
0111     .modeset_reg = _modeset_reg,                    \
0112     .modeset_mask = _modeset_mask,                  \
0113 }
0114
0115 #define MT6380_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel,    \
0116            vosel_mask, _modeset_reg, _modeset_mask)     \
0117 [MT6380_ID_##vreg] = {                          \
0118     .desc = {                           \
0119         .name = #vreg,                      \
0120         .of_match = of_match_ptr(match),            \
0121         .ops = &mt6380_volt_table_ops,              \
0122         .type = REGULATOR_VOLTAGE,              \
0123         .id = MT6380_ID_##vreg,                 \
0124         .owner = THIS_MODULE,                   \
0125         .n_voltages = ARRAY_SIZE(ldo_volt_table),       \
0126         .volt_table = ldo_volt_table,               \
0127         .vsel_reg = vosel,                  \
0128         .vsel_mask = vosel_mask,                \
0129         .enable_reg = enreg,                    \
0130         .enable_mask = BIT(enbit),              \
0131     },                              \
0132     .modeset_reg = _modeset_reg,                    \
0133     .modeset_mask = _modeset_mask,                  \
0134 }
0135
0136 #define MT6380_REG_FIXED(match, vreg, enreg, enbit, volt,       \
0137              _modeset_reg, _modeset_mask)           \
0138 [MT6380_ID_##vreg] = {                          \
0139     .desc = {                           \
0140         .name = #vreg,                      \
0141         .of_match = of_match_ptr(match),            \
0142         .ops = &mt6380_volt_fixed_ops,              \
0143         .type = REGULATOR_VOLTAGE,              \
0144         .id = MT6380_ID_##vreg,                 \
0145         .owner = THIS_MODULE,                   \
0146         .n_voltages = 1,                    \
0147         .enable_reg = enreg,                    \
0148         .enable_mask = BIT(enbit),              \
0149         .min_uV = volt,                     \
0150     },                              \
0151     .modeset_reg = _modeset_reg,                    \
0152     .modeset_mask = _modeset_mask,                  \
0153 }
0154
0155 static const struct linear_range buck_volt_range1[] = {
0156     REGULATOR_LINEAR_RANGE(600000, 0, 0xfe, 6250),
0157 };
0158
0159 static const struct linear_range buck_volt_range2[] = {
0160     REGULATOR_LINEAR_RANGE(600000, 0, 0xfe, 6250),
0161 };
0162
0163 static const struct linear_range buck_volt_range3[] = {
0164     REGULATOR_LINEAR_RANGE(1200000, 0, 0x3c, 25000),
0165 };
0166
0167 static const unsigned int ldo_volt_table1[] = {
0168     1400000, 1350000, 1300000, 1250000, 1200000, 1150000, 1100000, 1050000,
0169 };
0170
0171 static const unsigned int ldo_volt_table2[] = {
0172     2200000, 3300000,
0173 };
0174
0175 static const unsigned int ldo_volt_table3[] = {
0176     1240000, 1390000, 1540000, 1840000,
0177 };
0178
0179 static const unsigned int ldo_volt_table4[] = {
0180     2200000, 3300000,
0181 };
0182
0183 static int mt6380_regulator_set_mode(struct regulator_dev *rdev,
0184                      unsigned int mode)
0185 {
0186     int val = 0;
0187     struct mt6380_regulator_info *info = rdev_get_drvdata(rdev);
0188
0189     switch (mode) {
0190     case REGULATOR_MODE_NORMAL:
0191         val = MT6380_REGULATOR_MODE_AUTO;
0192         break;
0193     case REGULATOR_MODE_FAST:
0194         val = MT6380_REGULATOR_MODE_FORCE_PWM;
0195         break;
0196     default:
0197         return -EINVAL;
0198     }
0199
0200     val <<= ffs(info->modeset_mask) - 1;
0201
0202     return regmap_update_bits(rdev->regmap, info->modeset_reg,
0203                  info->modeset_mask, val);
0204 }
0205
0206 static unsigned int mt6380_regulator_get_mode(struct regulator_dev *rdev)
0207 {
0208     unsigned int val;
0209     unsigned int mode;
0210     int ret;
0211     struct mt6380_regulator_info *info = rdev_get_drvdata(rdev);
0212
0213     ret = regmap_read(rdev->regmap, info->modeset_reg, &val);
0214     if (ret < 0)
0215         return ret;
0216
0217     val &= info->modeset_mask;
0218     val >>= ffs(info->modeset_mask) - 1;
0219
0220     switch (val) {
0221     case MT6380_REGULATOR_MODE_AUTO:
0222         mode = REGULATOR_MODE_NORMAL;
0223         break;
0224     case MT6380_REGULATOR_MODE_FORCE_PWM:
0225         mode = REGULATOR_MODE_FAST;
0226         break;
0227     default:
0228         return -EINVAL;
0229     }
0230
0231     return mode;
0232 }
0233
0234 static const struct regulator_ops mt6380_volt_range_ops = {
0235     .list_voltage = regulator_list_voltage_linear_range,
0236     .map_voltage = regulator_map_voltage_linear_range,
0237     .set_voltage_sel = regulator_set_voltage_sel_regmap,
0238     .get_voltage_sel = regulator_get_voltage_sel_regmap,
0239     .set_voltage_time_sel = regulator_set_voltage_time_sel,
0240     .enable = regulator_enable_regmap,
0241     .disable = regulator_disable_regmap,
0242     .is_enabled = regulator_is_enabled_regmap,
0243     .set_mode = mt6380_regulator_set_mode,
0244     .get_mode = mt6380_regulator_get_mode,
0245 };
0246
0247 static const struct regulator_ops mt6380_volt_table_ops = {
0248     .list_voltage = regulator_list_voltage_table,
0249     .map_voltage = regulator_map_voltage_iterate,
0250     .set_voltage_sel = regulator_set_voltage_sel_regmap,
0251     .get_voltage_sel = regulator_get_voltage_sel_regmap,
0252     .set_voltage_time_sel = regulator_set_voltage_time_sel,
0253     .enable = regulator_enable_regmap,
0254     .disable = regulator_disable_regmap,
0255     .is_enabled = regulator_is_enabled_regmap,
0256     .set_mode = mt6380_regulator_set_mode,
0257     .get_mode = mt6380_regulator_get_mode,
0258 };
0259
0260 static const struct regulator_ops mt6380_volt_fixed_ops = {
0261     .list_voltage = regulator_list_voltage_linear,
0262     .enable = regulator_enable_regmap,
0263     .disable = regulator_disable_regmap,
0264     .is_enabled = regulator_is_enabled_regmap,
0265     .set_mode = mt6380_regulator_set_mode,
0266     .get_mode = mt6380_regulator_get_mode,
0267 };
0268
0269 /* The array is indexed by id(MT6380_ID_XXX) */
0270 static struct mt6380_regulator_info mt6380_regulators[] = {
0271     MT6380_BUCK("buck-vcore1", VCPU, 600000, 1393750, 6250,
0272             buck_volt_range1, MT6380_ANA_CTRL_3, MT6380_ANA_CTRL_1,
0273             0xfe, 3, MT6380_ANA_CTRL_1,
0274             MT6380_CPUBUCK_CON_0, 0x8000000),
0275     MT6380_BUCK("buck-vcore", VCORE, 600000, 1393750, 6250,
0276             buck_volt_range2, MT6380_ANA_CTRL_3, MT6380_ANA_CTRL_2,
0277             0xfe, 2, MT6380_ANA_CTRL_2, MT6380_SIDO_CON_0, 0x1000000),
0278     MT6380_BUCK("buck-vrf", VRF, 1200000, 1575000, 25000,
0279             buck_volt_range3, MT6380_ANA_CTRL_3, MT6380_SIDO_CON_0,
0280             0x78, 1, MT6380_SIDO_CON_0, MT6380_SIDO_CON_0, 0x8000),
0281     MT6380_LDO("ldo-vm", VMLDO, ldo_volt_table1, MT6380_LDO_CTRL_0,
0282            1, MT6380_MLDO_CON_0, 0xE000, MT6380_ANA_CTRL_1, 0x4000000),
0283     MT6380_LDO("ldo-va", VALDO, ldo_volt_table2, MT6380_LDO_CTRL_0,
0284            2, MT6380_ALDO_CON_0, 0x400, MT6380_ALDO_CON_0, 0x20),
0285     MT6380_REG_FIXED("ldo-vphy", VPHYLDO, MT6380_LDO_CTRL_0, 7, 1800000,
0286              MT6380_PHYLDO_CON_0, 0x80),
0287     MT6380_LDO("ldo-vddr", VDDRLDO, ldo_volt_table3, MT6380_LDO_CTRL_0,
0288            8, MT6380_DDRLDO_CON_0, 0x3000, MT6380_DDRLDO_CON_0, 0x80),
0289     MT6380_LDO("ldo-vt", VTLDO, ldo_volt_table4, MT6380_LDO_CTRL_0, 3,
0290            MT6380_TLDO_CON_0, 0x400, MT6380_TLDO_CON_0, 0x20),
0291 };
0292
0293 static int mt6380_regulator_probe(struct platform_device *pdev)
0294 {
0295     struct regmap *regmap = dev_get_regmap(pdev->dev.parent, NULL);
0296     struct regulator_config config = {};
0297     struct regulator_dev *rdev;
0298     int i;
0299
0300     for (i = 0; i < MT6380_MAX_REGULATOR; i++) {
0301         config.dev = &pdev->dev;
0302         config.driver_data = &mt6380_regulators[i];
0303         config.regmap = regmap;
0304         rdev = devm_regulator_register(&pdev->dev,
0305                            &mt6380_regulators[i].desc,
0306                 &config);
0307         if (IS_ERR(rdev)) {
0308             dev_err(&pdev->dev, "failed to register %s\n",
0309                 mt6380_regulators[i].desc.name);
0310             return PTR_ERR(rdev);
0311         }
0312     }
0313     return 0;
0314 }
0315
0316 static const struct platform_device_id mt6380_platform_ids[] = {
0317     {"mt6380-regulator", 0},
0318     { /* sentinel */ },
0319 };
0320 MODULE_DEVICE_TABLE(platform, mt6380_platform_ids);
0321
0322 static const struct of_device_id  __maybe_unused mt6380_of_match[] = {
0323     { .compatible = "mediatek,mt6380-regulator", },
0324     { /* sentinel */ },
0325 };
0326 MODULE_DEVICE_TABLE(of, mt6380_of_match);
0327
0328 static struct platform_driver mt6380_regulator_driver = {
0329     .driver = {
0330         .name = "mt6380-regulator",
0331         .of_match_table = of_match_ptr(mt6380_of_match),
0332     },
0333     .probe = mt6380_regulator_probe,
0334     .id_table = mt6380_platform_ids,
0335 };
0336
0337 module_platform_driver(mt6380_regulator_driver);
0338
0339 MODULE_AUTHOR("Chenglin Xu <chenglin.xu@mediatek.com>");
0340 MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6380 PMIC");
0341 MODULE_LICENSE("GPL v2");