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0007 #include <linux/init.h>
0008 #include <linux/kernel.h>
0009 #include <linux/module.h>
0010 #include <linux/of.h>
0011 #include <linux/platform_device.h>
0012 #include <linux/regmap.h>
0013 #include <linux/regulator/driver.h>
0014 #include <linux/regulator/machine.h>
0015
0016 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
0017
0018 enum {
0019 MT6360_REGULATOR_BUCK1 = 0,
0020 MT6360_REGULATOR_BUCK2,
0021 MT6360_REGULATOR_LDO6,
0022 MT6360_REGULATOR_LDO7,
0023 MT6360_REGULATOR_LDO1,
0024 MT6360_REGULATOR_LDO2,
0025 MT6360_REGULATOR_LDO3,
0026 MT6360_REGULATOR_LDO5,
0027 MT6360_REGULATOR_MAX,
0028 };
0029
0030 struct mt6360_irq_mapping {
0031 const char *name;
0032 irq_handler_t handler;
0033 };
0034
0035 struct mt6360_regulator_desc {
0036 const struct regulator_desc desc;
0037 unsigned int mode_reg;
0038 unsigned int mode_mask;
0039 unsigned int state_reg;
0040 unsigned int state_mask;
0041 const struct mt6360_irq_mapping *irq_tables;
0042 int irq_table_size;
0043 };
0044
0045 struct mt6360_regulator_data {
0046 struct device *dev;
0047 struct regmap *regmap;
0048 };
0049
0050 static irqreturn_t mt6360_pgb_event_handler(int irq, void *data)
0051 {
0052 struct regulator_dev *rdev = data;
0053
0054 regulator_notifier_call_chain(rdev, REGULATOR_EVENT_FAIL, NULL);
0055 return IRQ_HANDLED;
0056 }
0057
0058 static irqreturn_t mt6360_oc_event_handler(int irq, void *data)
0059 {
0060 struct regulator_dev *rdev = data;
0061
0062 regulator_notifier_call_chain(rdev, REGULATOR_EVENT_OVER_CURRENT, NULL);
0063 return IRQ_HANDLED;
0064 }
0065
0066 static irqreturn_t mt6360_ov_event_handler(int irq, void *data)
0067 {
0068 struct regulator_dev *rdev = data;
0069
0070 regulator_notifier_call_chain(rdev, REGULATOR_EVENT_REGULATION_OUT, NULL);
0071 return IRQ_HANDLED;
0072 }
0073
0074 static irqreturn_t mt6360_uv_event_handler(int irq, void *data)
0075 {
0076 struct regulator_dev *rdev = data;
0077
0078 regulator_notifier_call_chain(rdev, REGULATOR_EVENT_UNDER_VOLTAGE, NULL);
0079 return IRQ_HANDLED;
0080 }
0081
0082 static const struct mt6360_irq_mapping buck1_irq_tbls[] = {
0083 { "buck1_pgb_evt", mt6360_pgb_event_handler },
0084 { "buck1_oc_evt", mt6360_oc_event_handler },
0085 { "buck1_ov_evt", mt6360_ov_event_handler },
0086 { "buck1_uv_evt", mt6360_uv_event_handler },
0087 };
0088
0089 static const struct mt6360_irq_mapping buck2_irq_tbls[] = {
0090 { "buck2_pgb_evt", mt6360_pgb_event_handler },
0091 { "buck2_oc_evt", mt6360_oc_event_handler },
0092 { "buck2_ov_evt", mt6360_ov_event_handler },
0093 { "buck2_uv_evt", mt6360_uv_event_handler },
0094 };
0095
0096 static const struct mt6360_irq_mapping ldo6_irq_tbls[] = {
0097 { "ldo6_pgb_evt", mt6360_pgb_event_handler },
0098 { "ldo6_oc_evt", mt6360_oc_event_handler },
0099 };
0100
0101 static const struct mt6360_irq_mapping ldo7_irq_tbls[] = {
0102 { "ldo7_pgb_evt", mt6360_pgb_event_handler },
0103 { "ldo7_oc_evt", mt6360_oc_event_handler },
0104 };
0105
0106 static const struct mt6360_irq_mapping ldo1_irq_tbls[] = {
0107 { "ldo1_pgb_evt", mt6360_pgb_event_handler },
0108 { "ldo1_oc_evt", mt6360_oc_event_handler },
0109 };
0110
0111 static const struct mt6360_irq_mapping ldo2_irq_tbls[] = {
0112 { "ldo2_pgb_evt", mt6360_pgb_event_handler },
0113 { "ldo2_oc_evt", mt6360_oc_event_handler },
0114 };
0115
0116 static const struct mt6360_irq_mapping ldo3_irq_tbls[] = {
0117 { "ldo3_pgb_evt", mt6360_pgb_event_handler },
0118 { "ldo3_oc_evt", mt6360_oc_event_handler },
0119 };
0120
0121 static const struct mt6360_irq_mapping ldo5_irq_tbls[] = {
0122 { "ldo5_pgb_evt", mt6360_pgb_event_handler },
0123 { "ldo5_oc_evt", mt6360_oc_event_handler },
0124 };
0125
0126 static const struct linear_range buck_vout_ranges[] = {
0127 REGULATOR_LINEAR_RANGE(300000, 0x00, 0xc7, 5000),
0128 REGULATOR_LINEAR_RANGE(1300000, 0xc8, 0xff, 0),
0129 };
0130
0131 static const struct linear_range ldo_vout_ranges1[] = {
0132 REGULATOR_LINEAR_RANGE(500000, 0x00, 0x09, 10000),
0133 REGULATOR_LINEAR_RANGE(600000, 0x0a, 0x10, 0),
0134 REGULATOR_LINEAR_RANGE(610000, 0x11, 0x19, 10000),
0135 REGULATOR_LINEAR_RANGE(700000, 0x1a, 0x20, 0),
0136 REGULATOR_LINEAR_RANGE(710000, 0x21, 0x29, 10000),
0137 REGULATOR_LINEAR_RANGE(800000, 0x2a, 0x30, 0),
0138 REGULATOR_LINEAR_RANGE(810000, 0x31, 0x39, 10000),
0139 REGULATOR_LINEAR_RANGE(900000, 0x3a, 0x40, 0),
0140 REGULATOR_LINEAR_RANGE(910000, 0x41, 0x49, 10000),
0141 REGULATOR_LINEAR_RANGE(1000000, 0x4a, 0x50, 0),
0142 REGULATOR_LINEAR_RANGE(1010000, 0x51, 0x59, 10000),
0143 REGULATOR_LINEAR_RANGE(1100000, 0x5a, 0x60, 0),
0144 REGULATOR_LINEAR_RANGE(1110000, 0x61, 0x69, 10000),
0145 REGULATOR_LINEAR_RANGE(1200000, 0x6a, 0x70, 0),
0146 REGULATOR_LINEAR_RANGE(1210000, 0x71, 0x79, 10000),
0147 REGULATOR_LINEAR_RANGE(1300000, 0x7a, 0x80, 0),
0148 REGULATOR_LINEAR_RANGE(1310000, 0x81, 0x89, 10000),
0149 REGULATOR_LINEAR_RANGE(1400000, 0x8a, 0x90, 0),
0150 REGULATOR_LINEAR_RANGE(1410000, 0x91, 0x99, 10000),
0151 REGULATOR_LINEAR_RANGE(1500000, 0x9a, 0xa0, 0),
0152 REGULATOR_LINEAR_RANGE(1510000, 0xa1, 0xa9, 10000),
0153 REGULATOR_LINEAR_RANGE(1600000, 0xaa, 0xb0, 0),
0154 REGULATOR_LINEAR_RANGE(1610000, 0xb1, 0xb9, 10000),
0155 REGULATOR_LINEAR_RANGE(1700000, 0xba, 0xc0, 0),
0156 REGULATOR_LINEAR_RANGE(1710000, 0xc1, 0xc9, 10000),
0157 REGULATOR_LINEAR_RANGE(1800000, 0xca, 0xd0, 0),
0158 REGULATOR_LINEAR_RANGE(1810000, 0xd1, 0xd9, 10000),
0159 REGULATOR_LINEAR_RANGE(1900000, 0xda, 0xe0, 0),
0160 REGULATOR_LINEAR_RANGE(1910000, 0xe1, 0xe9, 10000),
0161 REGULATOR_LINEAR_RANGE(2000000, 0xea, 0xf0, 0),
0162 REGULATOR_LINEAR_RANGE(2010000, 0xf1, 0xf9, 10000),
0163 REGULATOR_LINEAR_RANGE(2100000, 0xfa, 0xff, 0),
0164 };
0165
0166 static const struct linear_range ldo_vout_ranges2[] = {
0167 REGULATOR_LINEAR_RANGE(1200000, 0x00, 0x09, 10000),
0168 REGULATOR_LINEAR_RANGE(1300000, 0x0a, 0x10, 0),
0169 REGULATOR_LINEAR_RANGE(1310000, 0x11, 0x19, 10000),
0170 REGULATOR_LINEAR_RANGE(1400000, 0x1a, 0x1f, 0),
0171 REGULATOR_LINEAR_RANGE(1500000, 0x20, 0x29, 10000),
0172 REGULATOR_LINEAR_RANGE(1600000, 0x2a, 0x2f, 0),
0173 REGULATOR_LINEAR_RANGE(1700000, 0x30, 0x39, 10000),
0174 REGULATOR_LINEAR_RANGE(1800000, 0x3a, 0x40, 0),
0175 REGULATOR_LINEAR_RANGE(1810000, 0x41, 0x49, 10000),
0176 REGULATOR_LINEAR_RANGE(1900000, 0x4a, 0x4f, 0),
0177 REGULATOR_LINEAR_RANGE(2000000, 0x50, 0x59, 10000),
0178 REGULATOR_LINEAR_RANGE(2100000, 0x5a, 0x60, 0),
0179 REGULATOR_LINEAR_RANGE(2110000, 0x61, 0x69, 10000),
0180 REGULATOR_LINEAR_RANGE(2200000, 0x6a, 0x6f, 0),
0181 REGULATOR_LINEAR_RANGE(2500000, 0x70, 0x79, 10000),
0182 REGULATOR_LINEAR_RANGE(2600000, 0x7a, 0x7f, 0),
0183 REGULATOR_LINEAR_RANGE(2700000, 0x80, 0x89, 10000),
0184 REGULATOR_LINEAR_RANGE(2800000, 0x8a, 0x90, 0),
0185 REGULATOR_LINEAR_RANGE(2810000, 0x91, 0x99, 10000),
0186 REGULATOR_LINEAR_RANGE(2900000, 0x9a, 0xa0, 0),
0187 REGULATOR_LINEAR_RANGE(2910000, 0xa1, 0xa9, 10000),
0188 REGULATOR_LINEAR_RANGE(3000000, 0xaa, 0xb0, 0),
0189 REGULATOR_LINEAR_RANGE(3010000, 0xb1, 0xb9, 10000),
0190 REGULATOR_LINEAR_RANGE(3100000, 0xba, 0xc0, 0),
0191 REGULATOR_LINEAR_RANGE(3110000, 0xc1, 0xc9, 10000),
0192 REGULATOR_LINEAR_RANGE(3200000, 0xca, 0xcf, 0),
0193 REGULATOR_LINEAR_RANGE(3300000, 0xd0, 0xd9, 10000),
0194 REGULATOR_LINEAR_RANGE(3400000, 0xda, 0xe0, 0),
0195 REGULATOR_LINEAR_RANGE(3410000, 0xe1, 0xe9, 10000),
0196 REGULATOR_LINEAR_RANGE(3500000, 0xea, 0xf0, 0),
0197 REGULATOR_LINEAR_RANGE(3510000, 0xf1, 0xf9, 10000),
0198 REGULATOR_LINEAR_RANGE(3600000, 0xfa, 0xff, 0),
0199 };
0200
0201 static const struct linear_range ldo_vout_ranges3[] = {
0202 REGULATOR_LINEAR_RANGE(2700000, 0x00, 0x09, 10000),
0203 REGULATOR_LINEAR_RANGE(2800000, 0x0a, 0x10, 0),
0204 REGULATOR_LINEAR_RANGE(2810000, 0x11, 0x19, 10000),
0205 REGULATOR_LINEAR_RANGE(2900000, 0x1a, 0x20, 0),
0206 REGULATOR_LINEAR_RANGE(2910000, 0x21, 0x29, 10000),
0207 REGULATOR_LINEAR_RANGE(3000000, 0x2a, 0x30, 0),
0208 REGULATOR_LINEAR_RANGE(3010000, 0x31, 0x39, 10000),
0209 REGULATOR_LINEAR_RANGE(3100000, 0x3a, 0x40, 0),
0210 REGULATOR_LINEAR_RANGE(3110000, 0x41, 0x49, 10000),
0211 REGULATOR_LINEAR_RANGE(3200000, 0x4a, 0x4f, 0),
0212 REGULATOR_LINEAR_RANGE(3300000, 0x50, 0x59, 10000),
0213 REGULATOR_LINEAR_RANGE(3400000, 0x5a, 0x60, 0),
0214 REGULATOR_LINEAR_RANGE(3410000, 0x61, 0x69, 10000),
0215 REGULATOR_LINEAR_RANGE(3500000, 0x6a, 0x70, 0),
0216 REGULATOR_LINEAR_RANGE(3510000, 0x71, 0x79, 10000),
0217 REGULATOR_LINEAR_RANGE(3600000, 0x7a, 0x7f, 0),
0218 };
0219
0220 static int mt6360_regulator_set_mode(struct regulator_dev *rdev,
0221 unsigned int mode)
0222 {
0223 const struct mt6360_regulator_desc *rdesc = (struct mt6360_regulator_desc *)rdev->desc;
0224 struct regmap *regmap = rdev_get_regmap(rdev);
0225 int shift = ffs(rdesc->mode_mask) - 1;
0226 unsigned int val;
0227 int ret;
0228
0229 switch (mode) {
0230 case REGULATOR_MODE_NORMAL:
0231 val = MT6360_OPMODE_NORMAL;
0232 break;
0233 case REGULATOR_MODE_STANDBY:
0234 val = MT6360_OPMODE_ULP;
0235 break;
0236 case REGULATOR_MODE_IDLE:
0237 val = MT6360_OPMODE_LP;
0238 break;
0239 default:
0240 return -EINVAL;
0241 }
0242
0243 ret = regmap_update_bits(regmap, rdesc->mode_reg, rdesc->mode_mask, val << shift);
0244 if (ret) {
0245 dev_err(&rdev->dev, "%s: fail (%d)\n", __func__, ret);
0246 return ret;
0247 }
0248
0249 return 0;
0250 }
0251
0252 static unsigned int mt6360_regulator_get_mode(struct regulator_dev *rdev)
0253 {
0254 const struct mt6360_regulator_desc *rdesc = (struct mt6360_regulator_desc *)rdev->desc;
0255 struct regmap *regmap = rdev_get_regmap(rdev);
0256 int shift = ffs(rdesc->mode_mask) - 1;
0257 unsigned int val;
0258 int ret;
0259
0260 ret = regmap_read(regmap, rdesc->mode_reg, &val);
0261 if (ret)
0262 return ret;
0263
0264 val &= rdesc->mode_mask;
0265 val >>= shift;
0266
0267 switch (val) {
0268 case MT6360_OPMODE_LP:
0269 return REGULATOR_MODE_IDLE;
0270 case MT6360_OPMODE_ULP:
0271 return REGULATOR_MODE_STANDBY;
0272 case MT6360_OPMODE_NORMAL:
0273 return REGULATOR_MODE_NORMAL;
0274 default:
0275 return -EINVAL;
0276 }
0277 }
0278
0279 static int mt6360_regulator_get_status(struct regulator_dev *rdev)
0280 {
0281 const struct mt6360_regulator_desc *rdesc = (struct mt6360_regulator_desc *)rdev->desc;
0282 struct regmap *regmap = rdev_get_regmap(rdev);
0283 unsigned int val;
0284 int ret;
0285
0286 ret = regmap_read(regmap, rdesc->state_reg, &val);
0287 if (ret)
0288 return ret;
0289
0290 if (val & rdesc->state_mask)
0291 return REGULATOR_STATUS_ON;
0292
0293 return REGULATOR_STATUS_OFF;
0294 }
0295
0296 static const struct regulator_ops mt6360_regulator_ops = {
0297 .list_voltage = regulator_list_voltage_linear_range,
0298 .enable = regulator_enable_regmap,
0299 .disable = regulator_disable_regmap,
0300 .is_enabled = regulator_is_enabled_regmap,
0301 .set_voltage_sel = regulator_set_voltage_sel_regmap,
0302 .get_voltage_sel = regulator_get_voltage_sel_regmap,
0303 .set_mode = mt6360_regulator_set_mode,
0304 .get_mode = mt6360_regulator_get_mode,
0305 .get_status = mt6360_regulator_get_status,
0306 };
0307
0308 static unsigned int mt6360_regulator_of_map_mode(unsigned int hw_mode)
0309 {
0310 switch (hw_mode) {
0311 case MT6360_OPMODE_NORMAL:
0312 return REGULATOR_MODE_NORMAL;
0313 case MT6360_OPMODE_LP:
0314 return REGULATOR_MODE_IDLE;
0315 case MT6360_OPMODE_ULP:
0316 return REGULATOR_MODE_STANDBY;
0317 default:
0318 return REGULATOR_MODE_INVALID;
0319 }
0320 }
0321
0322 #define MT6360_REGULATOR_DESC(_name, _sname, ereg, emask, vreg, vmask, \
0323 mreg, mmask, streg, stmask, vranges, \
0324 vcnts, offon_delay, irq_tbls) \
0325 { \
0326 .desc = { \
0327 .name = #_name, \
0328 .supply_name = #_sname, \
0329 .id = MT6360_REGULATOR_##_name, \
0330 .of_match = of_match_ptr(#_name), \
0331 .regulators_node = of_match_ptr("regulator"), \
0332 .of_map_mode = mt6360_regulator_of_map_mode, \
0333 .owner = THIS_MODULE, \
0334 .ops = &mt6360_regulator_ops, \
0335 .type = REGULATOR_VOLTAGE, \
0336 .vsel_reg = vreg, \
0337 .vsel_mask = vmask, \
0338 .enable_reg = ereg, \
0339 .enable_mask = emask, \
0340 .linear_ranges = vranges, \
0341 .n_linear_ranges = ARRAY_SIZE(vranges), \
0342 .n_voltages = vcnts, \
0343 .off_on_delay = offon_delay, \
0344 }, \
0345 .mode_reg = mreg, \
0346 .mode_mask = mmask, \
0347 .state_reg = streg, \
0348 .state_mask = stmask, \
0349 .irq_tables = irq_tbls, \
0350 .irq_table_size = ARRAY_SIZE(irq_tbls), \
0351 }
0352
0353 static const struct mt6360_regulator_desc mt6360_regulator_descs[] = {
0354 MT6360_REGULATOR_DESC(BUCK1, BUCK1_VIN, 0x117, 0x40, 0x110, 0xff, 0x117, 0x30, 0x117, 0x04,
0355 buck_vout_ranges, 256, 0, buck1_irq_tbls),
0356 MT6360_REGULATOR_DESC(BUCK2, BUCK2_VIN, 0x127, 0x40, 0x120, 0xff, 0x127, 0x30, 0x127, 0x04,
0357 buck_vout_ranges, 256, 0, buck2_irq_tbls),
0358 MT6360_REGULATOR_DESC(LDO6, LDO_VIN3, 0x137, 0x40, 0x13B, 0xff, 0x137, 0x30, 0x137, 0x04,
0359 ldo_vout_ranges1, 256, 0, ldo6_irq_tbls),
0360 MT6360_REGULATOR_DESC(LDO7, LDO_VIN3, 0x131, 0x40, 0x135, 0xff, 0x131, 0x30, 0x131, 0x04,
0361 ldo_vout_ranges1, 256, 0, ldo7_irq_tbls),
0362 MT6360_REGULATOR_DESC(LDO1, LDO_VIN1, 0x217, 0x40, 0x21B, 0xff, 0x217, 0x30, 0x217, 0x04,
0363 ldo_vout_ranges2, 256, 0, ldo1_irq_tbls),
0364 MT6360_REGULATOR_DESC(LDO2, LDO_VIN1, 0x211, 0x40, 0x215, 0xff, 0x211, 0x30, 0x211, 0x04,
0365 ldo_vout_ranges2, 256, 0, ldo2_irq_tbls),
0366 MT6360_REGULATOR_DESC(LDO3, LDO_VIN1, 0x205, 0x40, 0x209, 0xff, 0x205, 0x30, 0x205, 0x04,
0367 ldo_vout_ranges2, 256, 100, ldo3_irq_tbls),
0368 MT6360_REGULATOR_DESC(LDO5, LDO_VIN2, 0x20B, 0x40, 0x20F, 0x7f, 0x20B, 0x30, 0x20B, 0x04,
0369 ldo_vout_ranges3, 128, 100, ldo5_irq_tbls),
0370 };
0371
0372 static int mt6360_regulator_irq_register(struct platform_device *pdev,
0373 struct regulator_dev *rdev,
0374 const struct mt6360_irq_mapping *tbls,
0375 int tbl_size)
0376 {
0377 int i, irq, ret;
0378
0379 for (i = 0; i < tbl_size; i++) {
0380 const struct mt6360_irq_mapping *irq_desc = tbls + i;
0381
0382 irq = platform_get_irq_byname(pdev, irq_desc->name);
0383 if (irq < 0)
0384 return irq;
0385
0386 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, irq_desc->handler, 0,
0387 irq_desc->name, rdev);
0388 if (ret) {
0389 dev_err(&pdev->dev, "Fail to request %s irq\n", irq_desc->name);
0390 return ret;
0391 }
0392 }
0393
0394 return 0;
0395 }
0396
0397 static int mt6360_regulator_probe(struct platform_device *pdev)
0398 {
0399 struct mt6360_regulator_data *mrd;
0400 struct regulator_config config = {};
0401 int i, ret;
0402
0403 mrd = devm_kzalloc(&pdev->dev, sizeof(*mrd), GFP_KERNEL);
0404 if (!mrd)
0405 return -ENOMEM;
0406
0407 mrd->dev = &pdev->dev;
0408
0409 mrd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
0410 if (!mrd->regmap) {
0411 dev_err(&pdev->dev, "Failed to get parent regmap\n");
0412 return -ENODEV;
0413 }
0414
0415 config.dev = pdev->dev.parent;
0416 config.driver_data = mrd;
0417 config.regmap = mrd->regmap;
0418
0419 for (i = 0; i < ARRAY_SIZE(mt6360_regulator_descs); i++) {
0420 const struct mt6360_regulator_desc *rdesc = mt6360_regulator_descs + i;
0421 struct regulator_dev *rdev;
0422
0423 rdev = devm_regulator_register(&pdev->dev, &rdesc->desc, &config);
0424 if (IS_ERR(rdev)) {
0425 dev_err(&pdev->dev, "Failed to register %d regulator\n", i);
0426 return PTR_ERR(rdev);
0427 }
0428
0429 ret = mt6360_regulator_irq_register(pdev, rdev, rdesc->irq_tables,
0430 rdesc->irq_table_size);
0431 if (ret) {
0432 dev_err(&pdev->dev, "Failed to register %d regulator irqs\n", i);
0433 return ret;
0434 }
0435 }
0436
0437 return 0;
0438 }
0439
0440 static const struct platform_device_id mt6360_regulator_id_table[] = {
0441 { "mt6360-regulator", 0 },
0442 {},
0443 };
0444 MODULE_DEVICE_TABLE(platform, mt6360_regulator_id_table);
0445
0446 static struct platform_driver mt6360_regulator_driver = {
0447 .driver = {
0448 .name = "mt6360-regulator",
0449 },
0450 .probe = mt6360_regulator_probe,
0451 .id_table = mt6360_regulator_id_table,
0452 };
0453 module_platform_driver(mt6360_regulator_driver);
0454
0455 MODULE_AUTHOR("Gene Chen <gene_chen@richtek.com>");
0456 MODULE_DESCRIPTION("MT6360 Regulator Driver");
0457 MODULE_LICENSE("GPL v2");
