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0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // Copyright (c) 2021 MediaTek Inc.
0004 
0005 #include <linux/platform_device.h>
0006 #include <linux/mfd/mt6359/registers.h>
0007 #include <linux/mfd/mt6359p/registers.h>
0008 #include <linux/mfd/mt6397/core.h>
0009 #include <linux/module.h>
0010 #include <linux/of_device.h>
0011 #include <linux/regmap.h>
0012 #include <linux/regulator/driver.h>
0013 #include <linux/regulator/machine.h>
0014 #include <linux/regulator/mt6359-regulator.h>
0015 #include <linux/regulator/of_regulator.h>
0016 
0017 #define MT6359_BUCK_MODE_AUTO       0
0018 #define MT6359_BUCK_MODE_FORCE_PWM  1
0019 #define MT6359_BUCK_MODE_NORMAL     0
0020 #define MT6359_BUCK_MODE_LP     2
0021 
0022 /*
0023  * MT6359 regulators' information
0024  *
0025  * @desc: standard fields of regulator description.
0026  * @status_reg: for query status of regulators.
0027  * @qi: Mask for query enable signal status of regulators.
0028  * @modeset_reg: for operating AUTO/PWM mode register.
0029  * @modeset_mask: MASK for operating modeset register.
0030  */
0031 struct mt6359_regulator_info {
0032     struct regulator_desc desc;
0033     u32 status_reg;
0034     u32 qi;
0035     u32 modeset_reg;
0036     u32 modeset_mask;
0037     u32 lp_mode_reg;
0038     u32 lp_mode_mask;
0039 };
0040 
0041 #define MT6359_BUCK(match, _name, min, max, step,       \
0042     _enable_reg, _status_reg,               \
0043     _vsel_reg, _vsel_mask,                  \
0044     _lp_mode_reg, _lp_mode_shift,               \
0045     _modeset_reg, _modeset_shift)               \
0046 [MT6359_ID_##_name] = {                     \
0047     .desc = {                       \
0048         .name = #_name,                 \
0049         .of_match = of_match_ptr(match),        \
0050         .regulators_node = of_match_ptr("regulators"),  \
0051         .ops = &mt6359_volt_linear_ops,         \
0052         .type = REGULATOR_VOLTAGE,          \
0053         .id = MT6359_ID_##_name,            \
0054         .owner = THIS_MODULE,               \
0055         .uV_step = (step),              \
0056         .n_voltages = ((max) - (min)) / (step) + 1, \
0057         .min_uV = (min),                \
0058         .vsel_reg = _vsel_reg,              \
0059         .vsel_mask = _vsel_mask,            \
0060         .enable_reg = _enable_reg,          \
0061         .enable_mask = BIT(0),              \
0062         .of_map_mode = mt6359_map_mode,         \
0063     },                          \
0064     .status_reg = _status_reg,              \
0065     .qi = BIT(0),                       \
0066     .lp_mode_reg = _lp_mode_reg,                \
0067     .lp_mode_mask = BIT(_lp_mode_shift),            \
0068     .modeset_reg = _modeset_reg,                \
0069     .modeset_mask = BIT(_modeset_shift),            \
0070 }
0071 
0072 #define MT6359_LDO_LINEAR(match, _name, min, max, step,     \
0073     _enable_reg, _status_reg, _vsel_reg, _vsel_mask)    \
0074 [MT6359_ID_##_name] = {                     \
0075     .desc = {                       \
0076         .name = #_name,                 \
0077         .of_match = of_match_ptr(match),        \
0078         .regulators_node = of_match_ptr("regulators"),  \
0079         .ops = &mt6359_volt_linear_ops,         \
0080         .type = REGULATOR_VOLTAGE,          \
0081         .id = MT6359_ID_##_name,            \
0082         .owner = THIS_MODULE,               \
0083         .uV_step = (step),              \
0084         .n_voltages = ((max) - (min)) / (step) + 1, \
0085         .min_uV = (min),                \
0086         .vsel_reg = _vsel_reg,              \
0087         .vsel_mask = _vsel_mask,            \
0088         .enable_reg = _enable_reg,          \
0089         .enable_mask = BIT(0),              \
0090     },                          \
0091     .status_reg = _status_reg,              \
0092     .qi = BIT(0),                       \
0093 }
0094 
0095 #define MT6359_LDO(match, _name, _volt_table,           \
0096     _enable_reg, _enable_mask, _status_reg,         \
0097     _vsel_reg, _vsel_mask, _en_delay)           \
0098 [MT6359_ID_##_name] = {                     \
0099     .desc = {                       \
0100         .name = #_name,                 \
0101         .of_match = of_match_ptr(match),        \
0102         .regulators_node = of_match_ptr("regulators"),  \
0103         .ops = &mt6359_volt_table_ops,          \
0104         .type = REGULATOR_VOLTAGE,          \
0105         .id = MT6359_ID_##_name,            \
0106         .owner = THIS_MODULE,               \
0107         .n_voltages = ARRAY_SIZE(_volt_table),      \
0108         .volt_table = _volt_table,          \
0109         .vsel_reg = _vsel_reg,              \
0110         .vsel_mask = _vsel_mask,            \
0111         .enable_reg = _enable_reg,          \
0112         .enable_mask = BIT(_enable_mask),       \
0113         .enable_time = _en_delay,           \
0114     },                          \
0115     .status_reg = _status_reg,              \
0116     .qi = BIT(0),                       \
0117 }
0118 
0119 #define MT6359_REG_FIXED(match, _name, _enable_reg, \
0120     _status_reg, _fixed_volt)           \
0121 [MT6359_ID_##_name] = {                 \
0122     .desc = {                   \
0123         .name = #_name,             \
0124         .of_match = of_match_ptr(match),    \
0125         .regulators_node = of_match_ptr("regulators"),  \
0126         .ops = &mt6359_volt_fixed_ops,      \
0127         .type = REGULATOR_VOLTAGE,      \
0128         .id = MT6359_ID_##_name,        \
0129         .owner = THIS_MODULE,           \
0130         .n_voltages = 1,            \
0131         .enable_reg = _enable_reg,      \
0132         .enable_mask = BIT(0),          \
0133         .fixed_uV = (_fixed_volt),      \
0134     },                      \
0135     .status_reg = _status_reg,          \
0136     .qi = BIT(0),                   \
0137 }
0138 
0139 #define MT6359P_LDO1(match, _name, _ops, _volt_table,   \
0140     _enable_reg, _enable_mask, _status_reg,     \
0141     _vsel_reg, _vsel_mask)              \
0142 [MT6359_ID_##_name] = {                 \
0143     .desc = {                   \
0144         .name = #_name,             \
0145         .of_match = of_match_ptr(match),    \
0146         .regulators_node = of_match_ptr("regulators"),  \
0147         .ops = &_ops,               \
0148         .type = REGULATOR_VOLTAGE,      \
0149         .id = MT6359_ID_##_name,        \
0150         .owner = THIS_MODULE,           \
0151         .n_voltages = ARRAY_SIZE(_volt_table),  \
0152         .volt_table = _volt_table,      \
0153         .vsel_reg = _vsel_reg,          \
0154         .vsel_mask = _vsel_mask,        \
0155         .enable_reg = _enable_reg,      \
0156         .enable_mask = BIT(_enable_mask),   \
0157     },                      \
0158     .status_reg = _status_reg,          \
0159     .qi = BIT(0),                   \
0160 }
0161 
0162 static const unsigned int vsim1_voltages[] = {
0163     0, 0, 0, 1700000, 1800000, 0, 0, 0, 2700000, 0, 0, 3000000, 3100000,
0164 };
0165 
0166 static const unsigned int vibr_voltages[] = {
0167     1200000, 1300000, 1500000, 0, 1800000, 2000000, 0, 0, 2700000, 2800000,
0168     0, 3000000, 0, 3300000,
0169 };
0170 
0171 static const unsigned int vrf12_voltages[] = {
0172     0, 0, 1100000, 1200000, 1300000,
0173 };
0174 
0175 static const unsigned int volt18_voltages[] = {
0176     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1700000, 1800000, 1900000,
0177 };
0178 
0179 static const unsigned int vcn13_voltages[] = {
0180     900000, 1000000, 0, 1200000, 1300000,
0181 };
0182 
0183 static const unsigned int vcn33_voltages[] = {
0184     0, 0, 0, 0, 0, 0, 0, 0, 0, 2800000, 0, 0, 0, 3300000, 3400000, 3500000,
0185 };
0186 
0187 static const unsigned int vefuse_voltages[] = {
0188     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1700000, 1800000, 1900000, 2000000,
0189 };
0190 
0191 static const unsigned int vxo22_voltages[] = {
0192     1800000, 0, 0, 0, 2200000,
0193 };
0194 
0195 static const unsigned int vrfck_voltages[] = {
0196     0, 0, 1500000, 0, 0, 0, 0, 1600000, 0, 0, 0, 0, 1700000,
0197 };
0198 
0199 static const unsigned int vrfck_voltages_1[] = {
0200     1240000, 1600000,
0201 };
0202 
0203 static const unsigned int vio28_voltages[] = {
0204     0, 0, 0, 0, 0, 0, 0, 0, 0, 2800000, 2900000, 3000000, 3100000, 3300000,
0205 };
0206 
0207 static const unsigned int vemc_voltages[] = {
0208     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2900000, 3000000, 0, 3300000,
0209 };
0210 
0211 static const unsigned int vemc_voltages_1[] = {
0212     0, 0, 0, 0, 0, 0, 0, 0, 2500000, 2800000, 2900000, 3000000, 3100000,
0213     3300000,
0214 };
0215 
0216 static const unsigned int va12_voltages[] = {
0217     0, 0, 0, 0, 0, 0, 1200000, 1300000,
0218 };
0219 
0220 static const unsigned int va09_voltages[] = {
0221     0, 0, 800000, 900000, 0, 0, 1200000,
0222 };
0223 
0224 static const unsigned int vrf18_voltages[] = {
0225     0, 0, 0, 0, 0, 1700000, 1800000, 1810000,
0226 };
0227 
0228 static const unsigned int vbbck_voltages[] = {
0229     0, 0, 0, 0, 1100000, 0, 0, 0, 1150000, 0, 0, 0, 1200000,
0230 };
0231 
0232 static const unsigned int vsim2_voltages[] = {
0233     0, 0, 0, 1700000, 1800000, 0, 0, 0, 2700000, 0, 0, 3000000, 3100000,
0234 };
0235 
0236 static inline unsigned int mt6359_map_mode(unsigned int mode)
0237 {
0238     switch (mode) {
0239     case MT6359_BUCK_MODE_NORMAL:
0240         return REGULATOR_MODE_NORMAL;
0241     case MT6359_BUCK_MODE_FORCE_PWM:
0242         return REGULATOR_MODE_FAST;
0243     case MT6359_BUCK_MODE_LP:
0244         return REGULATOR_MODE_IDLE;
0245     default:
0246         return REGULATOR_MODE_INVALID;
0247     }
0248 }
0249 
0250 static int mt6359_get_status(struct regulator_dev *rdev)
0251 {
0252     int ret;
0253     u32 regval;
0254     struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
0255 
0256     ret = regmap_read(rdev->regmap, info->status_reg, &regval);
0257     if (ret != 0) {
0258         dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret);
0259         return ret;
0260     }
0261 
0262     if (regval & info->qi)
0263         return REGULATOR_STATUS_ON;
0264     else
0265         return REGULATOR_STATUS_OFF;
0266 }
0267 
0268 static unsigned int mt6359_regulator_get_mode(struct regulator_dev *rdev)
0269 {
0270     struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
0271     int ret, regval;
0272 
0273     ret = regmap_read(rdev->regmap, info->modeset_reg, &regval);
0274     if (ret != 0) {
0275         dev_err(&rdev->dev,
0276             "Failed to get mt6359 buck mode: %d\n", ret);
0277         return ret;
0278     }
0279 
0280     regval &= info->modeset_mask;
0281     regval >>= ffs(info->modeset_mask) - 1;
0282 
0283     if (regval == MT6359_BUCK_MODE_FORCE_PWM)
0284         return REGULATOR_MODE_FAST;
0285 
0286     ret = regmap_read(rdev->regmap, info->lp_mode_reg, &regval);
0287     if (ret != 0) {
0288         dev_err(&rdev->dev,
0289             "Failed to get mt6359 buck lp mode: %d\n", ret);
0290         return ret;
0291     }
0292 
0293     if (regval & info->lp_mode_mask)
0294         return REGULATOR_MODE_IDLE;
0295     else
0296         return REGULATOR_MODE_NORMAL;
0297 }
0298 
0299 static int mt6359_regulator_set_mode(struct regulator_dev *rdev,
0300                      unsigned int mode)
0301 {
0302     struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
0303     int ret = 0, val;
0304     int curr_mode;
0305 
0306     curr_mode = mt6359_regulator_get_mode(rdev);
0307     switch (mode) {
0308     case REGULATOR_MODE_FAST:
0309         val = MT6359_BUCK_MODE_FORCE_PWM;
0310         val <<= ffs(info->modeset_mask) - 1;
0311         ret = regmap_update_bits(rdev->regmap,
0312                      info->modeset_reg,
0313                      info->modeset_mask,
0314                      val);
0315         break;
0316     case REGULATOR_MODE_NORMAL:
0317         if (curr_mode == REGULATOR_MODE_FAST) {
0318             val = MT6359_BUCK_MODE_AUTO;
0319             val <<= ffs(info->modeset_mask) - 1;
0320             ret = regmap_update_bits(rdev->regmap,
0321                          info->modeset_reg,
0322                          info->modeset_mask,
0323                          val);
0324         } else if (curr_mode == REGULATOR_MODE_IDLE) {
0325             val = MT6359_BUCK_MODE_NORMAL;
0326             val <<= ffs(info->lp_mode_mask) - 1;
0327             ret = regmap_update_bits(rdev->regmap,
0328                          info->lp_mode_reg,
0329                          info->lp_mode_mask,
0330                          val);
0331             udelay(100);
0332         }
0333         break;
0334     case REGULATOR_MODE_IDLE:
0335         val = MT6359_BUCK_MODE_LP >> 1;
0336         val <<= ffs(info->lp_mode_mask) - 1;
0337         ret = regmap_update_bits(rdev->regmap,
0338                      info->lp_mode_reg,
0339                      info->lp_mode_mask,
0340                      val);
0341         break;
0342     default:
0343         return -EINVAL;
0344     }
0345 
0346     if (ret != 0) {
0347         dev_err(&rdev->dev,
0348             "Failed to set mt6359 buck mode: %d\n", ret);
0349     }
0350 
0351     return ret;
0352 }
0353 
0354 static int mt6359p_vemc_set_voltage_sel(struct regulator_dev *rdev,
0355                     u32 sel)
0356 {
0357     struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
0358     int ret;
0359     u32 val = 0;
0360 
0361     sel <<= ffs(info->desc.vsel_mask) - 1;
0362     ret = regmap_write(rdev->regmap, MT6359P_TMA_KEY_ADDR, TMA_KEY);
0363     if (ret)
0364         return ret;
0365 
0366     ret = regmap_read(rdev->regmap, MT6359P_VM_MODE_ADDR, &val);
0367     if (ret)
0368         return ret;
0369 
0370     switch (val) {
0371     case 0:
0372         /* If HW trapping is 0, use VEMC_VOSEL_0 */
0373         ret = regmap_update_bits(rdev->regmap,
0374                      info->desc.vsel_reg,
0375                      info->desc.vsel_mask, sel);
0376         break;
0377     case 1:
0378         /* If HW trapping is 1, use VEMC_VOSEL_1 */
0379         ret = regmap_update_bits(rdev->regmap,
0380                      info->desc.vsel_reg + 0x2,
0381                      info->desc.vsel_mask, sel);
0382         break;
0383     default:
0384         return -EINVAL;
0385     }
0386 
0387     if (ret)
0388         return ret;
0389 
0390     ret = regmap_write(rdev->regmap, MT6359P_TMA_KEY_ADDR, 0);
0391     return ret;
0392 }
0393 
0394 static int mt6359p_vemc_get_voltage_sel(struct regulator_dev *rdev)
0395 {
0396     struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
0397     int ret;
0398     u32 val = 0;
0399 
0400     ret = regmap_read(rdev->regmap, MT6359P_VM_MODE_ADDR, &val);
0401     if (ret)
0402         return ret;
0403     switch (val) {
0404     case 0:
0405         /* If HW trapping is 0, use VEMC_VOSEL_0 */
0406         ret = regmap_read(rdev->regmap,
0407                   info->desc.vsel_reg, &val);
0408         break;
0409     case 1:
0410         /* If HW trapping is 1, use VEMC_VOSEL_1 */
0411         ret = regmap_read(rdev->regmap,
0412                   info->desc.vsel_reg + 0x2, &val);
0413         break;
0414     default:
0415         return -EINVAL;
0416     }
0417     if (ret)
0418         return ret;
0419 
0420     val &= info->desc.vsel_mask;
0421     val >>= ffs(info->desc.vsel_mask) - 1;
0422 
0423     return val;
0424 }
0425 
0426 static const struct regulator_ops mt6359_volt_linear_ops = {
0427     .list_voltage = regulator_list_voltage_linear,
0428     .map_voltage = regulator_map_voltage_linear,
0429     .set_voltage_sel = regulator_set_voltage_sel_regmap,
0430     .get_voltage_sel = regulator_get_voltage_sel_regmap,
0431     .set_voltage_time_sel = regulator_set_voltage_time_sel,
0432     .enable = regulator_enable_regmap,
0433     .disable = regulator_disable_regmap,
0434     .is_enabled = regulator_is_enabled_regmap,
0435     .get_status = mt6359_get_status,
0436     .set_mode = mt6359_regulator_set_mode,
0437     .get_mode = mt6359_regulator_get_mode,
0438 };
0439 
0440 static const struct regulator_ops mt6359_volt_table_ops = {
0441     .list_voltage = regulator_list_voltage_table,
0442     .map_voltage = regulator_map_voltage_iterate,
0443     .set_voltage_sel = regulator_set_voltage_sel_regmap,
0444     .get_voltage_sel = regulator_get_voltage_sel_regmap,
0445     .set_voltage_time_sel = regulator_set_voltage_time_sel,
0446     .enable = regulator_enable_regmap,
0447     .disable = regulator_disable_regmap,
0448     .is_enabled = regulator_is_enabled_regmap,
0449     .get_status = mt6359_get_status,
0450 };
0451 
0452 static const struct regulator_ops mt6359_volt_fixed_ops = {
0453     .enable = regulator_enable_regmap,
0454     .disable = regulator_disable_regmap,
0455     .is_enabled = regulator_is_enabled_regmap,
0456     .get_status = mt6359_get_status,
0457 };
0458 
0459 static const struct regulator_ops mt6359p_vemc_ops = {
0460     .list_voltage = regulator_list_voltage_table,
0461     .map_voltage = regulator_map_voltage_iterate,
0462     .set_voltage_sel = mt6359p_vemc_set_voltage_sel,
0463     .get_voltage_sel = mt6359p_vemc_get_voltage_sel,
0464     .set_voltage_time_sel = regulator_set_voltage_time_sel,
0465     .enable = regulator_enable_regmap,
0466     .disable = regulator_disable_regmap,
0467     .is_enabled = regulator_is_enabled_regmap,
0468     .get_status = mt6359_get_status,
0469 };
0470 
0471 /* The array is indexed by id(MT6359_ID_XXX) */
0472 static struct mt6359_regulator_info mt6359_regulators[] = {
0473     MT6359_BUCK("buck_vs1", VS1, 800000, 2200000, 12500,
0474             MT6359_RG_BUCK_VS1_EN_ADDR,
0475             MT6359_DA_VS1_EN_ADDR, MT6359_RG_BUCK_VS1_VOSEL_ADDR,
0476             MT6359_RG_BUCK_VS1_VOSEL_MASK <<
0477             MT6359_RG_BUCK_VS1_VOSEL_SHIFT,
0478             MT6359_RG_BUCK_VS1_LP_ADDR, MT6359_RG_BUCK_VS1_LP_SHIFT,
0479             MT6359_RG_VS1_FPWM_ADDR, MT6359_RG_VS1_FPWM_SHIFT),
0480     MT6359_BUCK("buck_vgpu11", VGPU11, 400000, 1193750, 6250,
0481             MT6359_RG_BUCK_VGPU11_EN_ADDR,
0482             MT6359_DA_VGPU11_EN_ADDR, MT6359_RG_BUCK_VGPU11_VOSEL_ADDR,
0483             MT6359_RG_BUCK_VGPU11_VOSEL_MASK <<
0484             MT6359_RG_BUCK_VGPU11_VOSEL_SHIFT,
0485             MT6359_RG_BUCK_VGPU11_LP_ADDR,
0486             MT6359_RG_BUCK_VGPU11_LP_SHIFT,
0487             MT6359_RG_VGPU11_FCCM_ADDR, MT6359_RG_VGPU11_FCCM_SHIFT),
0488     MT6359_BUCK("buck_vmodem", VMODEM, 400000, 1100000, 6250,
0489             MT6359_RG_BUCK_VMODEM_EN_ADDR,
0490             MT6359_DA_VMODEM_EN_ADDR, MT6359_RG_BUCK_VMODEM_VOSEL_ADDR,
0491             MT6359_RG_BUCK_VMODEM_VOSEL_MASK <<
0492             MT6359_RG_BUCK_VMODEM_VOSEL_SHIFT,
0493             MT6359_RG_BUCK_VMODEM_LP_ADDR,
0494             MT6359_RG_BUCK_VMODEM_LP_SHIFT,
0495             MT6359_RG_VMODEM_FCCM_ADDR, MT6359_RG_VMODEM_FCCM_SHIFT),
0496     MT6359_BUCK("buck_vpu", VPU, 400000, 1193750, 6250,
0497             MT6359_RG_BUCK_VPU_EN_ADDR,
0498             MT6359_DA_VPU_EN_ADDR, MT6359_RG_BUCK_VPU_VOSEL_ADDR,
0499             MT6359_RG_BUCK_VPU_VOSEL_MASK <<
0500             MT6359_RG_BUCK_VPU_VOSEL_SHIFT,
0501             MT6359_RG_BUCK_VPU_LP_ADDR, MT6359_RG_BUCK_VPU_LP_SHIFT,
0502             MT6359_RG_VPU_FCCM_ADDR, MT6359_RG_VPU_FCCM_SHIFT),
0503     MT6359_BUCK("buck_vcore", VCORE, 400000, 1193750, 6250,
0504             MT6359_RG_BUCK_VCORE_EN_ADDR,
0505             MT6359_DA_VCORE_EN_ADDR, MT6359_RG_BUCK_VCORE_VOSEL_ADDR,
0506             MT6359_RG_BUCK_VCORE_VOSEL_MASK <<
0507             MT6359_RG_BUCK_VCORE_VOSEL_SHIFT,
0508             MT6359_RG_BUCK_VCORE_LP_ADDR, MT6359_RG_BUCK_VCORE_LP_SHIFT,
0509             MT6359_RG_VCORE_FCCM_ADDR, MT6359_RG_VCORE_FCCM_SHIFT),
0510     MT6359_BUCK("buck_vs2", VS2, 800000, 1600000, 12500,
0511             MT6359_RG_BUCK_VS2_EN_ADDR,
0512             MT6359_DA_VS2_EN_ADDR, MT6359_RG_BUCK_VS2_VOSEL_ADDR,
0513             MT6359_RG_BUCK_VS2_VOSEL_MASK <<
0514             MT6359_RG_BUCK_VS2_VOSEL_SHIFT,
0515             MT6359_RG_BUCK_VS2_LP_ADDR, MT6359_RG_BUCK_VS2_LP_SHIFT,
0516             MT6359_RG_VS2_FPWM_ADDR, MT6359_RG_VS2_FPWM_SHIFT),
0517     MT6359_BUCK("buck_vpa", VPA, 500000, 3650000, 50000,
0518             MT6359_RG_BUCK_VPA_EN_ADDR,
0519             MT6359_DA_VPA_EN_ADDR, MT6359_RG_BUCK_VPA_VOSEL_ADDR,
0520             MT6359_RG_BUCK_VPA_VOSEL_MASK <<
0521             MT6359_RG_BUCK_VPA_VOSEL_SHIFT,
0522             MT6359_RG_BUCK_VPA_LP_ADDR, MT6359_RG_BUCK_VPA_LP_SHIFT,
0523             MT6359_RG_VPA_MODESET_ADDR, MT6359_RG_VPA_MODESET_SHIFT),
0524     MT6359_BUCK("buck_vproc2", VPROC2, 400000, 1193750, 6250,
0525             MT6359_RG_BUCK_VPROC2_EN_ADDR,
0526             MT6359_DA_VPROC2_EN_ADDR, MT6359_RG_BUCK_VPROC2_VOSEL_ADDR,
0527             MT6359_RG_BUCK_VPROC2_VOSEL_MASK <<
0528             MT6359_RG_BUCK_VPROC2_VOSEL_SHIFT,
0529             MT6359_RG_BUCK_VPROC2_LP_ADDR,
0530             MT6359_RG_BUCK_VPROC2_LP_SHIFT,
0531             MT6359_RG_VPROC2_FCCM_ADDR, MT6359_RG_VPROC2_FCCM_SHIFT),
0532     MT6359_BUCK("buck_vproc1", VPROC1, 400000, 1193750, 6250,
0533             MT6359_RG_BUCK_VPROC1_EN_ADDR,
0534             MT6359_DA_VPROC1_EN_ADDR, MT6359_RG_BUCK_VPROC1_VOSEL_ADDR,
0535             MT6359_RG_BUCK_VPROC1_VOSEL_MASK <<
0536             MT6359_RG_BUCK_VPROC1_VOSEL_SHIFT,
0537             MT6359_RG_BUCK_VPROC1_LP_ADDR,
0538             MT6359_RG_BUCK_VPROC1_LP_SHIFT,
0539             MT6359_RG_VPROC1_FCCM_ADDR, MT6359_RG_VPROC1_FCCM_SHIFT),
0540     MT6359_BUCK("buck_vcore_sshub", VCORE_SSHUB, 400000, 1193750, 6250,
0541             MT6359_RG_BUCK_VCORE_SSHUB_EN_ADDR,
0542             MT6359_DA_VCORE_EN_ADDR,
0543             MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_ADDR,
0544             MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_MASK <<
0545             MT6359_RG_BUCK_VCORE_SSHUB_VOSEL_SHIFT,
0546             MT6359_RG_BUCK_VCORE_LP_ADDR, MT6359_RG_BUCK_VCORE_LP_SHIFT,
0547             MT6359_RG_VCORE_FCCM_ADDR, MT6359_RG_VCORE_FCCM_SHIFT),
0548     MT6359_REG_FIXED("ldo_vaud18", VAUD18, MT6359_RG_LDO_VAUD18_EN_ADDR,
0549              MT6359_DA_VAUD18_B_EN_ADDR, 1800000),
0550     MT6359_LDO("ldo_vsim1", VSIM1, vsim1_voltages,
0551            MT6359_RG_LDO_VSIM1_EN_ADDR, MT6359_RG_LDO_VSIM1_EN_SHIFT,
0552            MT6359_DA_VSIM1_B_EN_ADDR, MT6359_RG_VSIM1_VOSEL_ADDR,
0553            MT6359_RG_VSIM1_VOSEL_MASK << MT6359_RG_VSIM1_VOSEL_SHIFT,
0554            480),
0555     MT6359_LDO("ldo_vibr", VIBR, vibr_voltages,
0556            MT6359_RG_LDO_VIBR_EN_ADDR, MT6359_RG_LDO_VIBR_EN_SHIFT,
0557            MT6359_DA_VIBR_B_EN_ADDR, MT6359_RG_VIBR_VOSEL_ADDR,
0558            MT6359_RG_VIBR_VOSEL_MASK << MT6359_RG_VIBR_VOSEL_SHIFT,
0559            240),
0560     MT6359_LDO("ldo_vrf12", VRF12, vrf12_voltages,
0561            MT6359_RG_LDO_VRF12_EN_ADDR, MT6359_RG_LDO_VRF12_EN_SHIFT,
0562            MT6359_DA_VRF12_B_EN_ADDR, MT6359_RG_VRF12_VOSEL_ADDR,
0563            MT6359_RG_VRF12_VOSEL_MASK << MT6359_RG_VRF12_VOSEL_SHIFT,
0564            120),
0565     MT6359_REG_FIXED("ldo_vusb", VUSB, MT6359_RG_LDO_VUSB_EN_0_ADDR,
0566              MT6359_DA_VUSB_B_EN_ADDR, 3000000),
0567     MT6359_LDO_LINEAR("ldo_vsram_proc2", VSRAM_PROC2, 500000, 1293750, 6250,
0568               MT6359_RG_LDO_VSRAM_PROC2_EN_ADDR,
0569               MT6359_DA_VSRAM_PROC2_B_EN_ADDR,
0570               MT6359_RG_LDO_VSRAM_PROC2_VOSEL_ADDR,
0571               MT6359_RG_LDO_VSRAM_PROC2_VOSEL_MASK <<
0572               MT6359_RG_LDO_VSRAM_PROC2_VOSEL_SHIFT),
0573     MT6359_LDO("ldo_vio18", VIO18, volt18_voltages,
0574            MT6359_RG_LDO_VIO18_EN_ADDR, MT6359_RG_LDO_VIO18_EN_SHIFT,
0575            MT6359_DA_VIO18_B_EN_ADDR, MT6359_RG_VIO18_VOSEL_ADDR,
0576            MT6359_RG_VIO18_VOSEL_MASK << MT6359_RG_VIO18_VOSEL_SHIFT,
0577            960),
0578     MT6359_LDO("ldo_vcamio", VCAMIO, volt18_voltages,
0579            MT6359_RG_LDO_VCAMIO_EN_ADDR, MT6359_RG_LDO_VCAMIO_EN_SHIFT,
0580            MT6359_DA_VCAMIO_B_EN_ADDR, MT6359_RG_VCAMIO_VOSEL_ADDR,
0581            MT6359_RG_VCAMIO_VOSEL_MASK << MT6359_RG_VCAMIO_VOSEL_SHIFT,
0582            1290),
0583     MT6359_REG_FIXED("ldo_vcn18", VCN18, MT6359_RG_LDO_VCN18_EN_ADDR,
0584              MT6359_DA_VCN18_B_EN_ADDR, 1800000),
0585     MT6359_REG_FIXED("ldo_vfe28", VFE28, MT6359_RG_LDO_VFE28_EN_ADDR,
0586              MT6359_DA_VFE28_B_EN_ADDR, 2800000),
0587     MT6359_LDO("ldo_vcn13", VCN13, vcn13_voltages,
0588            MT6359_RG_LDO_VCN13_EN_ADDR, MT6359_RG_LDO_VCN13_EN_SHIFT,
0589            MT6359_DA_VCN13_B_EN_ADDR, MT6359_RG_VCN13_VOSEL_ADDR,
0590            MT6359_RG_VCN13_VOSEL_MASK << MT6359_RG_VCN13_VOSEL_SHIFT,
0591            240),
0592     MT6359_LDO("ldo_vcn33_1_bt", VCN33_1_BT, vcn33_voltages,
0593            MT6359_RG_LDO_VCN33_1_EN_0_ADDR,
0594            MT6359_RG_LDO_VCN33_1_EN_0_SHIFT,
0595            MT6359_DA_VCN33_1_B_EN_ADDR, MT6359_RG_VCN33_1_VOSEL_ADDR,
0596            MT6359_RG_VCN33_1_VOSEL_MASK <<
0597            MT6359_RG_VCN33_1_VOSEL_SHIFT, 240),
0598     MT6359_LDO("ldo_vcn33_1_wifi", VCN33_1_WIFI, vcn33_voltages,
0599            MT6359_RG_LDO_VCN33_1_EN_1_ADDR,
0600            MT6359_RG_LDO_VCN33_1_EN_1_SHIFT,
0601            MT6359_DA_VCN33_1_B_EN_ADDR, MT6359_RG_VCN33_1_VOSEL_ADDR,
0602            MT6359_RG_VCN33_1_VOSEL_MASK <<
0603            MT6359_RG_VCN33_1_VOSEL_SHIFT, 240),
0604     MT6359_REG_FIXED("ldo_vaux18", VAUX18, MT6359_RG_LDO_VAUX18_EN_ADDR,
0605              MT6359_DA_VAUX18_B_EN_ADDR, 1800000),
0606     MT6359_LDO_LINEAR("ldo_vsram_others", VSRAM_OTHERS, 500000, 1293750,
0607               6250,
0608               MT6359_RG_LDO_VSRAM_OTHERS_EN_ADDR,
0609               MT6359_DA_VSRAM_OTHERS_B_EN_ADDR,
0610               MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_ADDR,
0611               MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_MASK <<
0612               MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_SHIFT),
0613     MT6359_LDO("ldo_vefuse", VEFUSE, vefuse_voltages,
0614            MT6359_RG_LDO_VEFUSE_EN_ADDR, MT6359_RG_LDO_VEFUSE_EN_SHIFT,
0615            MT6359_DA_VEFUSE_B_EN_ADDR, MT6359_RG_VEFUSE_VOSEL_ADDR,
0616            MT6359_RG_VEFUSE_VOSEL_MASK << MT6359_RG_VEFUSE_VOSEL_SHIFT,
0617            240),
0618     MT6359_LDO("ldo_vxo22", VXO22, vxo22_voltages,
0619            MT6359_RG_LDO_VXO22_EN_ADDR, MT6359_RG_LDO_VXO22_EN_SHIFT,
0620            MT6359_DA_VXO22_B_EN_ADDR, MT6359_RG_VXO22_VOSEL_ADDR,
0621            MT6359_RG_VXO22_VOSEL_MASK << MT6359_RG_VXO22_VOSEL_SHIFT,
0622            120),
0623     MT6359_LDO("ldo_vrfck", VRFCK, vrfck_voltages,
0624            MT6359_RG_LDO_VRFCK_EN_ADDR, MT6359_RG_LDO_VRFCK_EN_SHIFT,
0625            MT6359_DA_VRFCK_B_EN_ADDR, MT6359_RG_VRFCK_VOSEL_ADDR,
0626            MT6359_RG_VRFCK_VOSEL_MASK << MT6359_RG_VRFCK_VOSEL_SHIFT,
0627            480),
0628     MT6359_REG_FIXED("ldo_vbif28", VBIF28, MT6359_RG_LDO_VBIF28_EN_ADDR,
0629              MT6359_DA_VBIF28_B_EN_ADDR, 2800000),
0630     MT6359_LDO("ldo_vio28", VIO28, vio28_voltages,
0631            MT6359_RG_LDO_VIO28_EN_ADDR, MT6359_RG_LDO_VIO28_EN_SHIFT,
0632            MT6359_DA_VIO28_B_EN_ADDR, MT6359_RG_VIO28_VOSEL_ADDR,
0633            MT6359_RG_VIO28_VOSEL_MASK << MT6359_RG_VIO28_VOSEL_SHIFT,
0634            240),
0635     MT6359_LDO("ldo_vemc", VEMC, vemc_voltages,
0636            MT6359_RG_LDO_VEMC_EN_ADDR, MT6359_RG_LDO_VEMC_EN_SHIFT,
0637            MT6359_DA_VEMC_B_EN_ADDR, MT6359_RG_VEMC_VOSEL_ADDR,
0638            MT6359_RG_VEMC_VOSEL_MASK << MT6359_RG_VEMC_VOSEL_SHIFT,
0639            240),
0640     MT6359_LDO("ldo_vcn33_2_bt", VCN33_2_BT, vcn33_voltages,
0641            MT6359_RG_LDO_VCN33_2_EN_0_ADDR,
0642            MT6359_RG_LDO_VCN33_2_EN_0_SHIFT,
0643            MT6359_DA_VCN33_2_B_EN_ADDR, MT6359_RG_VCN33_2_VOSEL_ADDR,
0644            MT6359_RG_VCN33_2_VOSEL_MASK <<
0645            MT6359_RG_VCN33_2_VOSEL_SHIFT, 240),
0646     MT6359_LDO("ldo_vcn33_2_wifi", VCN33_2_WIFI, vcn33_voltages,
0647            MT6359_RG_LDO_VCN33_2_EN_1_ADDR,
0648            MT6359_RG_LDO_VCN33_2_EN_1_SHIFT,
0649            MT6359_DA_VCN33_2_B_EN_ADDR, MT6359_RG_VCN33_2_VOSEL_ADDR,
0650            MT6359_RG_VCN33_2_VOSEL_MASK <<
0651            MT6359_RG_VCN33_2_VOSEL_SHIFT, 240),
0652     MT6359_LDO("ldo_va12", VA12, va12_voltages,
0653            MT6359_RG_LDO_VA12_EN_ADDR, MT6359_RG_LDO_VA12_EN_SHIFT,
0654            MT6359_DA_VA12_B_EN_ADDR, MT6359_RG_VA12_VOSEL_ADDR,
0655            MT6359_RG_VA12_VOSEL_MASK << MT6359_RG_VA12_VOSEL_SHIFT,
0656            240),
0657     MT6359_LDO("ldo_va09", VA09, va09_voltages,
0658            MT6359_RG_LDO_VA09_EN_ADDR, MT6359_RG_LDO_VA09_EN_SHIFT,
0659            MT6359_DA_VA09_B_EN_ADDR, MT6359_RG_VA09_VOSEL_ADDR,
0660            MT6359_RG_VA09_VOSEL_MASK << MT6359_RG_VA09_VOSEL_SHIFT,
0661            240),
0662     MT6359_LDO("ldo_vrf18", VRF18, vrf18_voltages,
0663            MT6359_RG_LDO_VRF18_EN_ADDR, MT6359_RG_LDO_VRF18_EN_SHIFT,
0664            MT6359_DA_VRF18_B_EN_ADDR, MT6359_RG_VRF18_VOSEL_ADDR,
0665            MT6359_RG_VRF18_VOSEL_MASK << MT6359_RG_VRF18_VOSEL_SHIFT,
0666            120),
0667     MT6359_LDO_LINEAR("ldo_vsram_md", VSRAM_MD, 500000, 1100000, 6250,
0668               MT6359_RG_LDO_VSRAM_MD_EN_ADDR,
0669               MT6359_DA_VSRAM_MD_B_EN_ADDR,
0670               MT6359_RG_LDO_VSRAM_MD_VOSEL_ADDR,
0671               MT6359_RG_LDO_VSRAM_MD_VOSEL_MASK <<
0672               MT6359_RG_LDO_VSRAM_MD_VOSEL_SHIFT),
0673     MT6359_LDO("ldo_vufs", VUFS, volt18_voltages,
0674            MT6359_RG_LDO_VUFS_EN_ADDR, MT6359_RG_LDO_VUFS_EN_SHIFT,
0675            MT6359_DA_VUFS_B_EN_ADDR, MT6359_RG_VUFS_VOSEL_ADDR,
0676            MT6359_RG_VUFS_VOSEL_MASK << MT6359_RG_VUFS_VOSEL_SHIFT,
0677            1920),
0678     MT6359_LDO("ldo_vm18", VM18, volt18_voltages,
0679            MT6359_RG_LDO_VM18_EN_ADDR, MT6359_RG_LDO_VM18_EN_SHIFT,
0680            MT6359_DA_VM18_B_EN_ADDR, MT6359_RG_VM18_VOSEL_ADDR,
0681            MT6359_RG_VM18_VOSEL_MASK << MT6359_RG_VM18_VOSEL_SHIFT,
0682            1920),
0683     MT6359_LDO("ldo_vbbck", VBBCK, vbbck_voltages,
0684            MT6359_RG_LDO_VBBCK_EN_ADDR, MT6359_RG_LDO_VBBCK_EN_SHIFT,
0685            MT6359_DA_VBBCK_B_EN_ADDR, MT6359_RG_VBBCK_VOSEL_ADDR,
0686            MT6359_RG_VBBCK_VOSEL_MASK << MT6359_RG_VBBCK_VOSEL_SHIFT,
0687            240),
0688     MT6359_LDO_LINEAR("ldo_vsram_proc1", VSRAM_PROC1, 500000, 1293750, 6250,
0689               MT6359_RG_LDO_VSRAM_PROC1_EN_ADDR,
0690               MT6359_DA_VSRAM_PROC1_B_EN_ADDR,
0691               MT6359_RG_LDO_VSRAM_PROC1_VOSEL_ADDR,
0692               MT6359_RG_LDO_VSRAM_PROC1_VOSEL_MASK <<
0693               MT6359_RG_LDO_VSRAM_PROC1_VOSEL_SHIFT),
0694     MT6359_LDO("ldo_vsim2", VSIM2, vsim2_voltages,
0695            MT6359_RG_LDO_VSIM2_EN_ADDR, MT6359_RG_LDO_VSIM2_EN_SHIFT,
0696            MT6359_DA_VSIM2_B_EN_ADDR, MT6359_RG_VSIM2_VOSEL_ADDR,
0697            MT6359_RG_VSIM2_VOSEL_MASK << MT6359_RG_VSIM2_VOSEL_SHIFT,
0698            480),
0699     MT6359_LDO_LINEAR("ldo_vsram_others_sshub", VSRAM_OTHERS_SSHUB,
0700               500000, 1293750, 6250,
0701               MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_EN_ADDR,
0702               MT6359_DA_VSRAM_OTHERS_B_EN_ADDR,
0703               MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_ADDR,
0704               MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_MASK <<
0705               MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SHIFT),
0706 };
0707 
0708 static struct mt6359_regulator_info mt6359p_regulators[] = {
0709     MT6359_BUCK("buck_vs1", VS1, 800000, 2200000, 12500,
0710             MT6359_RG_BUCK_VS1_EN_ADDR,
0711             MT6359_DA_VS1_EN_ADDR, MT6359_RG_BUCK_VS1_VOSEL_ADDR,
0712             MT6359_RG_BUCK_VS1_VOSEL_MASK <<
0713             MT6359_RG_BUCK_VS1_VOSEL_SHIFT,
0714             MT6359_RG_BUCK_VS1_LP_ADDR, MT6359_RG_BUCK_VS1_LP_SHIFT,
0715             MT6359_RG_VS1_FPWM_ADDR, MT6359_RG_VS1_FPWM_SHIFT),
0716     MT6359_BUCK("buck_vgpu11", VGPU11, 400000, 1193750, 6250,
0717             MT6359_RG_BUCK_VGPU11_EN_ADDR,
0718             MT6359_DA_VGPU11_EN_ADDR, MT6359P_RG_BUCK_VGPU11_VOSEL_ADDR,
0719             MT6359_RG_BUCK_VGPU11_VOSEL_MASK <<
0720             MT6359_RG_BUCK_VGPU11_VOSEL_SHIFT,
0721             MT6359_RG_BUCK_VGPU11_LP_ADDR,
0722             MT6359_RG_BUCK_VGPU11_LP_SHIFT,
0723             MT6359_RG_VGPU11_FCCM_ADDR, MT6359_RG_VGPU11_FCCM_SHIFT),
0724     MT6359_BUCK("buck_vmodem", VMODEM, 400000, 1100000, 6250,
0725             MT6359_RG_BUCK_VMODEM_EN_ADDR,
0726             MT6359_DA_VMODEM_EN_ADDR, MT6359_RG_BUCK_VMODEM_VOSEL_ADDR,
0727             MT6359_RG_BUCK_VMODEM_VOSEL_MASK <<
0728             MT6359_RG_BUCK_VMODEM_VOSEL_SHIFT,
0729             MT6359_RG_BUCK_VMODEM_LP_ADDR,
0730             MT6359_RG_BUCK_VMODEM_LP_SHIFT,
0731             MT6359_RG_VMODEM_FCCM_ADDR, MT6359_RG_VMODEM_FCCM_SHIFT),
0732     MT6359_BUCK("buck_vpu", VPU, 400000, 1193750, 6250,
0733             MT6359_RG_BUCK_VPU_EN_ADDR,
0734             MT6359_DA_VPU_EN_ADDR, MT6359_RG_BUCK_VPU_VOSEL_ADDR,
0735             MT6359_RG_BUCK_VPU_VOSEL_MASK <<
0736             MT6359_RG_BUCK_VPU_VOSEL_SHIFT,
0737             MT6359_RG_BUCK_VPU_LP_ADDR, MT6359_RG_BUCK_VPU_LP_SHIFT,
0738             MT6359_RG_VPU_FCCM_ADDR, MT6359_RG_VPU_FCCM_SHIFT),
0739     MT6359_BUCK("buck_vcore", VCORE, 506250, 1300000, 6250,
0740             MT6359_RG_BUCK_VCORE_EN_ADDR,
0741             MT6359_DA_VCORE_EN_ADDR, MT6359P_RG_BUCK_VCORE_VOSEL_ADDR,
0742             MT6359_RG_BUCK_VCORE_VOSEL_MASK <<
0743             MT6359_RG_BUCK_VCORE_VOSEL_SHIFT,
0744             MT6359_RG_BUCK_VCORE_LP_ADDR, MT6359_RG_BUCK_VCORE_LP_SHIFT,
0745             MT6359_RG_VCORE_FCCM_ADDR, MT6359_RG_VCORE_FCCM_SHIFT),
0746     MT6359_BUCK("buck_vs2", VS2, 800000, 1600000, 12500,
0747             MT6359_RG_BUCK_VS2_EN_ADDR,
0748             MT6359_DA_VS2_EN_ADDR, MT6359_RG_BUCK_VS2_VOSEL_ADDR,
0749             MT6359_RG_BUCK_VS2_VOSEL_MASK <<
0750             MT6359_RG_BUCK_VS2_VOSEL_SHIFT,
0751             MT6359_RG_BUCK_VS2_LP_ADDR, MT6359_RG_BUCK_VS2_LP_SHIFT,
0752             MT6359_RG_VS2_FPWM_ADDR, MT6359_RG_VS2_FPWM_SHIFT),
0753     MT6359_BUCK("buck_vpa", VPA, 500000, 3650000, 50000,
0754             MT6359_RG_BUCK_VPA_EN_ADDR,
0755             MT6359_DA_VPA_EN_ADDR, MT6359_RG_BUCK_VPA_VOSEL_ADDR,
0756             MT6359_RG_BUCK_VPA_VOSEL_MASK <<
0757             MT6359_RG_BUCK_VPA_VOSEL_SHIFT,
0758             MT6359_RG_BUCK_VPA_LP_ADDR, MT6359_RG_BUCK_VPA_LP_SHIFT,
0759             MT6359_RG_VPA_MODESET_ADDR, MT6359_RG_VPA_MODESET_SHIFT),
0760     MT6359_BUCK("buck_vproc2", VPROC2, 400000, 1193750, 6250,
0761             MT6359_RG_BUCK_VPROC2_EN_ADDR,
0762             MT6359_DA_VPROC2_EN_ADDR, MT6359_RG_BUCK_VPROC2_VOSEL_ADDR,
0763             MT6359_RG_BUCK_VPROC2_VOSEL_MASK <<
0764             MT6359_RG_BUCK_VPROC2_VOSEL_SHIFT,
0765             MT6359_RG_BUCK_VPROC2_LP_ADDR,
0766             MT6359_RG_BUCK_VPROC2_LP_SHIFT,
0767             MT6359_RG_VPROC2_FCCM_ADDR, MT6359_RG_VPROC2_FCCM_SHIFT),
0768     MT6359_BUCK("buck_vproc1", VPROC1, 400000, 1193750, 6250,
0769             MT6359_RG_BUCK_VPROC1_EN_ADDR,
0770             MT6359_DA_VPROC1_EN_ADDR, MT6359_RG_BUCK_VPROC1_VOSEL_ADDR,
0771             MT6359_RG_BUCK_VPROC1_VOSEL_MASK <<
0772             MT6359_RG_BUCK_VPROC1_VOSEL_SHIFT,
0773             MT6359_RG_BUCK_VPROC1_LP_ADDR,
0774             MT6359_RG_BUCK_VPROC1_LP_SHIFT,
0775             MT6359_RG_VPROC1_FCCM_ADDR, MT6359_RG_VPROC1_FCCM_SHIFT),
0776     MT6359_BUCK("buck_vgpu11_sshub", VGPU11_SSHUB, 400000, 1193750, 6250,
0777             MT6359P_RG_BUCK_VGPU11_SSHUB_EN_ADDR,
0778             MT6359_DA_VGPU11_EN_ADDR,
0779             MT6359P_RG_BUCK_VGPU11_SSHUB_VOSEL_ADDR,
0780             MT6359P_RG_BUCK_VGPU11_SSHUB_VOSEL_MASK <<
0781             MT6359P_RG_BUCK_VGPU11_SSHUB_VOSEL_SHIFT,
0782             MT6359_RG_BUCK_VGPU11_LP_ADDR,
0783             MT6359_RG_BUCK_VGPU11_LP_SHIFT,
0784             MT6359_RG_VGPU11_FCCM_ADDR, MT6359_RG_VGPU11_FCCM_SHIFT),
0785     MT6359_REG_FIXED("ldo_vaud18", VAUD18, MT6359P_RG_LDO_VAUD18_EN_ADDR,
0786              MT6359P_DA_VAUD18_B_EN_ADDR, 1800000),
0787     MT6359_LDO("ldo_vsim1", VSIM1, vsim1_voltages,
0788            MT6359P_RG_LDO_VSIM1_EN_ADDR, MT6359P_RG_LDO_VSIM1_EN_SHIFT,
0789            MT6359P_DA_VSIM1_B_EN_ADDR, MT6359P_RG_VSIM1_VOSEL_ADDR,
0790            MT6359_RG_VSIM1_VOSEL_MASK << MT6359_RG_VSIM1_VOSEL_SHIFT,
0791            480),
0792     MT6359_LDO("ldo_vibr", VIBR, vibr_voltages,
0793            MT6359P_RG_LDO_VIBR_EN_ADDR, MT6359P_RG_LDO_VIBR_EN_SHIFT,
0794            MT6359P_DA_VIBR_B_EN_ADDR, MT6359P_RG_VIBR_VOSEL_ADDR,
0795            MT6359_RG_VIBR_VOSEL_MASK << MT6359_RG_VIBR_VOSEL_SHIFT,
0796            240),
0797     MT6359_LDO("ldo_vrf12", VRF12, vrf12_voltages,
0798            MT6359P_RG_LDO_VRF12_EN_ADDR, MT6359P_RG_LDO_VRF12_EN_SHIFT,
0799            MT6359P_DA_VRF12_B_EN_ADDR, MT6359P_RG_VRF12_VOSEL_ADDR,
0800            MT6359_RG_VRF12_VOSEL_MASK << MT6359_RG_VRF12_VOSEL_SHIFT,
0801            480),
0802     MT6359_REG_FIXED("ldo_vusb", VUSB, MT6359P_RG_LDO_VUSB_EN_0_ADDR,
0803              MT6359P_DA_VUSB_B_EN_ADDR, 3000000),
0804     MT6359_LDO_LINEAR("ldo_vsram_proc2", VSRAM_PROC2, 500000, 1293750, 6250,
0805               MT6359P_RG_LDO_VSRAM_PROC2_EN_ADDR,
0806               MT6359P_DA_VSRAM_PROC2_B_EN_ADDR,
0807               MT6359P_RG_LDO_VSRAM_PROC2_VOSEL_ADDR,
0808               MT6359_RG_LDO_VSRAM_PROC2_VOSEL_MASK <<
0809               MT6359_RG_LDO_VSRAM_PROC2_VOSEL_SHIFT),
0810     MT6359_LDO("ldo_vio18", VIO18, volt18_voltages,
0811            MT6359P_RG_LDO_VIO18_EN_ADDR, MT6359P_RG_LDO_VIO18_EN_SHIFT,
0812            MT6359P_DA_VIO18_B_EN_ADDR, MT6359P_RG_VIO18_VOSEL_ADDR,
0813            MT6359_RG_VIO18_VOSEL_MASK << MT6359_RG_VIO18_VOSEL_SHIFT,
0814            960),
0815     MT6359_LDO("ldo_vcamio", VCAMIO, volt18_voltages,
0816            MT6359P_RG_LDO_VCAMIO_EN_ADDR,
0817            MT6359P_RG_LDO_VCAMIO_EN_SHIFT,
0818            MT6359P_DA_VCAMIO_B_EN_ADDR, MT6359P_RG_VCAMIO_VOSEL_ADDR,
0819            MT6359_RG_VCAMIO_VOSEL_MASK << MT6359_RG_VCAMIO_VOSEL_SHIFT,
0820            1290),
0821     MT6359_REG_FIXED("ldo_vcn18", VCN18, MT6359P_RG_LDO_VCN18_EN_ADDR,
0822              MT6359P_DA_VCN18_B_EN_ADDR, 1800000),
0823     MT6359_REG_FIXED("ldo_vfe28", VFE28, MT6359P_RG_LDO_VFE28_EN_ADDR,
0824              MT6359P_DA_VFE28_B_EN_ADDR, 2800000),
0825     MT6359_LDO("ldo_vcn13", VCN13, vcn13_voltages,
0826            MT6359P_RG_LDO_VCN13_EN_ADDR, MT6359P_RG_LDO_VCN13_EN_SHIFT,
0827            MT6359P_DA_VCN13_B_EN_ADDR, MT6359P_RG_VCN13_VOSEL_ADDR,
0828            MT6359_RG_VCN13_VOSEL_MASK << MT6359_RG_VCN13_VOSEL_SHIFT,
0829            240),
0830     MT6359_LDO("ldo_vcn33_1_bt", VCN33_1_BT, vcn33_voltages,
0831            MT6359P_RG_LDO_VCN33_1_EN_0_ADDR,
0832            MT6359_RG_LDO_VCN33_1_EN_0_SHIFT,
0833            MT6359P_DA_VCN33_1_B_EN_ADDR, MT6359P_RG_VCN33_1_VOSEL_ADDR,
0834            MT6359_RG_VCN33_1_VOSEL_MASK <<
0835            MT6359_RG_VCN33_1_VOSEL_SHIFT, 240),
0836     MT6359_LDO("ldo_vcn33_1_wifi", VCN33_1_WIFI, vcn33_voltages,
0837            MT6359P_RG_LDO_VCN33_1_EN_1_ADDR,
0838            MT6359P_RG_LDO_VCN33_1_EN_1_SHIFT,
0839            MT6359P_DA_VCN33_1_B_EN_ADDR, MT6359P_RG_VCN33_1_VOSEL_ADDR,
0840            MT6359_RG_VCN33_1_VOSEL_MASK <<
0841            MT6359_RG_VCN33_1_VOSEL_SHIFT, 240),
0842     MT6359_REG_FIXED("ldo_vaux18", VAUX18, MT6359P_RG_LDO_VAUX18_EN_ADDR,
0843              MT6359P_DA_VAUX18_B_EN_ADDR, 1800000),
0844     MT6359_LDO_LINEAR("ldo_vsram_others", VSRAM_OTHERS, 500000, 1293750,
0845               6250,
0846               MT6359P_RG_LDO_VSRAM_OTHERS_EN_ADDR,
0847               MT6359P_DA_VSRAM_OTHERS_B_EN_ADDR,
0848               MT6359P_RG_LDO_VSRAM_OTHERS_VOSEL_ADDR,
0849               MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_MASK <<
0850               MT6359_RG_LDO_VSRAM_OTHERS_VOSEL_SHIFT),
0851     MT6359_LDO("ldo_vefuse", VEFUSE, vefuse_voltages,
0852            MT6359P_RG_LDO_VEFUSE_EN_ADDR,
0853            MT6359P_RG_LDO_VEFUSE_EN_SHIFT,
0854            MT6359P_DA_VEFUSE_B_EN_ADDR, MT6359P_RG_VEFUSE_VOSEL_ADDR,
0855            MT6359_RG_VEFUSE_VOSEL_MASK << MT6359_RG_VEFUSE_VOSEL_SHIFT,
0856            240),
0857     MT6359_LDO("ldo_vxo22", VXO22, vxo22_voltages,
0858            MT6359P_RG_LDO_VXO22_EN_ADDR, MT6359P_RG_LDO_VXO22_EN_SHIFT,
0859            MT6359P_DA_VXO22_B_EN_ADDR, MT6359P_RG_VXO22_VOSEL_ADDR,
0860            MT6359_RG_VXO22_VOSEL_MASK << MT6359_RG_VXO22_VOSEL_SHIFT,
0861            480),
0862     MT6359_LDO("ldo_vrfck_1", VRFCK, vrfck_voltages_1,
0863            MT6359P_RG_LDO_VRFCK_EN_ADDR, MT6359P_RG_LDO_VRFCK_EN_SHIFT,
0864            MT6359P_DA_VRFCK_B_EN_ADDR, MT6359P_RG_VRFCK_VOSEL_ADDR,
0865            MT6359_RG_VRFCK_VOSEL_MASK << MT6359_RG_VRFCK_VOSEL_SHIFT,
0866            480),
0867     MT6359_REG_FIXED("ldo_vbif28", VBIF28, MT6359P_RG_LDO_VBIF28_EN_ADDR,
0868              MT6359P_DA_VBIF28_B_EN_ADDR, 2800000),
0869     MT6359_LDO("ldo_vio28", VIO28, vio28_voltages,
0870            MT6359P_RG_LDO_VIO28_EN_ADDR, MT6359P_RG_LDO_VIO28_EN_SHIFT,
0871            MT6359P_DA_VIO28_B_EN_ADDR, MT6359P_RG_VIO28_VOSEL_ADDR,
0872            MT6359_RG_VIO28_VOSEL_MASK << MT6359_RG_VIO28_VOSEL_SHIFT,
0873            1920),
0874     MT6359P_LDO1("ldo_vemc_1", VEMC, mt6359p_vemc_ops, vemc_voltages_1,
0875              MT6359P_RG_LDO_VEMC_EN_ADDR, MT6359P_RG_LDO_VEMC_EN_SHIFT,
0876              MT6359P_DA_VEMC_B_EN_ADDR,
0877              MT6359P_RG_LDO_VEMC_VOSEL_0_ADDR,
0878              MT6359P_RG_LDO_VEMC_VOSEL_0_MASK <<
0879              MT6359P_RG_LDO_VEMC_VOSEL_0_SHIFT),
0880     MT6359_LDO("ldo_vcn33_2_bt", VCN33_2_BT, vcn33_voltages,
0881            MT6359P_RG_LDO_VCN33_2_EN_0_ADDR,
0882            MT6359P_RG_LDO_VCN33_2_EN_0_SHIFT,
0883            MT6359P_DA_VCN33_2_B_EN_ADDR, MT6359P_RG_VCN33_2_VOSEL_ADDR,
0884            MT6359_RG_VCN33_2_VOSEL_MASK <<
0885            MT6359_RG_VCN33_2_VOSEL_SHIFT, 240),
0886     MT6359_LDO("ldo_vcn33_2_wifi", VCN33_2_WIFI, vcn33_voltages,
0887            MT6359P_RG_LDO_VCN33_2_EN_1_ADDR,
0888            MT6359_RG_LDO_VCN33_2_EN_1_SHIFT,
0889            MT6359P_DA_VCN33_2_B_EN_ADDR, MT6359P_RG_VCN33_2_VOSEL_ADDR,
0890            MT6359_RG_VCN33_2_VOSEL_MASK <<
0891            MT6359_RG_VCN33_2_VOSEL_SHIFT, 240),
0892     MT6359_LDO("ldo_va12", VA12, va12_voltages,
0893            MT6359P_RG_LDO_VA12_EN_ADDR, MT6359P_RG_LDO_VA12_EN_SHIFT,
0894            MT6359P_DA_VA12_B_EN_ADDR, MT6359P_RG_VA12_VOSEL_ADDR,
0895            MT6359_RG_VA12_VOSEL_MASK << MT6359_RG_VA12_VOSEL_SHIFT,
0896            960),
0897     MT6359_LDO("ldo_va09", VA09, va09_voltages,
0898            MT6359P_RG_LDO_VA09_EN_ADDR, MT6359P_RG_LDO_VA09_EN_SHIFT,
0899            MT6359P_DA_VA09_B_EN_ADDR, MT6359P_RG_VA09_VOSEL_ADDR,
0900            MT6359_RG_VA09_VOSEL_MASK << MT6359_RG_VA09_VOSEL_SHIFT,
0901            960),
0902     MT6359_LDO("ldo_vrf18", VRF18, vrf18_voltages,
0903            MT6359P_RG_LDO_VRF18_EN_ADDR, MT6359P_RG_LDO_VRF18_EN_SHIFT,
0904            MT6359P_DA_VRF18_B_EN_ADDR, MT6359P_RG_VRF18_VOSEL_ADDR,
0905            MT6359_RG_VRF18_VOSEL_MASK << MT6359_RG_VRF18_VOSEL_SHIFT,
0906            240),
0907     MT6359_LDO_LINEAR("ldo_vsram_md", VSRAM_MD, 500000, 1293750, 6250,
0908               MT6359P_RG_LDO_VSRAM_MD_EN_ADDR,
0909               MT6359P_DA_VSRAM_MD_B_EN_ADDR,
0910               MT6359P_RG_LDO_VSRAM_MD_VOSEL_ADDR,
0911               MT6359_RG_LDO_VSRAM_MD_VOSEL_MASK <<
0912               MT6359_RG_LDO_VSRAM_MD_VOSEL_SHIFT),
0913     MT6359_LDO("ldo_vufs", VUFS, volt18_voltages,
0914            MT6359P_RG_LDO_VUFS_EN_ADDR, MT6359P_RG_LDO_VUFS_EN_SHIFT,
0915            MT6359P_DA_VUFS_B_EN_ADDR, MT6359P_RG_VUFS_VOSEL_ADDR,
0916            MT6359_RG_VUFS_VOSEL_MASK << MT6359_RG_VUFS_VOSEL_SHIFT,
0917            1920),
0918     MT6359_LDO("ldo_vm18", VM18, volt18_voltages,
0919            MT6359P_RG_LDO_VM18_EN_ADDR, MT6359P_RG_LDO_VM18_EN_SHIFT,
0920            MT6359P_DA_VM18_B_EN_ADDR, MT6359P_RG_VM18_VOSEL_ADDR,
0921            MT6359_RG_VM18_VOSEL_MASK << MT6359_RG_VM18_VOSEL_SHIFT,
0922            1920),
0923     MT6359_LDO("ldo_vbbck", VBBCK, vbbck_voltages,
0924            MT6359P_RG_LDO_VBBCK_EN_ADDR, MT6359P_RG_LDO_VBBCK_EN_SHIFT,
0925            MT6359P_DA_VBBCK_B_EN_ADDR, MT6359P_RG_VBBCK_VOSEL_ADDR,
0926            MT6359P_RG_VBBCK_VOSEL_MASK << MT6359P_RG_VBBCK_VOSEL_SHIFT,
0927            480),
0928     MT6359_LDO_LINEAR("ldo_vsram_proc1", VSRAM_PROC1, 500000, 1293750, 6250,
0929               MT6359P_RG_LDO_VSRAM_PROC1_EN_ADDR,
0930               MT6359P_DA_VSRAM_PROC1_B_EN_ADDR,
0931               MT6359P_RG_LDO_VSRAM_PROC1_VOSEL_ADDR,
0932               MT6359_RG_LDO_VSRAM_PROC1_VOSEL_MASK <<
0933               MT6359_RG_LDO_VSRAM_PROC1_VOSEL_SHIFT),
0934     MT6359_LDO("ldo_vsim2", VSIM2, vsim2_voltages,
0935            MT6359P_RG_LDO_VSIM2_EN_ADDR, MT6359P_RG_LDO_VSIM2_EN_SHIFT,
0936            MT6359P_DA_VSIM2_B_EN_ADDR, MT6359P_RG_VSIM2_VOSEL_ADDR,
0937            MT6359_RG_VSIM2_VOSEL_MASK << MT6359_RG_VSIM2_VOSEL_SHIFT,
0938            480),
0939     MT6359_LDO_LINEAR("ldo_vsram_others_sshub", VSRAM_OTHERS_SSHUB,
0940               500000, 1293750, 6250,
0941               MT6359P_RG_LDO_VSRAM_OTHERS_SSHUB_EN_ADDR,
0942               MT6359P_DA_VSRAM_OTHERS_B_EN_ADDR,
0943               MT6359P_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_ADDR,
0944               MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_MASK <<
0945               MT6359_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SHIFT),
0946 };
0947 
0948 static int mt6359_regulator_probe(struct platform_device *pdev)
0949 {
0950     struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent);
0951     struct regulator_config config = {};
0952     struct regulator_dev *rdev;
0953     struct mt6359_regulator_info *mt6359_info;
0954     int i, hw_ver;
0955 
0956     regmap_read(mt6397->regmap, MT6359P_HWCID, &hw_ver);
0957     if (hw_ver >= MT6359P_CHIP_VER)
0958         mt6359_info = mt6359p_regulators;
0959     else
0960         mt6359_info = mt6359_regulators;
0961 
0962     config.dev = mt6397->dev;
0963     config.regmap = mt6397->regmap;
0964     for (i = 0; i < MT6359_MAX_REGULATOR; i++, mt6359_info++) {
0965         config.driver_data = mt6359_info;
0966         rdev = devm_regulator_register(&pdev->dev, &mt6359_info->desc, &config);
0967         if (IS_ERR(rdev)) {
0968             dev_err(&pdev->dev, "failed to register %s\n", mt6359_info->desc.name);
0969             return PTR_ERR(rdev);
0970         }
0971     }
0972 
0973     return 0;
0974 }
0975 
0976 static const struct platform_device_id mt6359_platform_ids[] = {
0977     {"mt6359-regulator", 0},
0978     { /* sentinel */ },
0979 };
0980 MODULE_DEVICE_TABLE(platform, mt6359_platform_ids);
0981 
0982 static struct platform_driver mt6359_regulator_driver = {
0983     .driver = {
0984         .name = "mt6359-regulator",
0985     },
0986     .probe = mt6359_regulator_probe,
0987     .id_table = mt6359_platform_ids,
0988 };
0989 
0990 module_platform_driver(mt6359_regulator_driver);
0991 
0992 MODULE_AUTHOR("Wen Su <wen.su@mediatek.com>");
0993 MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6359 PMIC");
0994 MODULE_LICENSE("GPL");
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