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0007 #include <linux/i2c.h>
0008 #include <linux/init.h>
0009 #include <linux/interrupt.h>
0010 #include <linux/module.h>
0011 #include <linux/kernel.h>
0012 #include <linux/of.h>
0013 #include <linux/of_device.h>
0014 #include <linux/regmap.h>
0015 #include <linux/regulator/driver.h>
0016 #include <linux/regulator/of_regulator.h>
0017
0018 #define DRIVER_NAME "ltc3589"
0019
0020 #define LTC3589_IRQSTAT 0x02
0021 #define LTC3589_SCR1 0x07
0022 #define LTC3589_OVEN 0x10
0023 #define LTC3589_SCR2 0x12
0024 #define LTC3589_PGSTAT 0x13
0025 #define LTC3589_VCCR 0x20
0026 #define LTC3589_CLIRQ 0x21
0027 #define LTC3589_B1DTV1 0x23
0028 #define LTC3589_B1DTV2 0x24
0029 #define LTC3589_VRRCR 0x25
0030 #define LTC3589_B2DTV1 0x26
0031 #define LTC3589_B2DTV2 0x27
0032 #define LTC3589_B3DTV1 0x29
0033 #define LTC3589_B3DTV2 0x2a
0034 #define LTC3589_L2DTV1 0x32
0035 #define LTC3589_L2DTV2 0x33
0036
0037 #define LTC3589_IRQSTAT_PGOOD_TIMEOUT BIT(3)
0038 #define LTC3589_IRQSTAT_UNDERVOLT_WARN BIT(4)
0039 #define LTC3589_IRQSTAT_UNDERVOLT_FAULT BIT(5)
0040 #define LTC3589_IRQSTAT_THERMAL_WARN BIT(6)
0041 #define LTC3589_IRQSTAT_THERMAL_FAULT BIT(7)
0042
0043 #define LTC3589_OVEN_SW1 BIT(0)
0044 #define LTC3589_OVEN_SW2 BIT(1)
0045 #define LTC3589_OVEN_SW3 BIT(2)
0046 #define LTC3589_OVEN_BB_OUT BIT(3)
0047 #define LTC3589_OVEN_LDO2 BIT(4)
0048 #define LTC3589_OVEN_LDO3 BIT(5)
0049 #define LTC3589_OVEN_LDO4 BIT(6)
0050 #define LTC3589_OVEN_SW_CTRL BIT(7)
0051
0052 #define LTC3589_VCCR_SW1_GO BIT(0)
0053 #define LTC3589_VCCR_SW2_GO BIT(2)
0054 #define LTC3589_VCCR_SW3_GO BIT(4)
0055 #define LTC3589_VCCR_LDO2_GO BIT(6)
0056
0057 #define LTC3589_VRRCR_SW1_RAMP_MASK GENMASK(1, 0)
0058 #define LTC3589_VRRCR_SW2_RAMP_MASK GENMASK(3, 2)
0059 #define LTC3589_VRRCR_SW3_RAMP_MASK GENMASK(5, 4)
0060 #define LTC3589_VRRCR_LDO2_RAMP_MASK GENMASK(7, 6)
0061
0062 enum ltc3589_variant {
0063 LTC3589,
0064 LTC3589_1,
0065 LTC3589_2,
0066 };
0067
0068 enum ltc3589_reg {
0069 LTC3589_SW1,
0070 LTC3589_SW2,
0071 LTC3589_SW3,
0072 LTC3589_BB_OUT,
0073 LTC3589_LDO1,
0074 LTC3589_LDO2,
0075 LTC3589_LDO3,
0076 LTC3589_LDO4,
0077 LTC3589_NUM_REGULATORS,
0078 };
0079
0080 struct ltc3589 {
0081 struct regmap *regmap;
0082 struct device *dev;
0083 enum ltc3589_variant variant;
0084 struct regulator_desc regulator_descs[LTC3589_NUM_REGULATORS];
0085 struct regulator_dev *regulators[LTC3589_NUM_REGULATORS];
0086 };
0087
0088 static const int ltc3589_ldo4[] = {
0089 2800000, 2500000, 1800000, 3300000,
0090 };
0091
0092 static const int ltc3589_12_ldo4[] = {
0093 1200000, 1800000, 2500000, 3200000,
0094 };
0095
0096 static const unsigned int ltc3589_ramp_table[] = {
0097 880, 1750, 3500, 7000
0098 };
0099
0100 static int ltc3589_set_suspend_voltage(struct regulator_dev *rdev, int uV)
0101 {
0102 struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev);
0103 int sel;
0104
0105 sel = regulator_map_voltage_linear(rdev, uV, uV);
0106 if (sel < 0)
0107 return sel;
0108
0109
0110 return regmap_update_bits(ltc3589->regmap, rdev->desc->vsel_reg + 1,
0111 rdev->desc->vsel_mask, sel);
0112 }
0113
0114 static int ltc3589_set_suspend_mode(struct regulator_dev *rdev,
0115 unsigned int mode)
0116 {
0117 struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev);
0118 int mask, bit = 0;
0119
0120
0121 mask = rdev->desc->apply_bit << 1;
0122
0123 if (mode == REGULATOR_MODE_STANDBY)
0124 bit = mask;
0125
0126 mask |= rdev->desc->apply_bit;
0127 bit |= rdev->desc->apply_bit;
0128 return regmap_update_bits(ltc3589->regmap, LTC3589_VCCR, mask, bit);
0129 }
0130
0131
0132 static const struct regulator_ops ltc3589_linear_regulator_ops = {
0133 .enable = regulator_enable_regmap,
0134 .disable = regulator_disable_regmap,
0135 .is_enabled = regulator_is_enabled_regmap,
0136 .list_voltage = regulator_list_voltage_linear,
0137 .set_voltage_sel = regulator_set_voltage_sel_regmap,
0138 .get_voltage_sel = regulator_get_voltage_sel_regmap,
0139 .set_ramp_delay = regulator_set_ramp_delay_regmap,
0140 .set_voltage_time_sel = regulator_set_voltage_time_sel,
0141 .set_suspend_voltage = ltc3589_set_suspend_voltage,
0142 .set_suspend_mode = ltc3589_set_suspend_mode,
0143 };
0144
0145
0146 static const struct regulator_ops ltc3589_fixed_regulator_ops = {
0147 .enable = regulator_enable_regmap,
0148 .disable = regulator_disable_regmap,
0149 .is_enabled = regulator_is_enabled_regmap,
0150 };
0151
0152
0153 static const struct regulator_ops ltc3589_fixed_standby_regulator_ops = {
0154 };
0155
0156
0157 static const struct regulator_ops ltc3589_table_regulator_ops = {
0158 .enable = regulator_enable_regmap,
0159 .disable = regulator_disable_regmap,
0160 .is_enabled = regulator_is_enabled_regmap,
0161 .list_voltage = regulator_list_voltage_table,
0162 .set_voltage_sel = regulator_set_voltage_sel_regmap,
0163 .get_voltage_sel = regulator_get_voltage_sel_regmap,
0164 };
0165
0166 static inline unsigned int ltc3589_scale(unsigned int uV, u32 r1, u32 r2)
0167 {
0168 uint64_t tmp;
0169
0170 if (uV == 0)
0171 return 0;
0172
0173 tmp = (uint64_t)uV * r1;
0174 do_div(tmp, r2);
0175 return uV + (unsigned int)tmp;
0176 }
0177
0178 static int ltc3589_of_parse_cb(struct device_node *np,
0179 const struct regulator_desc *desc,
0180 struct regulator_config *config)
0181 {
0182 struct ltc3589 *ltc3589 = config->driver_data;
0183 struct regulator_desc *rdesc = <c3589->regulator_descs[desc->id];
0184 u32 r[2];
0185 int ret;
0186
0187
0188 if (desc->id >= LTC3589_LDO3)
0189 return 0;
0190
0191 ret = of_property_read_u32_array(np, "lltc,fb-voltage-divider", r, 2);
0192 if (ret) {
0193 dev_err(ltc3589->dev, "Failed to parse voltage divider: %d\n",
0194 ret);
0195 return ret;
0196 }
0197
0198 if (!r[0] || !r[1])
0199 return 0;
0200
0201 rdesc->min_uV = ltc3589_scale(desc->min_uV, r[0], r[1]);
0202 rdesc->uV_step = ltc3589_scale(desc->uV_step, r[0], r[1]);
0203 rdesc->fixed_uV = ltc3589_scale(desc->fixed_uV, r[0], r[1]);
0204
0205 return 0;
0206 }
0207
0208 #define LTC3589_REG(_name, _of_name, _ops, en_bit, dtv1_reg, dtv_mask) \
0209 [LTC3589_ ## _name] = { \
0210 .name = #_name, \
0211 .of_match = of_match_ptr(#_of_name), \
0212 .regulators_node = of_match_ptr("regulators"), \
0213 .of_parse_cb = ltc3589_of_parse_cb, \
0214 .n_voltages = (dtv_mask) + 1, \
0215 .fixed_uV = (dtv_mask) ? 0 : 800000, \
0216 .ops = <c3589_ ## _ops ## _regulator_ops, \
0217 .type = REGULATOR_VOLTAGE, \
0218 .id = LTC3589_ ## _name, \
0219 .owner = THIS_MODULE, \
0220 .vsel_reg = (dtv1_reg), \
0221 .vsel_mask = (dtv_mask), \
0222 .enable_reg = (en_bit) ? LTC3589_OVEN : 0, \
0223 .enable_mask = (en_bit), \
0224 }
0225
0226 #define LTC3589_LINEAR_REG(_name, _of_name, _dtv1) \
0227 [LTC3589_ ## _name] = { \
0228 .name = #_name, \
0229 .of_match = of_match_ptr(#_of_name), \
0230 .regulators_node = of_match_ptr("regulators"), \
0231 .of_parse_cb = ltc3589_of_parse_cb, \
0232 .n_voltages = 32, \
0233 .min_uV = 362500, \
0234 .uV_step = 12500, \
0235 .ramp_delay = 1750, \
0236 .ops = <c3589_linear_regulator_ops, \
0237 .type = REGULATOR_VOLTAGE, \
0238 .id = LTC3589_ ## _name, \
0239 .owner = THIS_MODULE, \
0240 .vsel_reg = LTC3589_ ## _dtv1, \
0241 .vsel_mask = 0x1f, \
0242 .apply_reg = LTC3589_VCCR, \
0243 .apply_bit = LTC3589_VCCR_ ## _name ## _GO, \
0244 .enable_reg = LTC3589_OVEN, \
0245 .enable_mask = (LTC3589_OVEN_ ## _name), \
0246 .ramp_reg = LTC3589_VRRCR, \
0247 .ramp_mask = LTC3589_VRRCR_ ## _name ## _RAMP_MASK, \
0248 .ramp_delay_table = ltc3589_ramp_table, \
0249 .n_ramp_values = ARRAY_SIZE(ltc3589_ramp_table), \
0250 }
0251
0252
0253 #define LTC3589_FIXED_REG(_name, _of_name) \
0254 LTC3589_REG(_name, _of_name, fixed, LTC3589_OVEN_ ## _name, 0, 0)
0255
0256 static const struct regulator_desc ltc3589_regulators[] = {
0257 LTC3589_LINEAR_REG(SW1, sw1, B1DTV1),
0258 LTC3589_LINEAR_REG(SW2, sw2, B2DTV1),
0259 LTC3589_LINEAR_REG(SW3, sw3, B3DTV1),
0260 LTC3589_FIXED_REG(BB_OUT, bb-out),
0261 LTC3589_REG(LDO1, ldo1, fixed_standby, 0, 0, 0),
0262 LTC3589_LINEAR_REG(LDO2, ldo2, L2DTV1),
0263 LTC3589_FIXED_REG(LDO3, ldo3),
0264 LTC3589_REG(LDO4, ldo4, table, LTC3589_OVEN_LDO4, LTC3589_L2DTV2, 0x60),
0265 };
0266
0267 static bool ltc3589_writeable_reg(struct device *dev, unsigned int reg)
0268 {
0269 switch (reg) {
0270 case LTC3589_IRQSTAT:
0271 case LTC3589_SCR1:
0272 case LTC3589_OVEN:
0273 case LTC3589_SCR2:
0274 case LTC3589_VCCR:
0275 case LTC3589_CLIRQ:
0276 case LTC3589_B1DTV1:
0277 case LTC3589_B1DTV2:
0278 case LTC3589_VRRCR:
0279 case LTC3589_B2DTV1:
0280 case LTC3589_B2DTV2:
0281 case LTC3589_B3DTV1:
0282 case LTC3589_B3DTV2:
0283 case LTC3589_L2DTV1:
0284 case LTC3589_L2DTV2:
0285 return true;
0286 }
0287 return false;
0288 }
0289
0290 static bool ltc3589_readable_reg(struct device *dev, unsigned int reg)
0291 {
0292 switch (reg) {
0293 case LTC3589_IRQSTAT:
0294 case LTC3589_SCR1:
0295 case LTC3589_OVEN:
0296 case LTC3589_SCR2:
0297 case LTC3589_PGSTAT:
0298 case LTC3589_VCCR:
0299 case LTC3589_B1DTV1:
0300 case LTC3589_B1DTV2:
0301 case LTC3589_VRRCR:
0302 case LTC3589_B2DTV1:
0303 case LTC3589_B2DTV2:
0304 case LTC3589_B3DTV1:
0305 case LTC3589_B3DTV2:
0306 case LTC3589_L2DTV1:
0307 case LTC3589_L2DTV2:
0308 return true;
0309 }
0310 return false;
0311 }
0312
0313 static bool ltc3589_volatile_reg(struct device *dev, unsigned int reg)
0314 {
0315 switch (reg) {
0316 case LTC3589_IRQSTAT:
0317 case LTC3589_PGSTAT:
0318 case LTC3589_VCCR:
0319 return true;
0320 }
0321 return false;
0322 }
0323
0324 static const struct reg_default ltc3589_reg_defaults[] = {
0325 { LTC3589_SCR1, 0x00 },
0326 { LTC3589_OVEN, 0x00 },
0327 { LTC3589_SCR2, 0x00 },
0328 { LTC3589_VCCR, 0x00 },
0329 { LTC3589_B1DTV1, 0x19 },
0330 { LTC3589_B1DTV2, 0x19 },
0331 { LTC3589_VRRCR, 0xff },
0332 { LTC3589_B2DTV1, 0x19 },
0333 { LTC3589_B2DTV2, 0x19 },
0334 { LTC3589_B3DTV1, 0x19 },
0335 { LTC3589_B3DTV2, 0x19 },
0336 { LTC3589_L2DTV1, 0x19 },
0337 { LTC3589_L2DTV2, 0x19 },
0338 };
0339
0340 static const struct regmap_config ltc3589_regmap_config = {
0341 .reg_bits = 8,
0342 .val_bits = 8,
0343 .writeable_reg = ltc3589_writeable_reg,
0344 .readable_reg = ltc3589_readable_reg,
0345 .volatile_reg = ltc3589_volatile_reg,
0346 .max_register = LTC3589_L2DTV2,
0347 .reg_defaults = ltc3589_reg_defaults,
0348 .num_reg_defaults = ARRAY_SIZE(ltc3589_reg_defaults),
0349 .use_single_read = true,
0350 .use_single_write = true,
0351 .cache_type = REGCACHE_RBTREE,
0352 };
0353
0354 static irqreturn_t ltc3589_isr(int irq, void *dev_id)
0355 {
0356 struct ltc3589 *ltc3589 = dev_id;
0357 unsigned int i, irqstat, event;
0358
0359 regmap_read(ltc3589->regmap, LTC3589_IRQSTAT, &irqstat);
0360
0361 if (irqstat & LTC3589_IRQSTAT_THERMAL_WARN) {
0362 event = REGULATOR_EVENT_OVER_TEMP;
0363 for (i = 0; i < LTC3589_NUM_REGULATORS; i++)
0364 regulator_notifier_call_chain(ltc3589->regulators[i],
0365 event, NULL);
0366 }
0367
0368 if (irqstat & LTC3589_IRQSTAT_UNDERVOLT_WARN) {
0369 event = REGULATOR_EVENT_UNDER_VOLTAGE;
0370 for (i = 0; i < LTC3589_NUM_REGULATORS; i++)
0371 regulator_notifier_call_chain(ltc3589->regulators[i],
0372 event, NULL);
0373 }
0374
0375
0376 regmap_write(ltc3589->regmap, LTC3589_CLIRQ, 0);
0377
0378 return IRQ_HANDLED;
0379 }
0380
0381 static int ltc3589_probe(struct i2c_client *client,
0382 const struct i2c_device_id *id)
0383 {
0384 struct device *dev = &client->dev;
0385 struct regulator_desc *descs;
0386 struct ltc3589 *ltc3589;
0387 int i, ret;
0388
0389 ltc3589 = devm_kzalloc(dev, sizeof(*ltc3589), GFP_KERNEL);
0390 if (!ltc3589)
0391 return -ENOMEM;
0392
0393 i2c_set_clientdata(client, ltc3589);
0394 if (client->dev.of_node)
0395 ltc3589->variant = (enum ltc3589_variant)
0396 of_device_get_match_data(&client->dev);
0397 else
0398 ltc3589->variant = id->driver_data;
0399 ltc3589->dev = dev;
0400
0401 descs = ltc3589->regulator_descs;
0402 memcpy(descs, ltc3589_regulators, sizeof(ltc3589_regulators));
0403 if (ltc3589->variant == LTC3589) {
0404 descs[LTC3589_LDO3].fixed_uV = 1800000;
0405 descs[LTC3589_LDO4].volt_table = ltc3589_ldo4;
0406 } else {
0407 descs[LTC3589_LDO3].fixed_uV = 2800000;
0408 descs[LTC3589_LDO4].volt_table = ltc3589_12_ldo4;
0409 }
0410
0411 ltc3589->regmap = devm_regmap_init_i2c(client, <c3589_regmap_config);
0412 if (IS_ERR(ltc3589->regmap)) {
0413 ret = PTR_ERR(ltc3589->regmap);
0414 dev_err(dev, "failed to initialize regmap: %d\n", ret);
0415 return ret;
0416 }
0417
0418 for (i = 0; i < LTC3589_NUM_REGULATORS; i++) {
0419 struct regulator_desc *desc = <c3589->regulator_descs[i];
0420 struct regulator_config config = { };
0421
0422 config.dev = dev;
0423 config.driver_data = ltc3589;
0424
0425 ltc3589->regulators[i] = devm_regulator_register(dev, desc,
0426 &config);
0427 if (IS_ERR(ltc3589->regulators[i])) {
0428 ret = PTR_ERR(ltc3589->regulators[i]);
0429 dev_err(dev, "failed to register regulator %s: %d\n",
0430 desc->name, ret);
0431 return ret;
0432 }
0433 }
0434
0435 if (client->irq) {
0436 ret = devm_request_threaded_irq(dev, client->irq, NULL,
0437 ltc3589_isr,
0438 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
0439 client->name, ltc3589);
0440 if (ret) {
0441 dev_err(dev, "Failed to request IRQ: %d\n", ret);
0442 return ret;
0443 }
0444 }
0445
0446 return 0;
0447 }
0448
0449 static const struct i2c_device_id ltc3589_i2c_id[] = {
0450 { "ltc3589", LTC3589 },
0451 { "ltc3589-1", LTC3589_1 },
0452 { "ltc3589-2", LTC3589_2 },
0453 { }
0454 };
0455 MODULE_DEVICE_TABLE(i2c, ltc3589_i2c_id);
0456
0457 static const struct of_device_id __maybe_unused ltc3589_of_match[] = {
0458 {
0459 .compatible = "lltc,ltc3589",
0460 .data = (void *)LTC3589,
0461 },
0462 {
0463 .compatible = "lltc,ltc3589-1",
0464 .data = (void *)LTC3589_1,
0465 },
0466 {
0467 .compatible = "lltc,ltc3589-2",
0468 .data = (void *)LTC3589_2,
0469 },
0470 { },
0471 };
0472 MODULE_DEVICE_TABLE(of, ltc3589_of_match);
0473
0474 static struct i2c_driver ltc3589_driver = {
0475 .driver = {
0476 .name = DRIVER_NAME,
0477 .of_match_table = of_match_ptr(ltc3589_of_match),
0478 },
0479 .probe = ltc3589_probe,
0480 .id_table = ltc3589_i2c_id,
0481 };
0482 module_i2c_driver(ltc3589_driver);
0483
0484 MODULE_AUTHOR("Philipp Zabel <p.zabel@pengutronix.de>");
0485 MODULE_DESCRIPTION("Regulator driver for Linear Technology LTC3589(-1,2)");
0486 MODULE_LICENSE("GPL v2");