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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * TI LP8788 MFD - ldo regulator driver
0004  *
0005  * Copyright 2012 Texas Instruments
0006  *
0007  * Author: Milo(Woogyom) Kim <milo.kim@ti.com>
0008  */
0009 
0010 #include <linux/module.h>
0011 #include <linux/slab.h>
0012 #include <linux/err.h>
0013 #include <linux/platform_device.h>
0014 #include <linux/regulator/driver.h>
0015 #include <linux/gpio/consumer.h>
0016 #include <linux/mfd/lp8788.h>
0017 
0018 /* register address */
0019 #define LP8788_EN_LDO_A         0x0D    /* DLDO 1 ~ 8 */
0020 #define LP8788_EN_LDO_B         0x0E    /* DLDO 9 ~ 12, ALDO 1 ~ 4 */
0021 #define LP8788_EN_LDO_C         0x0F    /* ALDO 5 ~ 10 */
0022 #define LP8788_EN_SEL           0x10
0023 #define LP8788_DLDO1_VOUT       0x2E
0024 #define LP8788_DLDO2_VOUT       0x2F
0025 #define LP8788_DLDO3_VOUT       0x30
0026 #define LP8788_DLDO4_VOUT       0x31
0027 #define LP8788_DLDO5_VOUT       0x32
0028 #define LP8788_DLDO6_VOUT       0x33
0029 #define LP8788_DLDO7_VOUT       0x34
0030 #define LP8788_DLDO8_VOUT       0x35
0031 #define LP8788_DLDO9_VOUT       0x36
0032 #define LP8788_DLDO10_VOUT      0x37
0033 #define LP8788_DLDO11_VOUT      0x38
0034 #define LP8788_DLDO12_VOUT      0x39
0035 #define LP8788_ALDO1_VOUT       0x3A
0036 #define LP8788_ALDO2_VOUT       0x3B
0037 #define LP8788_ALDO3_VOUT       0x3C
0038 #define LP8788_ALDO4_VOUT       0x3D
0039 #define LP8788_ALDO5_VOUT       0x3E
0040 #define LP8788_ALDO6_VOUT       0x3F
0041 #define LP8788_ALDO7_VOUT       0x40
0042 #define LP8788_ALDO8_VOUT       0x41
0043 #define LP8788_ALDO9_VOUT       0x42
0044 #define LP8788_ALDO10_VOUT      0x43
0045 #define LP8788_DLDO1_TIMESTEP       0x44
0046 
0047 /* mask/shift bits */
0048 #define LP8788_EN_DLDO1_M       BIT(0)  /* Addr 0Dh ~ 0Fh */
0049 #define LP8788_EN_DLDO2_M       BIT(1)
0050 #define LP8788_EN_DLDO3_M       BIT(2)
0051 #define LP8788_EN_DLDO4_M       BIT(3)
0052 #define LP8788_EN_DLDO5_M       BIT(4)
0053 #define LP8788_EN_DLDO6_M       BIT(5)
0054 #define LP8788_EN_DLDO7_M       BIT(6)
0055 #define LP8788_EN_DLDO8_M       BIT(7)
0056 #define LP8788_EN_DLDO9_M       BIT(0)
0057 #define LP8788_EN_DLDO10_M      BIT(1)
0058 #define LP8788_EN_DLDO11_M      BIT(2)
0059 #define LP8788_EN_DLDO12_M      BIT(3)
0060 #define LP8788_EN_ALDO1_M       BIT(4)
0061 #define LP8788_EN_ALDO2_M       BIT(5)
0062 #define LP8788_EN_ALDO3_M       BIT(6)
0063 #define LP8788_EN_ALDO4_M       BIT(7)
0064 #define LP8788_EN_ALDO5_M       BIT(0)
0065 #define LP8788_EN_ALDO6_M       BIT(1)
0066 #define LP8788_EN_ALDO7_M       BIT(2)
0067 #define LP8788_EN_ALDO8_M       BIT(3)
0068 #define LP8788_EN_ALDO9_M       BIT(4)
0069 #define LP8788_EN_ALDO10_M      BIT(5)
0070 #define LP8788_EN_SEL_DLDO911_M     BIT(0)  /* Addr 10h */
0071 #define LP8788_EN_SEL_DLDO7_M       BIT(1)
0072 #define LP8788_EN_SEL_ALDO7_M       BIT(2)
0073 #define LP8788_EN_SEL_ALDO5_M       BIT(3)
0074 #define LP8788_EN_SEL_ALDO234_M     BIT(4)
0075 #define LP8788_EN_SEL_ALDO1_M       BIT(5)
0076 #define LP8788_VOUT_5BIT_M      0x1F    /* Addr 2Eh ~ 43h */
0077 #define LP8788_VOUT_4BIT_M      0x0F
0078 #define LP8788_VOUT_3BIT_M      0x07
0079 #define LP8788_VOUT_1BIT_M      0x01
0080 #define LP8788_STARTUP_TIME_M       0xF8    /* Addr 44h ~ 59h */
0081 #define LP8788_STARTUP_TIME_S       3
0082 
0083 #define ENABLE_TIME_USEC        32
0084 
0085 enum lp8788_ldo_id {
0086     DLDO1,
0087     DLDO2,
0088     DLDO3,
0089     DLDO4,
0090     DLDO5,
0091     DLDO6,
0092     DLDO7,
0093     DLDO8,
0094     DLDO9,
0095     DLDO10,
0096     DLDO11,
0097     DLDO12,
0098     ALDO1,
0099     ALDO2,
0100     ALDO3,
0101     ALDO4,
0102     ALDO5,
0103     ALDO6,
0104     ALDO7,
0105     ALDO8,
0106     ALDO9,
0107     ALDO10,
0108 };
0109 
0110 struct lp8788_ldo {
0111     struct lp8788 *lp;
0112     struct regulator_desc *desc;
0113     struct regulator_dev *regulator;
0114     struct gpio_desc *ena_gpiod;
0115 };
0116 
0117 /* DLDO 1, 2, 3, 9 voltage table */
0118 static const int lp8788_dldo1239_vtbl[] = {
0119     1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
0120     2600000, 2700000, 2800000, 2900000, 3000000, 2850000, 2850000, 2850000,
0121     2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000,
0122     2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000,
0123 };
0124 
0125 /* DLDO 4 voltage table */
0126 static const int lp8788_dldo4_vtbl[] = { 1800000, 3000000 };
0127 
0128 /* DLDO 5, 7, 8 and ALDO 6 voltage table */
0129 static const int lp8788_dldo578_aldo6_vtbl[] = {
0130     1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
0131     2600000, 2700000, 2800000, 2900000, 3000000, 3000000, 3000000, 3000000,
0132 };
0133 
0134 /* DLDO 6 voltage table */
0135 static const int lp8788_dldo6_vtbl[] = {
0136     3000000, 3100000, 3200000, 3300000, 3400000, 3500000, 3600000, 3600000,
0137 };
0138 
0139 /* DLDO 10, 11 voltage table */
0140 static const int lp8788_dldo1011_vtbl[] = {
0141     1100000, 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000,
0142     1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000,
0143 };
0144 
0145 /* ALDO 1 voltage table */
0146 static const int lp8788_aldo1_vtbl[] = { 1800000, 2850000 };
0147 
0148 /* ALDO 7 voltage table */
0149 static const int lp8788_aldo7_vtbl[] = {
0150     1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000,
0151 };
0152 
0153 static int lp8788_ldo_enable_time(struct regulator_dev *rdev)
0154 {
0155     struct lp8788_ldo *ldo = rdev_get_drvdata(rdev);
0156     enum lp8788_ldo_id id = rdev_get_id(rdev);
0157     u8 val, addr = LP8788_DLDO1_TIMESTEP + id;
0158 
0159     if (lp8788_read_byte(ldo->lp, addr, &val))
0160         return -EINVAL;
0161 
0162     val = (val & LP8788_STARTUP_TIME_M) >> LP8788_STARTUP_TIME_S;
0163 
0164     return ENABLE_TIME_USEC * val;
0165 }
0166 
0167 static const struct regulator_ops lp8788_ldo_voltage_table_ops = {
0168     .list_voltage = regulator_list_voltage_table,
0169     .set_voltage_sel = regulator_set_voltage_sel_regmap,
0170     .get_voltage_sel = regulator_get_voltage_sel_regmap,
0171     .enable = regulator_enable_regmap,
0172     .disable = regulator_disable_regmap,
0173     .is_enabled = regulator_is_enabled_regmap,
0174     .enable_time = lp8788_ldo_enable_time,
0175 };
0176 
0177 static const struct regulator_ops lp8788_ldo_voltage_fixed_ops = {
0178     .list_voltage = regulator_list_voltage_linear,
0179     .enable = regulator_enable_regmap,
0180     .disable = regulator_disable_regmap,
0181     .is_enabled = regulator_is_enabled_regmap,
0182     .enable_time = lp8788_ldo_enable_time,
0183 };
0184 
0185 static const struct regulator_desc lp8788_dldo_desc[] = {
0186     {
0187         .name = "dldo1",
0188         .id = DLDO1,
0189         .ops = &lp8788_ldo_voltage_table_ops,
0190         .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
0191         .volt_table = lp8788_dldo1239_vtbl,
0192         .type = REGULATOR_VOLTAGE,
0193         .owner = THIS_MODULE,
0194         .vsel_reg = LP8788_DLDO1_VOUT,
0195         .vsel_mask = LP8788_VOUT_5BIT_M,
0196         .enable_reg = LP8788_EN_LDO_A,
0197         .enable_mask = LP8788_EN_DLDO1_M,
0198     },
0199     {
0200         .name = "dldo2",
0201         .id = DLDO2,
0202         .ops = &lp8788_ldo_voltage_table_ops,
0203         .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
0204         .volt_table = lp8788_dldo1239_vtbl,
0205         .type = REGULATOR_VOLTAGE,
0206         .owner = THIS_MODULE,
0207         .vsel_reg = LP8788_DLDO2_VOUT,
0208         .vsel_mask = LP8788_VOUT_5BIT_M,
0209         .enable_reg = LP8788_EN_LDO_A,
0210         .enable_mask = LP8788_EN_DLDO2_M,
0211     },
0212     {
0213         .name = "dldo3",
0214         .id = DLDO3,
0215         .ops = &lp8788_ldo_voltage_table_ops,
0216         .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
0217         .volt_table = lp8788_dldo1239_vtbl,
0218         .type = REGULATOR_VOLTAGE,
0219         .owner = THIS_MODULE,
0220         .vsel_reg = LP8788_DLDO3_VOUT,
0221         .vsel_mask = LP8788_VOUT_5BIT_M,
0222         .enable_reg = LP8788_EN_LDO_A,
0223         .enable_mask = LP8788_EN_DLDO3_M,
0224     },
0225     {
0226         .name = "dldo4",
0227         .id = DLDO4,
0228         .ops = &lp8788_ldo_voltage_table_ops,
0229         .n_voltages = ARRAY_SIZE(lp8788_dldo4_vtbl),
0230         .volt_table = lp8788_dldo4_vtbl,
0231         .type = REGULATOR_VOLTAGE,
0232         .owner = THIS_MODULE,
0233         .vsel_reg = LP8788_DLDO4_VOUT,
0234         .vsel_mask = LP8788_VOUT_1BIT_M,
0235         .enable_reg = LP8788_EN_LDO_A,
0236         .enable_mask = LP8788_EN_DLDO4_M,
0237     },
0238     {
0239         .name = "dldo5",
0240         .id = DLDO5,
0241         .ops = &lp8788_ldo_voltage_table_ops,
0242         .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
0243         .volt_table = lp8788_dldo578_aldo6_vtbl,
0244         .type = REGULATOR_VOLTAGE,
0245         .owner = THIS_MODULE,
0246         .vsel_reg = LP8788_DLDO5_VOUT,
0247         .vsel_mask = LP8788_VOUT_4BIT_M,
0248         .enable_reg = LP8788_EN_LDO_A,
0249         .enable_mask = LP8788_EN_DLDO5_M,
0250     },
0251     {
0252         .name = "dldo6",
0253         .id = DLDO6,
0254         .ops = &lp8788_ldo_voltage_table_ops,
0255         .n_voltages = ARRAY_SIZE(lp8788_dldo6_vtbl),
0256         .volt_table = lp8788_dldo6_vtbl,
0257         .type = REGULATOR_VOLTAGE,
0258         .owner = THIS_MODULE,
0259         .vsel_reg = LP8788_DLDO6_VOUT,
0260         .vsel_mask = LP8788_VOUT_3BIT_M,
0261         .enable_reg = LP8788_EN_LDO_A,
0262         .enable_mask = LP8788_EN_DLDO6_M,
0263     },
0264     {
0265         .name = "dldo7",
0266         .id = DLDO7,
0267         .ops = &lp8788_ldo_voltage_table_ops,
0268         .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
0269         .volt_table = lp8788_dldo578_aldo6_vtbl,
0270         .type = REGULATOR_VOLTAGE,
0271         .owner = THIS_MODULE,
0272         .vsel_reg = LP8788_DLDO7_VOUT,
0273         .vsel_mask = LP8788_VOUT_4BIT_M,
0274         .enable_reg = LP8788_EN_LDO_A,
0275         .enable_mask = LP8788_EN_DLDO7_M,
0276     },
0277     {
0278         .name = "dldo8",
0279         .id = DLDO8,
0280         .ops = &lp8788_ldo_voltage_table_ops,
0281         .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
0282         .volt_table = lp8788_dldo578_aldo6_vtbl,
0283         .type = REGULATOR_VOLTAGE,
0284         .owner = THIS_MODULE,
0285         .vsel_reg = LP8788_DLDO8_VOUT,
0286         .vsel_mask = LP8788_VOUT_4BIT_M,
0287         .enable_reg = LP8788_EN_LDO_A,
0288         .enable_mask = LP8788_EN_DLDO8_M,
0289     },
0290     {
0291         .name = "dldo9",
0292         .id = DLDO9,
0293         .ops = &lp8788_ldo_voltage_table_ops,
0294         .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
0295         .volt_table = lp8788_dldo1239_vtbl,
0296         .type = REGULATOR_VOLTAGE,
0297         .owner = THIS_MODULE,
0298         .vsel_reg = LP8788_DLDO9_VOUT,
0299         .vsel_mask = LP8788_VOUT_5BIT_M,
0300         .enable_reg = LP8788_EN_LDO_B,
0301         .enable_mask = LP8788_EN_DLDO9_M,
0302     },
0303     {
0304         .name = "dldo10",
0305         .id = DLDO10,
0306         .ops = &lp8788_ldo_voltage_table_ops,
0307         .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl),
0308         .volt_table = lp8788_dldo1011_vtbl,
0309         .type = REGULATOR_VOLTAGE,
0310         .owner = THIS_MODULE,
0311         .vsel_reg = LP8788_DLDO10_VOUT,
0312         .vsel_mask = LP8788_VOUT_4BIT_M,
0313         .enable_reg = LP8788_EN_LDO_B,
0314         .enable_mask = LP8788_EN_DLDO10_M,
0315     },
0316     {
0317         .name = "dldo11",
0318         .id = DLDO11,
0319         .ops = &lp8788_ldo_voltage_table_ops,
0320         .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl),
0321         .volt_table = lp8788_dldo1011_vtbl,
0322         .type = REGULATOR_VOLTAGE,
0323         .owner = THIS_MODULE,
0324         .vsel_reg = LP8788_DLDO11_VOUT,
0325         .vsel_mask = LP8788_VOUT_4BIT_M,
0326         .enable_reg = LP8788_EN_LDO_B,
0327         .enable_mask = LP8788_EN_DLDO11_M,
0328     },
0329     {
0330         .name = "dldo12",
0331         .id = DLDO12,
0332         .ops = &lp8788_ldo_voltage_fixed_ops,
0333         .n_voltages = 1,
0334         .type = REGULATOR_VOLTAGE,
0335         .owner = THIS_MODULE,
0336         .enable_reg = LP8788_EN_LDO_B,
0337         .enable_mask = LP8788_EN_DLDO12_M,
0338         .min_uV = 2500000,
0339     },
0340 };
0341 
0342 static const struct regulator_desc lp8788_aldo_desc[] = {
0343     {
0344         .name = "aldo1",
0345         .id = ALDO1,
0346         .ops = &lp8788_ldo_voltage_table_ops,
0347         .n_voltages = ARRAY_SIZE(lp8788_aldo1_vtbl),
0348         .volt_table = lp8788_aldo1_vtbl,
0349         .type = REGULATOR_VOLTAGE,
0350         .owner = THIS_MODULE,
0351         .vsel_reg = LP8788_ALDO1_VOUT,
0352         .vsel_mask = LP8788_VOUT_1BIT_M,
0353         .enable_reg = LP8788_EN_LDO_B,
0354         .enable_mask = LP8788_EN_ALDO1_M,
0355     },
0356     {
0357         .name = "aldo2",
0358         .id = ALDO2,
0359         .ops = &lp8788_ldo_voltage_fixed_ops,
0360         .n_voltages = 1,
0361         .type = REGULATOR_VOLTAGE,
0362         .owner = THIS_MODULE,
0363         .enable_reg = LP8788_EN_LDO_B,
0364         .enable_mask = LP8788_EN_ALDO2_M,
0365         .min_uV = 2850000,
0366     },
0367     {
0368         .name = "aldo3",
0369         .id = ALDO3,
0370         .ops = &lp8788_ldo_voltage_fixed_ops,
0371         .n_voltages = 1,
0372         .type = REGULATOR_VOLTAGE,
0373         .owner = THIS_MODULE,
0374         .enable_reg = LP8788_EN_LDO_B,
0375         .enable_mask = LP8788_EN_ALDO3_M,
0376         .min_uV = 2850000,
0377     },
0378     {
0379         .name = "aldo4",
0380         .id = ALDO4,
0381         .ops = &lp8788_ldo_voltage_fixed_ops,
0382         .n_voltages = 1,
0383         .type = REGULATOR_VOLTAGE,
0384         .owner = THIS_MODULE,
0385         .enable_reg = LP8788_EN_LDO_B,
0386         .enable_mask = LP8788_EN_ALDO4_M,
0387         .min_uV = 2850000,
0388     },
0389     {
0390         .name = "aldo5",
0391         .id = ALDO5,
0392         .ops = &lp8788_ldo_voltage_fixed_ops,
0393         .n_voltages = 1,
0394         .type = REGULATOR_VOLTAGE,
0395         .owner = THIS_MODULE,
0396         .enable_reg = LP8788_EN_LDO_C,
0397         .enable_mask = LP8788_EN_ALDO5_M,
0398         .min_uV = 2850000,
0399     },
0400     {
0401         .name = "aldo6",
0402         .id = ALDO6,
0403         .ops = &lp8788_ldo_voltage_table_ops,
0404         .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
0405         .volt_table = lp8788_dldo578_aldo6_vtbl,
0406         .type = REGULATOR_VOLTAGE,
0407         .owner = THIS_MODULE,
0408         .vsel_reg = LP8788_ALDO6_VOUT,
0409         .vsel_mask = LP8788_VOUT_4BIT_M,
0410         .enable_reg = LP8788_EN_LDO_C,
0411         .enable_mask = LP8788_EN_ALDO6_M,
0412     },
0413     {
0414         .name = "aldo7",
0415         .id = ALDO7,
0416         .ops = &lp8788_ldo_voltage_table_ops,
0417         .n_voltages = ARRAY_SIZE(lp8788_aldo7_vtbl),
0418         .volt_table = lp8788_aldo7_vtbl,
0419         .type = REGULATOR_VOLTAGE,
0420         .owner = THIS_MODULE,
0421         .vsel_reg = LP8788_ALDO7_VOUT,
0422         .vsel_mask = LP8788_VOUT_3BIT_M,
0423         .enable_reg = LP8788_EN_LDO_C,
0424         .enable_mask = LP8788_EN_ALDO7_M,
0425     },
0426     {
0427         .name = "aldo8",
0428         .id = ALDO8,
0429         .ops = &lp8788_ldo_voltage_fixed_ops,
0430         .n_voltages = 1,
0431         .type = REGULATOR_VOLTAGE,
0432         .owner = THIS_MODULE,
0433         .enable_reg = LP8788_EN_LDO_C,
0434         .enable_mask = LP8788_EN_ALDO8_M,
0435         .min_uV = 2500000,
0436     },
0437     {
0438         .name = "aldo9",
0439         .id = ALDO9,
0440         .ops = &lp8788_ldo_voltage_fixed_ops,
0441         .n_voltages = 1,
0442         .type = REGULATOR_VOLTAGE,
0443         .owner = THIS_MODULE,
0444         .enable_reg = LP8788_EN_LDO_C,
0445         .enable_mask = LP8788_EN_ALDO9_M,
0446         .min_uV = 2500000,
0447     },
0448     {
0449         .name = "aldo10",
0450         .id = ALDO10,
0451         .ops = &lp8788_ldo_voltage_fixed_ops,
0452         .n_voltages = 1,
0453         .type = REGULATOR_VOLTAGE,
0454         .owner = THIS_MODULE,
0455         .enable_reg = LP8788_EN_LDO_C,
0456         .enable_mask = LP8788_EN_ALDO10_M,
0457         .min_uV = 1100000,
0458     },
0459 };
0460 
0461 static int lp8788_config_ldo_enable_mode(struct platform_device *pdev,
0462                     struct lp8788_ldo *ldo,
0463                     enum lp8788_ldo_id id)
0464 {
0465     struct lp8788 *lp = ldo->lp;
0466     enum lp8788_ext_ldo_en_id enable_id;
0467     static const u8 en_mask[] = {
0468         [EN_ALDO1]   = LP8788_EN_SEL_ALDO1_M,
0469         [EN_ALDO234] = LP8788_EN_SEL_ALDO234_M,
0470         [EN_ALDO5]   = LP8788_EN_SEL_ALDO5_M,
0471         [EN_ALDO7]   = LP8788_EN_SEL_ALDO7_M,
0472         [EN_DLDO7]   = LP8788_EN_SEL_DLDO7_M,
0473         [EN_DLDO911] = LP8788_EN_SEL_DLDO911_M,
0474     };
0475 
0476     switch (id) {
0477     case DLDO7:
0478         enable_id = EN_DLDO7;
0479         break;
0480     case DLDO9:
0481     case DLDO11:
0482         enable_id = EN_DLDO911;
0483         break;
0484     case ALDO1:
0485         enable_id = EN_ALDO1;
0486         break;
0487     case ALDO2 ... ALDO4:
0488         enable_id = EN_ALDO234;
0489         break;
0490     case ALDO5:
0491         enable_id = EN_ALDO5;
0492         break;
0493     case ALDO7:
0494         enable_id = EN_ALDO7;
0495         break;
0496     default:
0497         return 0;
0498     }
0499 
0500     /*
0501      * Do not use devm* here: the regulator core takes over the
0502      * lifecycle management of the GPIO descriptor.
0503      * FIXME: check default mode for GPIO here: high or low?
0504      */
0505     ldo->ena_gpiod = gpiod_get_index_optional(&pdev->dev,
0506                            "enable",
0507                            enable_id,
0508                            GPIOD_OUT_HIGH |
0509                            GPIOD_FLAGS_BIT_NONEXCLUSIVE);
0510     if (IS_ERR(ldo->ena_gpiod))
0511         return PTR_ERR(ldo->ena_gpiod);
0512 
0513     /* if no GPIO for ldo pin, then set default enable mode */
0514     if (!ldo->ena_gpiod)
0515         goto set_default_ldo_enable_mode;
0516 
0517     return 0;
0518 
0519 set_default_ldo_enable_mode:
0520     return lp8788_update_bits(lp, LP8788_EN_SEL, en_mask[enable_id], 0);
0521 }
0522 
0523 static int lp8788_dldo_probe(struct platform_device *pdev)
0524 {
0525     struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent);
0526     int id = pdev->id;
0527     struct lp8788_ldo *ldo;
0528     struct regulator_config cfg = { };
0529     struct regulator_dev *rdev;
0530     int ret;
0531 
0532     ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL);
0533     if (!ldo)
0534         return -ENOMEM;
0535 
0536     ldo->lp = lp;
0537     ret = lp8788_config_ldo_enable_mode(pdev, ldo, id);
0538     if (ret)
0539         return ret;
0540 
0541     if (ldo->ena_gpiod)
0542         cfg.ena_gpiod = ldo->ena_gpiod;
0543 
0544     cfg.dev = pdev->dev.parent;
0545     cfg.init_data = lp->pdata ? lp->pdata->dldo_data[id] : NULL;
0546     cfg.driver_data = ldo;
0547     cfg.regmap = lp->regmap;
0548 
0549     rdev = devm_regulator_register(&pdev->dev, &lp8788_dldo_desc[id], &cfg);
0550     if (IS_ERR(rdev)) {
0551         ret = PTR_ERR(rdev);
0552         dev_err(&pdev->dev, "DLDO%d regulator register err = %d\n",
0553                 id + 1, ret);
0554         return ret;
0555     }
0556 
0557     ldo->regulator = rdev;
0558     platform_set_drvdata(pdev, ldo);
0559 
0560     return 0;
0561 }
0562 
0563 static struct platform_driver lp8788_dldo_driver = {
0564     .probe = lp8788_dldo_probe,
0565     .driver = {
0566         .name = LP8788_DEV_DLDO,
0567     },
0568 };
0569 
0570 static int lp8788_aldo_probe(struct platform_device *pdev)
0571 {
0572     struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent);
0573     int id = pdev->id;
0574     struct lp8788_ldo *ldo;
0575     struct regulator_config cfg = { };
0576     struct regulator_dev *rdev;
0577     int ret;
0578 
0579     ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL);
0580     if (!ldo)
0581         return -ENOMEM;
0582 
0583     ldo->lp = lp;
0584     ret = lp8788_config_ldo_enable_mode(pdev, ldo, id + ALDO1);
0585     if (ret)
0586         return ret;
0587 
0588     if (ldo->ena_gpiod)
0589         cfg.ena_gpiod = ldo->ena_gpiod;
0590 
0591     cfg.dev = pdev->dev.parent;
0592     cfg.init_data = lp->pdata ? lp->pdata->aldo_data[id] : NULL;
0593     cfg.driver_data = ldo;
0594     cfg.regmap = lp->regmap;
0595 
0596     rdev = devm_regulator_register(&pdev->dev, &lp8788_aldo_desc[id], &cfg);
0597     if (IS_ERR(rdev)) {
0598         ret = PTR_ERR(rdev);
0599         dev_err(&pdev->dev, "ALDO%d regulator register err = %d\n",
0600                 id + 1, ret);
0601         return ret;
0602     }
0603 
0604     ldo->regulator = rdev;
0605     platform_set_drvdata(pdev, ldo);
0606 
0607     return 0;
0608 }
0609 
0610 static struct platform_driver lp8788_aldo_driver = {
0611     .probe = lp8788_aldo_probe,
0612     .driver = {
0613         .name = LP8788_DEV_ALDO,
0614     },
0615 };
0616 
0617 static struct platform_driver * const drivers[] = {
0618     &lp8788_dldo_driver,
0619     &lp8788_aldo_driver,
0620 };
0621 
0622 static int __init lp8788_ldo_init(void)
0623 {
0624     return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
0625 }
0626 subsys_initcall(lp8788_ldo_init);
0627 
0628 static void __exit lp8788_ldo_exit(void)
0629 {
0630     platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
0631 }
0632 module_exit(lp8788_ldo_exit);
0633 
0634 MODULE_DESCRIPTION("TI LP8788 LDO Driver");
0635 MODULE_AUTHOR("Milo Kim");
0636 MODULE_LICENSE("GPL");
0637 MODULE_ALIAS("platform:lp8788-dldo");
0638 MODULE_ALIAS("platform:lp8788-aldo");
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