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0008 #include <linux/bug.h>
0009 #include <linux/err.h>
0010 #include <linux/i2c.h>
0011 #include <linux/module.h>
0012 #include <linux/kernel.h>
0013 #include <linux/regulator/driver.h>
0014 #include <linux/regulator/lp3972.h>
0015 #include <linux/slab.h>
0016
0017 struct lp3972 {
0018 struct device *dev;
0019 struct mutex io_lock;
0020 struct i2c_client *i2c;
0021 };
0022
0023
0024 #define LP3972_SCR_REG 0x07
0025 #define LP3972_OVER1_REG 0x10
0026 #define LP3972_OVSR1_REG 0x11
0027 #define LP3972_OVER2_REG 0x12
0028 #define LP3972_OVSR2_REG 0x13
0029 #define LP3972_VCC1_REG 0x20
0030 #define LP3972_ADTV1_REG 0x23
0031 #define LP3972_ADTV2_REG 0x24
0032 #define LP3972_AVRC_REG 0x25
0033 #define LP3972_CDTC1_REG 0x26
0034 #define LP3972_CDTC2_REG 0x27
0035 #define LP3972_SDTV1_REG 0x29
0036 #define LP3972_SDTV2_REG 0x2A
0037 #define LP3972_MDTV1_REG 0x32
0038 #define LP3972_MDTV2_REG 0x33
0039 #define LP3972_L2VCR_REG 0x39
0040 #define LP3972_L34VCR_REG 0x3A
0041 #define LP3972_SCR1_REG 0x80
0042 #define LP3972_SCR2_REG 0x81
0043 #define LP3972_OEN3_REG 0x82
0044 #define LP3972_OSR3_REG 0x83
0045 #define LP3972_LOER4_REG 0x84
0046 #define LP3972_B2TV_REG 0x85
0047 #define LP3972_B3TV_REG 0x86
0048 #define LP3972_B32RC_REG 0x87
0049 #define LP3972_ISRA_REG 0x88
0050 #define LP3972_BCCR_REG 0x89
0051 #define LP3972_II1RR_REG 0x8E
0052 #define LP3972_II2RR_REG 0x8F
0053
0054 #define LP3972_SYS_CONTROL1_REG LP3972_SCR1_REG
0055
0056
0057 #define SYS_CONTROL1_INIT_VAL 0x02
0058 #define SYS_CONTROL1_INIT_MASK 0x1F
0059
0060 #define LP3972_VOL_CHANGE_REG LP3972_VCC1_REG
0061 #define LP3972_VOL_CHANGE_FLAG_GO 0x01
0062 #define LP3972_VOL_CHANGE_FLAG_MASK 0x03
0063
0064
0065 #define LP3972_OEN3_L1EN BIT(0)
0066 #define LP3972_OVER2_LDO2_EN BIT(2)
0067 #define LP3972_OVER2_LDO3_EN BIT(3)
0068 #define LP3972_OVER2_LDO4_EN BIT(4)
0069 #define LP3972_OVER1_S_EN BIT(2)
0070
0071 static const unsigned int ldo1_voltage_map[] = {
0072 1700000, 1725000, 1750000, 1775000, 1800000, 1825000, 1850000, 1875000,
0073 1900000, 1925000, 1950000, 1975000, 2000000,
0074 };
0075
0076 static const unsigned int ldo23_voltage_map[] = {
0077 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
0078 2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000,
0079 };
0080
0081 static const unsigned int ldo4_voltage_map[] = {
0082 1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000,
0083 1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000,
0084 };
0085
0086 static const unsigned int ldo5_voltage_map[] = {
0087 0, 0, 0, 0, 0, 850000, 875000, 900000,
0088 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000,
0089 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
0090 1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
0091 };
0092
0093 static const unsigned int buck1_voltage_map[] = {
0094 725000, 750000, 775000, 800000, 825000, 850000, 875000, 900000,
0095 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000,
0096 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
0097 1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
0098 };
0099
0100 static const unsigned int buck23_voltage_map[] = {
0101 0, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000,
0102 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000,
0103 1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000,
0104 3000000, 3300000,
0105 };
0106
0107 static const int ldo_output_enable_mask[] = {
0108 LP3972_OEN3_L1EN,
0109 LP3972_OVER2_LDO2_EN,
0110 LP3972_OVER2_LDO3_EN,
0111 LP3972_OVER2_LDO4_EN,
0112 LP3972_OVER1_S_EN,
0113 };
0114
0115 static const int ldo_output_enable_addr[] = {
0116 LP3972_OEN3_REG,
0117 LP3972_OVER2_REG,
0118 LP3972_OVER2_REG,
0119 LP3972_OVER2_REG,
0120 LP3972_OVER1_REG,
0121 };
0122
0123 static const int ldo_vol_ctl_addr[] = {
0124 LP3972_MDTV1_REG,
0125 LP3972_L2VCR_REG,
0126 LP3972_L34VCR_REG,
0127 LP3972_L34VCR_REG,
0128 LP3972_SDTV1_REG,
0129 };
0130
0131 static const int buck_vol_enable_addr[] = {
0132 LP3972_OVER1_REG,
0133 LP3972_OEN3_REG,
0134 LP3972_OEN3_REG,
0135 };
0136
0137 static const int buck_base_addr[] = {
0138 LP3972_ADTV1_REG,
0139 LP3972_B2TV_REG,
0140 LP3972_B3TV_REG,
0141 };
0142
0143 #define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x])
0144 #define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x])
0145
0146
0147
0148
0149
0150
0151 #define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2)
0152 #define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x])
0153 #define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6)
0154
0155 #define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f)
0156 #define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00)
0157 #define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c)
0158
0159 #define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x])
0160 #define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x])
0161 #define LP3972_BUCK_VOL_MASK 0x1f
0162
0163 static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count,
0164 u16 *dest)
0165 {
0166 int ret;
0167
0168 if (count != 1)
0169 return -EIO;
0170 ret = i2c_smbus_read_byte_data(i2c, reg);
0171 if (ret < 0)
0172 return ret;
0173
0174 *dest = ret;
0175 return 0;
0176 }
0177
0178 static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count,
0179 const u16 *src)
0180 {
0181 if (count != 1)
0182 return -EIO;
0183 return i2c_smbus_write_byte_data(i2c, reg, *src);
0184 }
0185
0186 static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg)
0187 {
0188 u16 val = 0;
0189
0190 mutex_lock(&lp3972->io_lock);
0191
0192 lp3972_i2c_read(lp3972->i2c, reg, 1, &val);
0193
0194 dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg,
0195 (unsigned)val & 0xff);
0196
0197 mutex_unlock(&lp3972->io_lock);
0198
0199 return val & 0xff;
0200 }
0201
0202 static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val)
0203 {
0204 u16 tmp;
0205 int ret;
0206
0207 mutex_lock(&lp3972->io_lock);
0208
0209 ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp);
0210 if (ret == 0) {
0211 tmp = (tmp & ~mask) | val;
0212 ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp);
0213 dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg,
0214 (unsigned)val & 0xff);
0215 }
0216 mutex_unlock(&lp3972->io_lock);
0217
0218 return ret;
0219 }
0220
0221 static int lp3972_ldo_is_enabled(struct regulator_dev *dev)
0222 {
0223 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
0224 int ldo = rdev_get_id(dev) - LP3972_LDO1;
0225 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
0226 u16 val;
0227
0228 val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo));
0229 return !!(val & mask);
0230 }
0231
0232 static int lp3972_ldo_enable(struct regulator_dev *dev)
0233 {
0234 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
0235 int ldo = rdev_get_id(dev) - LP3972_LDO1;
0236 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
0237
0238 return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
0239 mask, mask);
0240 }
0241
0242 static int lp3972_ldo_disable(struct regulator_dev *dev)
0243 {
0244 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
0245 int ldo = rdev_get_id(dev) - LP3972_LDO1;
0246 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
0247
0248 return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
0249 mask, 0);
0250 }
0251
0252 static int lp3972_ldo_get_voltage_sel(struct regulator_dev *dev)
0253 {
0254 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
0255 int ldo = rdev_get_id(dev) - LP3972_LDO1;
0256 u16 mask = LP3972_LDO_VOL_MASK(ldo);
0257 u16 val, reg;
0258
0259 reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo));
0260 val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask;
0261
0262 return val;
0263 }
0264
0265 static int lp3972_ldo_set_voltage_sel(struct regulator_dev *dev,
0266 unsigned int selector)
0267 {
0268 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
0269 int ldo = rdev_get_id(dev) - LP3972_LDO1;
0270 int shift, ret;
0271
0272 shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo);
0273 ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo),
0274 LP3972_LDO_VOL_MASK(ldo) << shift, selector << shift);
0275
0276 if (ret)
0277 return ret;
0278
0279
0280
0281
0282
0283
0284
0285
0286 switch (ldo) {
0287 case LP3972_LDO1:
0288 case LP3972_LDO5:
0289 shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo);
0290 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
0291 LP3972_VOL_CHANGE_FLAG_MASK << shift,
0292 LP3972_VOL_CHANGE_FLAG_GO << shift);
0293 if (ret)
0294 return ret;
0295
0296 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
0297 LP3972_VOL_CHANGE_FLAG_MASK << shift, 0);
0298 break;
0299 }
0300
0301 return ret;
0302 }
0303
0304 static const struct regulator_ops lp3972_ldo_ops = {
0305 .list_voltage = regulator_list_voltage_table,
0306 .map_voltage = regulator_map_voltage_ascend,
0307 .is_enabled = lp3972_ldo_is_enabled,
0308 .enable = lp3972_ldo_enable,
0309 .disable = lp3972_ldo_disable,
0310 .get_voltage_sel = lp3972_ldo_get_voltage_sel,
0311 .set_voltage_sel = lp3972_ldo_set_voltage_sel,
0312 };
0313
0314 static int lp3972_dcdc_is_enabled(struct regulator_dev *dev)
0315 {
0316 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
0317 int buck = rdev_get_id(dev) - LP3972_DCDC1;
0318 u16 mask = 1 << (buck * 2);
0319 u16 val;
0320
0321 val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck));
0322 return !!(val & mask);
0323 }
0324
0325 static int lp3972_dcdc_enable(struct regulator_dev *dev)
0326 {
0327 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
0328 int buck = rdev_get_id(dev) - LP3972_DCDC1;
0329 u16 mask = 1 << (buck * 2);
0330 u16 val;
0331
0332 val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
0333 mask, mask);
0334 return val;
0335 }
0336
0337 static int lp3972_dcdc_disable(struct regulator_dev *dev)
0338 {
0339 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
0340 int buck = rdev_get_id(dev) - LP3972_DCDC1;
0341 u16 mask = 1 << (buck * 2);
0342 u16 val;
0343
0344 val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
0345 mask, 0);
0346 return val;
0347 }
0348
0349 static int lp3972_dcdc_get_voltage_sel(struct regulator_dev *dev)
0350 {
0351 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
0352 int buck = rdev_get_id(dev) - LP3972_DCDC1;
0353 u16 reg;
0354
0355 reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck));
0356 reg &= LP3972_BUCK_VOL_MASK;
0357
0358 return reg;
0359 }
0360
0361 static int lp3972_dcdc_set_voltage_sel(struct regulator_dev *dev,
0362 unsigned int selector)
0363 {
0364 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
0365 int buck = rdev_get_id(dev) - LP3972_DCDC1;
0366 int ret;
0367
0368 ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck),
0369 LP3972_BUCK_VOL_MASK, selector);
0370 if (ret)
0371 return ret;
0372
0373 if (buck != 0)
0374 return ret;
0375
0376 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
0377 LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO);
0378 if (ret)
0379 return ret;
0380
0381 return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
0382 LP3972_VOL_CHANGE_FLAG_MASK, 0);
0383 }
0384
0385 static const struct regulator_ops lp3972_dcdc_ops = {
0386 .list_voltage = regulator_list_voltage_table,
0387 .map_voltage = regulator_map_voltage_ascend,
0388 .is_enabled = lp3972_dcdc_is_enabled,
0389 .enable = lp3972_dcdc_enable,
0390 .disable = lp3972_dcdc_disable,
0391 .get_voltage_sel = lp3972_dcdc_get_voltage_sel,
0392 .set_voltage_sel = lp3972_dcdc_set_voltage_sel,
0393 };
0394
0395 static const struct regulator_desc regulators[] = {
0396 {
0397 .name = "LDO1",
0398 .id = LP3972_LDO1,
0399 .ops = &lp3972_ldo_ops,
0400 .n_voltages = ARRAY_SIZE(ldo1_voltage_map),
0401 .volt_table = ldo1_voltage_map,
0402 .type = REGULATOR_VOLTAGE,
0403 .owner = THIS_MODULE,
0404 },
0405 {
0406 .name = "LDO2",
0407 .id = LP3972_LDO2,
0408 .ops = &lp3972_ldo_ops,
0409 .n_voltages = ARRAY_SIZE(ldo23_voltage_map),
0410 .volt_table = ldo23_voltage_map,
0411 .type = REGULATOR_VOLTAGE,
0412 .owner = THIS_MODULE,
0413 },
0414 {
0415 .name = "LDO3",
0416 .id = LP3972_LDO3,
0417 .ops = &lp3972_ldo_ops,
0418 .n_voltages = ARRAY_SIZE(ldo23_voltage_map),
0419 .volt_table = ldo23_voltage_map,
0420 .type = REGULATOR_VOLTAGE,
0421 .owner = THIS_MODULE,
0422 },
0423 {
0424 .name = "LDO4",
0425 .id = LP3972_LDO4,
0426 .ops = &lp3972_ldo_ops,
0427 .n_voltages = ARRAY_SIZE(ldo4_voltage_map),
0428 .volt_table = ldo4_voltage_map,
0429 .type = REGULATOR_VOLTAGE,
0430 .owner = THIS_MODULE,
0431 },
0432 {
0433 .name = "LDO5",
0434 .id = LP3972_LDO5,
0435 .ops = &lp3972_ldo_ops,
0436 .n_voltages = ARRAY_SIZE(ldo5_voltage_map),
0437 .volt_table = ldo5_voltage_map,
0438 .type = REGULATOR_VOLTAGE,
0439 .owner = THIS_MODULE,
0440 },
0441 {
0442 .name = "DCDC1",
0443 .id = LP3972_DCDC1,
0444 .ops = &lp3972_dcdc_ops,
0445 .n_voltages = ARRAY_SIZE(buck1_voltage_map),
0446 .volt_table = buck1_voltage_map,
0447 .type = REGULATOR_VOLTAGE,
0448 .owner = THIS_MODULE,
0449 },
0450 {
0451 .name = "DCDC2",
0452 .id = LP3972_DCDC2,
0453 .ops = &lp3972_dcdc_ops,
0454 .n_voltages = ARRAY_SIZE(buck23_voltage_map),
0455 .volt_table = buck23_voltage_map,
0456 .type = REGULATOR_VOLTAGE,
0457 .owner = THIS_MODULE,
0458 },
0459 {
0460 .name = "DCDC3",
0461 .id = LP3972_DCDC3,
0462 .ops = &lp3972_dcdc_ops,
0463 .n_voltages = ARRAY_SIZE(buck23_voltage_map),
0464 .volt_table = buck23_voltage_map,
0465 .type = REGULATOR_VOLTAGE,
0466 .owner = THIS_MODULE,
0467 },
0468 };
0469
0470 static int setup_regulators(struct lp3972 *lp3972,
0471 struct lp3972_platform_data *pdata)
0472 {
0473 int i, err;
0474
0475
0476 for (i = 0; i < pdata->num_regulators; i++) {
0477 struct lp3972_regulator_subdev *reg = &pdata->regulators[i];
0478 struct regulator_config config = { };
0479 struct regulator_dev *rdev;
0480
0481 config.dev = lp3972->dev;
0482 config.init_data = reg->initdata;
0483 config.driver_data = lp3972;
0484
0485 rdev = devm_regulator_register(lp3972->dev,
0486 ®ulators[reg->id], &config);
0487 if (IS_ERR(rdev)) {
0488 err = PTR_ERR(rdev);
0489 dev_err(lp3972->dev, "regulator init failed: %d\n",
0490 err);
0491 return err;
0492 }
0493 }
0494
0495 return 0;
0496 }
0497
0498 static int lp3972_i2c_probe(struct i2c_client *i2c,
0499 const struct i2c_device_id *id)
0500 {
0501 struct lp3972 *lp3972;
0502 struct lp3972_platform_data *pdata = dev_get_platdata(&i2c->dev);
0503 int ret;
0504 u16 val;
0505
0506 if (!pdata) {
0507 dev_dbg(&i2c->dev, "No platform init data supplied\n");
0508 return -ENODEV;
0509 }
0510
0511 lp3972 = devm_kzalloc(&i2c->dev, sizeof(struct lp3972), GFP_KERNEL);
0512 if (!lp3972)
0513 return -ENOMEM;
0514
0515 lp3972->i2c = i2c;
0516 lp3972->dev = &i2c->dev;
0517
0518 mutex_init(&lp3972->io_lock);
0519
0520
0521 ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val);
0522 if (ret == 0 &&
0523 (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) {
0524 ret = -ENODEV;
0525 dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val);
0526 }
0527 if (ret < 0) {
0528 dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret);
0529 return ret;
0530 }
0531
0532 ret = setup_regulators(lp3972, pdata);
0533 if (ret < 0)
0534 return ret;
0535
0536 i2c_set_clientdata(i2c, lp3972);
0537 return 0;
0538 }
0539
0540 static const struct i2c_device_id lp3972_i2c_id[] = {
0541 { "lp3972", 0 },
0542 { }
0543 };
0544 MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id);
0545
0546 static struct i2c_driver lp3972_i2c_driver = {
0547 .driver = {
0548 .name = "lp3972",
0549 },
0550 .probe = lp3972_i2c_probe,
0551 .id_table = lp3972_i2c_id,
0552 };
0553
0554 static int __init lp3972_module_init(void)
0555 {
0556 return i2c_add_driver(&lp3972_i2c_driver);
0557 }
0558 subsys_initcall(lp3972_module_init);
0559
0560 static void __exit lp3972_module_exit(void)
0561 {
0562 i2c_del_driver(&lp3972_i2c_driver);
0563 }
0564 module_exit(lp3972_module_exit);
0565
0566 MODULE_LICENSE("GPL");
0567 MODULE_AUTHOR("Axel Lin <axel.lin@gmail.com>");
0568 MODULE_DESCRIPTION("LP3972 PMIC driver");