drivers/regulator/da9210-regulator.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  * da9210-regulator.h - Regulator definitions for DA9210
0004  * Copyright (C) 2013  Dialog Semiconductor Ltd.
0005  */
0006
0007 #ifndef __DA9210_REGISTERS_H__
0008 #define __DA9210_REGISTERS_H__
0009
0010 struct da9210_pdata {
0011     struct regulator_init_data da9210_constraints;
0012 };
0013
0014 /* Page selection */
0015 #define DA9210_REG_PAGE_CON         0x00
0016
0017 /* System Control and Event Registers */
0018 #define DA9210_REG_STATUS_A         0x50
0019 #define DA9210_REG_STATUS_B         0x51
0020 #define DA9210_REG_EVENT_A          0x52
0021 #define DA9210_REG_EVENT_B          0x53
0022 #define DA9210_REG_MASK_A           0x54
0023 #define DA9210_REG_MASK_B           0x55
0024 #define DA9210_REG_CONTROL_A            0x56
0025
0026 /* GPIO Control Registers */
0027 #define DA9210_REG_GPIO_0_1         0x58
0028 #define DA9210_REG_GPIO_2_3         0x59
0029 #define DA9210_REG_GPIO_4_5         0x5A
0030 #define DA9210_REG_GPIO_6           0x5B
0031
0032 /* Regulator Registers */
0033 #define DA9210_REG_BUCK_CONT            0x5D
0034 #define DA9210_REG_BUCK_ILIM            0xD0
0035 #define DA9210_REG_BUCK_CONF1           0xD1
0036 #define DA9210_REG_BUCK_CONF2           0xD2
0037 #define DA9210_REG_VBACK_AUTO           0xD4
0038 #define DA9210_REG_VBACK_BASE           0xD5
0039 #define DA9210_REG_VBACK_MAX_DVC_IF     0xD6
0040 #define DA9210_REG_VBACK_DVC            0xD7
0041 #define DA9210_REG_VBUCK_A          0xD8
0042 #define DA9210_REG_VBUCK_B          0xD9
0043
0044 /* I2C Interface Settings */
0045 #define DA9210_REG_INTERFACE            0x105
0046
0047 /* OTP */
0048 #define DA9210_REG_OPT_COUNT            0x140
0049 #define DA9210_REG_OPT_ADDR         0x141
0050 #define DA9210_REG_OPT_DATA         0x142
0051
0052 /* Customer Trim and Configuration */
0053 #define DA9210_REG_CONFIG_A         0x143
0054 #define DA9210_REG_CONFIG_B         0x144
0055 #define DA9210_REG_CONFIG_C         0x145
0056 #define DA9210_REG_CONFIG_D         0x146
0057 #define DA9210_REG_CONFIG_E         0x147
0058
0059
0060 /*
0061  * Registers bits
0062  */
0063 /* DA9210_REG_PAGE_CON (addr=0x00) */
0064 #define DA9210_PEG_PAGE_SHIFT           0
0065 #define DA9210_REG_PAGE_MASK            0x0F
0066 /* On I2C registers 0x00 - 0xFF */
0067 #define DA9210_REG_PAGE0            0
0068 /* On I2C registers 0x100 - 0x1FF */
0069 #define DA9210_REG_PAGE2            2
0070 #define DA9210_PAGE_WRITE_MODE          0x00
0071 #define DA9210_REPEAT_WRITE_MODE        0x40
0072 #define DA9210_PAGE_REVERT          0x80
0073
0074 /* DA9210_REG_STATUS_A (addr=0x50) */
0075 #define DA9210_GPI0             0x01
0076 #define DA9210_GPI1             0x02
0077 #define DA9210_GPI2             0x04
0078 #define DA9210_GPI3             0x08
0079 #define DA9210_GPI4             0x10
0080 #define DA9210_GPI5             0x20
0081 #define DA9210_GPI6             0x40
0082
0083 /* DA9210_REG_EVENT_A (addr=0x52) */
0084 #define DA9210_E_GPI0               0x01
0085 #define DA9210_E_GPI1               0x02
0086 #define DA9210_E_GPI2               0x04
0087 #define DA9210_E_GPI3               0x08
0088 #define DA9210_E_GPI4               0x10
0089 #define DA9210_E_GPI5               0x20
0090 #define DA9210_E_GPI6               0x40
0091
0092 /* DA9210_REG_EVENT_B (addr=0x53) */
0093 #define DA9210_E_OVCURR             0x01
0094 #define DA9210_E_NPWRGOOD           0x02
0095 #define DA9210_E_TEMP_WARN          0x04
0096 #define DA9210_E_TEMP_CRIT          0x08
0097 #define DA9210_E_VMAX               0x10
0098
0099 /* DA9210_REG_MASK_A (addr=0x54) */
0100 #define DA9210_M_GPI0               0x01
0101 #define DA9210_M_GPI1               0x02
0102 #define DA9210_M_GPI2               0x04
0103 #define DA9210_M_GPI3               0x08
0104 #define DA9210_M_GPI4               0x10
0105 #define DA9210_M_GPI5               0x20
0106 #define DA9210_M_GPI6               0x40
0107
0108 /* DA9210_REG_MASK_B (addr=0x55) */
0109 #define DA9210_M_OVCURR             0x01
0110 #define DA9210_M_NPWRGOOD           0x02
0111 #define DA9210_M_TEMP_WARN          0x04
0112 #define DA9210_M_TEMP_CRIT          0x08
0113 #define DA9210_M_VMAX               0x10
0114
0115 /* DA9210_REG_CONTROL_A (addr=0x56) */
0116 #define DA9210_DEBOUNCING_SHIFT         0
0117 #define DA9210_DEBOUNCING_MASK          0x07
0118 #define DA9210_SLEW_RATE_SHIFT          3
0119 #define DA9210_SLEW_RATE_MASK           0x18
0120 #define DA9210_V_LOCK               0x20
0121
0122 /* DA9210_REG_GPIO_0_1 (addr=0x58) */
0123 #define DA9210_GPIO0_PIN_SHIFT          0
0124 #define DA9210_GPIO0_PIN_MASK           0x03
0125 #define     DA9210_GPIO0_PIN_GPI        0x00
0126 #define     DA9210_GPIO0_PIN_GPO_OD     0x02
0127 #define     DA9210_GPIO0_PIN_GPO        0x03
0128 #define DA9210_GPIO0_TYPE           0x04
0129 #define     DA9210_GPIO0_TYPE_GPI       0x00
0130 #define     DA9210_GPIO0_TYPE_GPO       0x04
0131 #define DA9210_GPIO0_MODE           0x08
0132 #define DA9210_GPIO1_PIN_SHIFT          4
0133 #define DA9210_GPIO1_PIN_MASK           0x30
0134 #define     DA9210_GPIO1_PIN_GPI        0x00
0135 #define     DA9210_GPIO1_PIN_VERROR     0x10
0136 #define     DA9210_GPIO1_PIN_GPO_OD     0x20
0137 #define     DA9210_GPIO1_PIN_GPO        0x30
0138 #define DA9210_GPIO1_TYPE_SHIFT         0x40
0139 #define     DA9210_GPIO1_TYPE_GPI       0x00
0140 #define     DA9210_GPIO1_TYPE_GPO       0x40
0141 #define DA9210_GPIO1_MODE           0x80
0142
0143 /* DA9210_REG_GPIO_2_3 (addr=0x59) */
0144 #define DA9210_GPIO2_PIN_SHIFT          0
0145 #define DA9210_GPIO2_PIN_MASK           0x03
0146 #define     DA9210_GPIO2_PIN_GPI        0x00
0147 #define     DA9210_GPIO5_PIN_BUCK_CLK   0x10
0148 #define     DA9210_GPIO2_PIN_GPO_OD     0x02
0149 #define     DA9210_GPIO2_PIN_GPO        0x03
0150 #define DA9210_GPIO2_TYPE           0x04
0151 #define     DA9210_GPIO2_TYPE_GPI       0x00
0152 #define     DA9210_GPIO2_TYPE_GPO       0x04
0153 #define DA9210_GPIO2_MODE           0x08
0154 #define DA9210_GPIO3_PIN_SHIFT          4
0155 #define DA9210_GPIO3_PIN_MASK           0x30
0156 #define     DA9210_GPIO3_PIN_GPI        0x00
0157 #define     DA9210_GPIO3_PIN_IERROR     0x10
0158 #define     DA9210_GPIO3_PIN_GPO_OD     0x20
0159 #define     DA9210_GPIO3_PIN_GPO        0x30
0160 #define DA9210_GPIO3_TYPE_SHIFT         0x40
0161 #define     DA9210_GPIO3_TYPE_GPI       0x00
0162 #define     DA9210_GPIO3_TYPE_GPO       0x40
0163 #define DA9210_GPIO3_MODE           0x80
0164
0165 /* DA9210_REG_GPIO_4_5 (addr=0x5A) */
0166 #define DA9210_GPIO4_PIN_SHIFT          0
0167 #define DA9210_GPIO4_PIN_MASK           0x03
0168 #define     DA9210_GPIO4_PIN_GPI        0x00
0169 #define     DA9210_GPIO4_PIN_GPO_OD     0x02
0170 #define     DA9210_GPIO4_PIN_GPO        0x03
0171 #define DA9210_GPIO4_TYPE           0x04
0172 #define     DA9210_GPIO4_TYPE_GPI       0x00
0173 #define     DA9210_GPIO4_TYPE_GPO       0x04
0174 #define DA9210_GPIO4_MODE           0x08
0175 #define DA9210_GPIO5_PIN_SHIFT          4
0176 #define DA9210_GPIO5_PIN_MASK           0x30
0177 #define     DA9210_GPIO5_PIN_GPI        0x00
0178 #define     DA9210_GPIO5_PIN_INTERFACE  0x01
0179 #define     DA9210_GPIO5_PIN_GPO_OD     0x20
0180 #define     DA9210_GPIO5_PIN_GPO        0x30
0181 #define DA9210_GPIO5_TYPE_SHIFT         0x40
0182 #define     DA9210_GPIO5_TYPE_GPI       0x00
0183 #define     DA9210_GPIO5_TYPE_GPO       0x40
0184 #define DA9210_GPIO5_MODE           0x80
0185
0186 /* DA9210_REG_GPIO_6 (addr=0x5B) */
0187 #define DA9210_GPIO6_PIN_SHIFT          0
0188 #define DA9210_GPIO6_PIN_MASK           0x03
0189 #define     DA9210_GPIO6_PIN_GPI        0x00
0190 #define     DA9210_GPIO6_PIN_INTERFACE  0x01
0191 #define     DA9210_GPIO6_PIN_GPO_OD     0x02
0192 #define     DA9210_GPIO6_PIN_GPO        0x03
0193 #define DA9210_GPIO6_TYPE           0x04
0194 #define     DA9210_GPIO6_TYPE_GPI       0x00
0195 #define     DA9210_GPIO6_TYPE_GPO       0x04
0196 #define DA9210_GPIO6_MODE           0x08
0197
0198 /* DA9210_REG_BUCK_CONT (addr=0x5D) */
0199 #define DA9210_BUCK_EN              0x01
0200 #define DA9210_BUCK_GPI_SHIFT           1
0201 #define DA9210_BUCK_GPI_MASK            0x06
0202 #define     DA9210_BUCK_GPI_OFF     0x00
0203 #define     DA9210_BUCK_GPI_GPIO0       0x02
0204 #define     DA9210_BUCK_GPI_GPIO3       0x04
0205 #define     DA9210_BUCK_GPI_GPIO4       0x06
0206 #define DA9210_BUCK_PD_DIS          0x08
0207 #define DA9210_VBUCK_SEL            0x10
0208 #define     DA9210_VBUCK_SEL_A      0x00
0209 #define     DA9210_VBUCK_SEL_B      0x10
0210 #define DA9210_VBUCK_GPI_SHIFT          5
0211 #define DA9210_VBUCK_GPI_MASK           0x60
0212 #define     DA9210_VBUCK_GPI_OFF        0x00
0213 #define     DA9210_VBUCK_GPI_GPIO0      0x20
0214 #define     DA9210_VBUCK_GPI_GPIO3      0x40
0215 #define     DA9210_VBUCK_GPI_GPIO4      0x60
0216 #define DA9210_DVC_CTRL_EN          0x80
0217
0218 /* DA9210_REG_BUCK_ILIM (addr=0xD0) */
0219 #define DA9210_BUCK_ILIM_SHIFT          0
0220 #define DA9210_BUCK_ILIM_MASK           0x0F
0221 #define DA9210_BUCK_IALARM          0x10
0222
0223 /* DA9210_REG_BUCK_CONF1 (addr=0xD1) */
0224 #define DA9210_BUCK_MODE_SHIFT          0
0225 #define DA9210_BUCK_MODE_MASK           0x03
0226 #define     DA9210_BUCK_MODE_MANUAL     0x00
0227 #define     DA9210_BUCK_MODE_SLEEP      0x01
0228 #define     DA9210_BUCK_MODE_SYNC       0x02
0229 #define     DA9210_BUCK_MODE_AUTO       0x03
0230 #define DA9210_STARTUP_CTRL_SHIFT       2
0231 #define DA9210_STARTUP_CTRL_MASK        0x1C
0232 #define DA9210_PWR_DOWN_CTRL_SHIFT      5
0233 #define DA9210_PWR_DOWN_CTRL_MASK       0xE0
0234
0235 /* DA9210_REG_BUCK_CONF2 (addr=0xD2) */
0236 #define DA9210_PHASE_SEL_SHIFT          0
0237 #define DA9210_PHASE_SEL_MASK           0x03
0238 #define DA9210_FREQ_SEL             0x40
0239
0240 /* DA9210_REG_BUCK_AUTO (addr=0xD4) */
0241 #define DA9210_VBUCK_AUTO_SHIFT         0
0242 #define DA9210_VBUCK_AUTO_MASK          0x7F
0243
0244 /* DA9210_REG_BUCK_BASE (addr=0xD5) */
0245 #define DA9210_VBUCK_BASE_SHIFT         0
0246 #define DA9210_VBUCK_BASE_MASK          0x7F
0247
0248 /* DA9210_REG_VBUCK_MAX_DVC_IF (addr=0xD6) */
0249 #define DA9210_VBUCK_MAX_SHIFT          0
0250 #define DA9210_VBUCK_MAX_MASK           0x7F
0251 #define DA9210_DVC_STEP_SIZE            0x80
0252 #define     DA9210_DVC_STEP_SIZE_10MV   0x00
0253 #define     DA9210_DVC_STEP_SIZE_20MV   0x80
0254
0255 /* DA9210_REG_VBUCK_DVC (addr=0xD7) */
0256 #define DA9210_VBUCK_DVC_SHIFT          0
0257 #define DA9210_VBUCK_DVC_MASK           0x7F
0258
0259 /* DA9210_REG_VBUCK_A/B (addr=0xD8/0xD9) */
0260 #define DA9210_VBUCK_SHIFT          0
0261 #define DA9210_VBUCK_MASK           0x7F
0262 #define DA9210_VBUCK_BIAS           0
0263 #define DA9210_BUCK_SL              0x80
0264
0265 /* DA9210_REG_INTERFACE (addr=0x105) */
0266 #define DA9210_IF_BASE_ADDR_SHIFT       4
0267 #define DA9210_IF_BASE_ADDR_MASK        0xF0
0268
0269 /* DA9210_REG_CONFIG_E (addr=0x147) */
0270 #define DA9210_STAND_ALONE          0x01
0271
0272 #endif  /* __DA9210_REGISTERS_H__ */
0273