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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) ST-Ericsson SA 2010
0004  *
0005  * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
0006  *          Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
0007  *          Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
0008  *
0009  * AB8500 peripheral regulators
0010  *
0011  * AB8500 supports the following regulators:
0012  *   VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
0013  *
0014  * AB8505 supports the following regulators:
0015  *   VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
0016  */
0017 #include <linux/init.h>
0018 #include <linux/kernel.h>
0019 #include <linux/module.h>
0020 #include <linux/err.h>
0021 #include <linux/platform_device.h>
0022 #include <linux/mfd/abx500.h>
0023 #include <linux/mfd/abx500/ab8500.h>
0024 #include <linux/of.h>
0025 #include <linux/regulator/of_regulator.h>
0026 #include <linux/regulator/driver.h>
0027 #include <linux/regulator/machine.h>
0028 #include <linux/slab.h>
0029 
0030 /* AB8500 regulators */
0031 enum ab8500_regulator_id {
0032     AB8500_LDO_AUX1,
0033     AB8500_LDO_AUX2,
0034     AB8500_LDO_AUX3,
0035     AB8500_LDO_INTCORE,
0036     AB8500_LDO_TVOUT,
0037     AB8500_LDO_AUDIO,
0038     AB8500_LDO_ANAMIC1,
0039     AB8500_LDO_ANAMIC2,
0040     AB8500_LDO_DMIC,
0041     AB8500_LDO_ANA,
0042     AB8500_NUM_REGULATORS,
0043 };
0044 
0045 /* AB8505 regulators */
0046 enum ab8505_regulator_id {
0047     AB8505_LDO_AUX1,
0048     AB8505_LDO_AUX2,
0049     AB8505_LDO_AUX3,
0050     AB8505_LDO_AUX4,
0051     AB8505_LDO_AUX5,
0052     AB8505_LDO_AUX6,
0053     AB8505_LDO_INTCORE,
0054     AB8505_LDO_ADC,
0055     AB8505_LDO_AUDIO,
0056     AB8505_LDO_ANAMIC1,
0057     AB8505_LDO_ANAMIC2,
0058     AB8505_LDO_AUX8,
0059     AB8505_LDO_ANA,
0060     AB8505_NUM_REGULATORS,
0061 };
0062 
0063 /* AB8500 registers */
0064 enum ab8500_regulator_reg {
0065     AB8500_REGUREQUESTCTRL2,
0066     AB8500_REGUREQUESTCTRL3,
0067     AB8500_REGUREQUESTCTRL4,
0068     AB8500_REGUSYSCLKREQ1HPVALID1,
0069     AB8500_REGUSYSCLKREQ1HPVALID2,
0070     AB8500_REGUHWHPREQ1VALID1,
0071     AB8500_REGUHWHPREQ1VALID2,
0072     AB8500_REGUHWHPREQ2VALID1,
0073     AB8500_REGUHWHPREQ2VALID2,
0074     AB8500_REGUSWHPREQVALID1,
0075     AB8500_REGUSWHPREQVALID2,
0076     AB8500_REGUSYSCLKREQVALID1,
0077     AB8500_REGUSYSCLKREQVALID2,
0078     AB8500_REGUMISC1,
0079     AB8500_VAUDIOSUPPLY,
0080     AB8500_REGUCTRL1VAMIC,
0081     AB8500_VPLLVANAREGU,
0082     AB8500_VREFDDR,
0083     AB8500_EXTSUPPLYREGU,
0084     AB8500_VAUX12REGU,
0085     AB8500_VRF1VAUX3REGU,
0086     AB8500_VAUX1SEL,
0087     AB8500_VAUX2SEL,
0088     AB8500_VRF1VAUX3SEL,
0089     AB8500_REGUCTRL2SPARE,
0090     AB8500_REGUCTRLDISCH,
0091     AB8500_REGUCTRLDISCH2,
0092     AB8500_NUM_REGULATOR_REGISTERS,
0093 };
0094 
0095 /* AB8505 registers */
0096 enum ab8505_regulator_reg {
0097     AB8505_REGUREQUESTCTRL1,
0098     AB8505_REGUREQUESTCTRL2,
0099     AB8505_REGUREQUESTCTRL3,
0100     AB8505_REGUREQUESTCTRL4,
0101     AB8505_REGUSYSCLKREQ1HPVALID1,
0102     AB8505_REGUSYSCLKREQ1HPVALID2,
0103     AB8505_REGUHWHPREQ1VALID1,
0104     AB8505_REGUHWHPREQ1VALID2,
0105     AB8505_REGUHWHPREQ2VALID1,
0106     AB8505_REGUHWHPREQ2VALID2,
0107     AB8505_REGUSWHPREQVALID1,
0108     AB8505_REGUSWHPREQVALID2,
0109     AB8505_REGUSYSCLKREQVALID1,
0110     AB8505_REGUSYSCLKREQVALID2,
0111     AB8505_REGUVAUX4REQVALID,
0112     AB8505_REGUMISC1,
0113     AB8505_VAUDIOSUPPLY,
0114     AB8505_REGUCTRL1VAMIC,
0115     AB8505_VSMPSAREGU,
0116     AB8505_VSMPSBREGU,
0117     AB8505_VSAFEREGU, /* NOTE! PRCMU register */
0118     AB8505_VPLLVANAREGU,
0119     AB8505_EXTSUPPLYREGU,
0120     AB8505_VAUX12REGU,
0121     AB8505_VRF1VAUX3REGU,
0122     AB8505_VSMPSASEL1,
0123     AB8505_VSMPSASEL2,
0124     AB8505_VSMPSASEL3,
0125     AB8505_VSMPSBSEL1,
0126     AB8505_VSMPSBSEL2,
0127     AB8505_VSMPSBSEL3,
0128     AB8505_VSAFESEL1, /* NOTE! PRCMU register */
0129     AB8505_VSAFESEL2, /* NOTE! PRCMU register */
0130     AB8505_VSAFESEL3, /* NOTE! PRCMU register */
0131     AB8505_VAUX1SEL,
0132     AB8505_VAUX2SEL,
0133     AB8505_VRF1VAUX3SEL,
0134     AB8505_VAUX4REQCTRL,
0135     AB8505_VAUX4REGU,
0136     AB8505_VAUX4SEL,
0137     AB8505_REGUCTRLDISCH,
0138     AB8505_REGUCTRLDISCH2,
0139     AB8505_REGUCTRLDISCH3,
0140     AB8505_CTRLVAUX5,
0141     AB8505_CTRLVAUX6,
0142     AB8505_NUM_REGULATOR_REGISTERS,
0143 };
0144 
0145 /**
0146  * struct ab8500_shared_mode - is used when mode is shared between
0147  * two regulators.
0148  * @shared_regulator: pointer to the other sharing regulator
0149  * @lp_mode_req: low power mode requested by this regulator
0150  */
0151 struct ab8500_shared_mode {
0152     struct ab8500_regulator_info *shared_regulator;
0153     bool lp_mode_req;
0154 };
0155 
0156 /**
0157  * struct ab8500_regulator_info - ab8500 regulator information
0158  * @dev: device pointer
0159  * @desc: regulator description
0160  * @shared_mode: used when mode is shared between two regulators
0161  * @load_lp_uA: maximum load in idle (low power) mode
0162  * @update_bank: bank to control on/off
0163  * @update_reg: register to control on/off
0164  * @update_mask: mask to enable/disable and set mode of regulator
0165  * @update_val: bits holding the regulator current mode
0166  * @update_val_idle: bits to enable the regulator in idle (low power) mode
0167  * @update_val_normal: bits to enable the regulator in normal (high power) mode
0168  * @mode_bank: bank with location of mode register
0169  * @mode_reg: mode register
0170  * @mode_mask: mask for setting mode
0171  * @mode_val_idle: mode setting for low power
0172  * @mode_val_normal: mode setting for normal power
0173  * @voltage_bank: bank to control regulator voltage
0174  * @voltage_reg: register to control regulator voltage
0175  * @voltage_mask: mask to control regulator voltage
0176  * @expand_register: 
0177  */
0178 struct ab8500_regulator_info {
0179     struct device       *dev;
0180     struct regulator_desc   desc;
0181     struct ab8500_shared_mode *shared_mode;
0182     int load_lp_uA;
0183     u8 update_bank;
0184     u8 update_reg;
0185     u8 update_mask;
0186     u8 update_val;
0187     u8 update_val_idle;
0188     u8 update_val_normal;
0189     u8 mode_bank;
0190     u8 mode_reg;
0191     u8 mode_mask;
0192     u8 mode_val_idle;
0193     u8 mode_val_normal;
0194     u8 voltage_bank;
0195     u8 voltage_reg;
0196     u8 voltage_mask;
0197 };
0198 
0199 /* voltage tables for the vauxn/vintcore supplies */
0200 static const unsigned int ldo_vauxn_voltages[] = {
0201     1100000,
0202     1200000,
0203     1300000,
0204     1400000,
0205     1500000,
0206     1800000,
0207     1850000,
0208     1900000,
0209     2500000,
0210     2650000,
0211     2700000,
0212     2750000,
0213     2800000,
0214     2900000,
0215     3000000,
0216     3300000,
0217 };
0218 
0219 static const unsigned int ldo_vaux3_voltages[] = {
0220     1200000,
0221     1500000,
0222     1800000,
0223     2100000,
0224     2500000,
0225     2750000,
0226     2790000,
0227     2910000,
0228 };
0229 
0230 static const unsigned int ldo_vaux56_voltages[] = {
0231     1800000,
0232     1050000,
0233     1100000,
0234     1200000,
0235     1500000,
0236     2200000,
0237     2500000,
0238     2790000,
0239 };
0240 
0241 static const unsigned int ldo_vintcore_voltages[] = {
0242     1200000,
0243     1225000,
0244     1250000,
0245     1275000,
0246     1300000,
0247     1325000,
0248     1350000,
0249 };
0250 
0251 static const unsigned int fixed_1200000_voltage[] = {
0252     1200000,
0253 };
0254 
0255 static const unsigned int fixed_1800000_voltage[] = {
0256     1800000,
0257 };
0258 
0259 static const unsigned int fixed_2000000_voltage[] = {
0260     2000000,
0261 };
0262 
0263 static const unsigned int fixed_2050000_voltage[] = {
0264     2050000,
0265 };
0266 
0267 static const unsigned int ldo_vana_voltages[] = {
0268     1050000,
0269     1075000,
0270     1100000,
0271     1125000,
0272     1150000,
0273     1175000,
0274     1200000,
0275     1225000,
0276 };
0277 
0278 static const unsigned int ldo_vaudio_voltages[] = {
0279     2000000,
0280     2100000,
0281     2200000,
0282     2300000,
0283     2400000,
0284     2500000,
0285     2600000,
0286     2600000,    /* Duplicated in Vaudio and IsoUicc Control register. */
0287 };
0288 
0289 static DEFINE_MUTEX(shared_mode_mutex);
0290 static struct ab8500_shared_mode ldo_anamic1_shared;
0291 static struct ab8500_shared_mode ldo_anamic2_shared;
0292 
0293 static int ab8500_regulator_enable(struct regulator_dev *rdev)
0294 {
0295     int ret;
0296     struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
0297 
0298     if (info == NULL) {
0299         dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
0300         return -EINVAL;
0301     }
0302 
0303     ret = abx500_mask_and_set_register_interruptible(info->dev,
0304         info->update_bank, info->update_reg,
0305         info->update_mask, info->update_val);
0306     if (ret < 0) {
0307         dev_err(rdev_get_dev(rdev),
0308             "couldn't set enable bits for regulator\n");
0309         return ret;
0310     }
0311 
0312     dev_vdbg(rdev_get_dev(rdev),
0313         "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
0314         info->desc.name, info->update_bank, info->update_reg,
0315         info->update_mask, info->update_val);
0316 
0317     return ret;
0318 }
0319 
0320 static int ab8500_regulator_disable(struct regulator_dev *rdev)
0321 {
0322     int ret;
0323     struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
0324 
0325     if (info == NULL) {
0326         dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
0327         return -EINVAL;
0328     }
0329 
0330     ret = abx500_mask_and_set_register_interruptible(info->dev,
0331         info->update_bank, info->update_reg,
0332         info->update_mask, 0x0);
0333     if (ret < 0) {
0334         dev_err(rdev_get_dev(rdev),
0335             "couldn't set disable bits for regulator\n");
0336         return ret;
0337     }
0338 
0339     dev_vdbg(rdev_get_dev(rdev),
0340         "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
0341         info->desc.name, info->update_bank, info->update_reg,
0342         info->update_mask, 0x0);
0343 
0344     return ret;
0345 }
0346 
0347 static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
0348 {
0349     int ret;
0350     struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
0351     u8 regval;
0352 
0353     if (info == NULL) {
0354         dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
0355         return -EINVAL;
0356     }
0357 
0358     ret = abx500_get_register_interruptible(info->dev,
0359         info->update_bank, info->update_reg, &regval);
0360     if (ret < 0) {
0361         dev_err(rdev_get_dev(rdev),
0362             "couldn't read 0x%x register\n", info->update_reg);
0363         return ret;
0364     }
0365 
0366     dev_vdbg(rdev_get_dev(rdev),
0367         "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
0368         " 0x%x\n",
0369         info->desc.name, info->update_bank, info->update_reg,
0370         info->update_mask, regval);
0371 
0372     if (regval & info->update_mask)
0373         return 1;
0374     else
0375         return 0;
0376 }
0377 
0378 static unsigned int ab8500_regulator_get_optimum_mode(
0379         struct regulator_dev *rdev, int input_uV,
0380         int output_uV, int load_uA)
0381 {
0382     unsigned int mode;
0383 
0384     struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
0385 
0386     if (info == NULL) {
0387         dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
0388         return -EINVAL;
0389     }
0390 
0391     if (load_uA <= info->load_lp_uA)
0392         mode = REGULATOR_MODE_IDLE;
0393     else
0394         mode = REGULATOR_MODE_NORMAL;
0395 
0396     return mode;
0397 }
0398 
0399 static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
0400                      unsigned int mode)
0401 {
0402     int ret = 0;
0403     u8 bank, reg, mask, val;
0404     bool lp_mode_req = false;
0405     struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
0406 
0407     if (info == NULL) {
0408         dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
0409         return -EINVAL;
0410     }
0411 
0412     if (info->mode_mask) {
0413         bank = info->mode_bank;
0414         reg = info->mode_reg;
0415         mask = info->mode_mask;
0416     } else {
0417         bank = info->update_bank;
0418         reg = info->update_reg;
0419         mask = info->update_mask;
0420     }
0421 
0422     if (info->shared_mode)
0423         mutex_lock(&shared_mode_mutex);
0424 
0425     switch (mode) {
0426     case REGULATOR_MODE_NORMAL:
0427         if (info->shared_mode)
0428             lp_mode_req = false;
0429 
0430         if (info->mode_mask)
0431             val = info->mode_val_normal;
0432         else
0433             val = info->update_val_normal;
0434         break;
0435     case REGULATOR_MODE_IDLE:
0436         if (info->shared_mode) {
0437             struct ab8500_regulator_info *shared_regulator;
0438 
0439             shared_regulator = info->shared_mode->shared_regulator;
0440             if (!shared_regulator->shared_mode->lp_mode_req) {
0441                 /* Other regulator prevent LP mode */
0442                 info->shared_mode->lp_mode_req = true;
0443                 goto out_unlock;
0444             }
0445 
0446             lp_mode_req = true;
0447         }
0448 
0449         if (info->mode_mask)
0450             val = info->mode_val_idle;
0451         else
0452             val = info->update_val_idle;
0453         break;
0454     default:
0455         ret = -EINVAL;
0456         goto out_unlock;
0457     }
0458 
0459     if (info->mode_mask || ab8500_regulator_is_enabled(rdev)) {
0460         ret = abx500_mask_and_set_register_interruptible(info->dev,
0461             bank, reg, mask, val);
0462         if (ret < 0) {
0463             dev_err(rdev_get_dev(rdev),
0464                 "couldn't set regulator mode\n");
0465             goto out_unlock;
0466         }
0467 
0468         dev_vdbg(rdev_get_dev(rdev),
0469             "%s-set_mode (bank, reg, mask, value): "
0470             "0x%x, 0x%x, 0x%x, 0x%x\n",
0471             info->desc.name, bank, reg,
0472             mask, val);
0473     }
0474 
0475     if (!info->mode_mask)
0476         info->update_val = val;
0477 
0478     if (info->shared_mode)
0479         info->shared_mode->lp_mode_req = lp_mode_req;
0480 
0481 out_unlock:
0482     if (info->shared_mode)
0483         mutex_unlock(&shared_mode_mutex);
0484 
0485     return ret;
0486 }
0487 
0488 static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
0489 {
0490     struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
0491     int ret;
0492     u8 val;
0493     u8 val_normal;
0494     u8 val_idle;
0495 
0496     if (info == NULL) {
0497         dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
0498         return -EINVAL;
0499     }
0500 
0501     /* Need special handling for shared mode */
0502     if (info->shared_mode) {
0503         if (info->shared_mode->lp_mode_req)
0504             return REGULATOR_MODE_IDLE;
0505         else
0506             return REGULATOR_MODE_NORMAL;
0507     }
0508 
0509     if (info->mode_mask) {
0510         /* Dedicated register for handling mode */
0511         ret = abx500_get_register_interruptible(info->dev,
0512         info->mode_bank, info->mode_reg, &val);
0513         val = val & info->mode_mask;
0514 
0515         val_normal = info->mode_val_normal;
0516         val_idle = info->mode_val_idle;
0517     } else {
0518         /* Mode register same as enable register */
0519         val = info->update_val;
0520         val_normal = info->update_val_normal;
0521         val_idle = info->update_val_idle;
0522     }
0523 
0524     if (val == val_normal)
0525         ret = REGULATOR_MODE_NORMAL;
0526     else if (val == val_idle)
0527         ret = REGULATOR_MODE_IDLE;
0528     else
0529         ret = -EINVAL;
0530 
0531     return ret;
0532 }
0533 
0534 static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
0535 {
0536     int ret, voltage_shift;
0537     struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
0538     u8 regval;
0539 
0540     if (info == NULL) {
0541         dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
0542         return -EINVAL;
0543     }
0544 
0545     voltage_shift = ffs(info->voltage_mask) - 1;
0546 
0547     ret = abx500_get_register_interruptible(info->dev,
0548             info->voltage_bank, info->voltage_reg, &regval);
0549     if (ret < 0) {
0550         dev_err(rdev_get_dev(rdev),
0551             "couldn't read voltage reg for regulator\n");
0552         return ret;
0553     }
0554 
0555     dev_vdbg(rdev_get_dev(rdev),
0556         "%s-get_voltage (bank, reg, mask, shift, value): "
0557         "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
0558         info->desc.name, info->voltage_bank,
0559         info->voltage_reg, info->voltage_mask,
0560         voltage_shift, regval);
0561 
0562     return (regval & info->voltage_mask) >> voltage_shift;
0563 }
0564 
0565 static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
0566                         unsigned selector)
0567 {
0568     int ret, voltage_shift;
0569     struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
0570     u8 regval;
0571 
0572     if (info == NULL) {
0573         dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
0574         return -EINVAL;
0575     }
0576 
0577     voltage_shift = ffs(info->voltage_mask) - 1;
0578 
0579     /* set the registers for the request */
0580     regval = (u8)selector << voltage_shift;
0581     ret = abx500_mask_and_set_register_interruptible(info->dev,
0582             info->voltage_bank, info->voltage_reg,
0583             info->voltage_mask, regval);
0584     if (ret < 0)
0585         dev_err(rdev_get_dev(rdev),
0586         "couldn't set voltage reg for regulator\n");
0587 
0588     dev_vdbg(rdev_get_dev(rdev),
0589         "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
0590         " 0x%x\n",
0591         info->desc.name, info->voltage_bank, info->voltage_reg,
0592         info->voltage_mask, regval);
0593 
0594     return ret;
0595 }
0596 
0597 static const struct regulator_ops ab8500_regulator_volt_mode_ops = {
0598     .enable         = ab8500_regulator_enable,
0599     .disable        = ab8500_regulator_disable,
0600     .is_enabled     = ab8500_regulator_is_enabled,
0601     .get_optimum_mode   = ab8500_regulator_get_optimum_mode,
0602     .set_mode       = ab8500_regulator_set_mode,
0603     .get_mode       = ab8500_regulator_get_mode,
0604     .get_voltage_sel    = ab8500_regulator_get_voltage_sel,
0605     .set_voltage_sel    = ab8500_regulator_set_voltage_sel,
0606     .list_voltage       = regulator_list_voltage_table,
0607 };
0608 
0609 static const struct regulator_ops ab8500_regulator_volt_ops = {
0610     .enable     = ab8500_regulator_enable,
0611     .disable    = ab8500_regulator_disable,
0612     .is_enabled = ab8500_regulator_is_enabled,
0613     .get_voltage_sel = ab8500_regulator_get_voltage_sel,
0614     .set_voltage_sel = ab8500_regulator_set_voltage_sel,
0615     .list_voltage   = regulator_list_voltage_table,
0616 };
0617 
0618 static const struct regulator_ops ab8500_regulator_mode_ops = {
0619     .enable         = ab8500_regulator_enable,
0620     .disable        = ab8500_regulator_disable,
0621     .is_enabled     = ab8500_regulator_is_enabled,
0622     .get_optimum_mode   = ab8500_regulator_get_optimum_mode,
0623     .set_mode       = ab8500_regulator_set_mode,
0624     .get_mode       = ab8500_regulator_get_mode,
0625     .list_voltage       = regulator_list_voltage_table,
0626 };
0627 
0628 static const struct regulator_ops ab8500_regulator_ops = {
0629     .enable         = ab8500_regulator_enable,
0630     .disable        = ab8500_regulator_disable,
0631     .is_enabled     = ab8500_regulator_is_enabled,
0632     .list_voltage       = regulator_list_voltage_table,
0633 };
0634 
0635 static const struct regulator_ops ab8500_regulator_anamic_mode_ops = {
0636     .enable     = ab8500_regulator_enable,
0637     .disable    = ab8500_regulator_disable,
0638     .is_enabled = ab8500_regulator_is_enabled,
0639     .set_mode   = ab8500_regulator_set_mode,
0640     .get_mode   = ab8500_regulator_get_mode,
0641     .list_voltage   = regulator_list_voltage_table,
0642 };
0643 
0644 /* AB8500 regulator information */
0645 static struct ab8500_regulator_info
0646         ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
0647     /*
0648      * Variable Voltage Regulators
0649      *   name, min mV, max mV,
0650      *   update bank, reg, mask, enable val
0651      *   volt bank, reg, mask
0652      */
0653     [AB8500_LDO_AUX1] = {
0654         .desc = {
0655             .name       = "LDO-AUX1",
0656             .ops        = &ab8500_regulator_volt_mode_ops,
0657             .type       = REGULATOR_VOLTAGE,
0658             .id     = AB8500_LDO_AUX1,
0659             .owner      = THIS_MODULE,
0660             .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
0661             .volt_table = ldo_vauxn_voltages,
0662             .enable_time    = 200,
0663             .supply_name    = "vin",
0664         },
0665         .load_lp_uA     = 5000,
0666         .update_bank        = 0x04,
0667         .update_reg     = 0x09,
0668         .update_mask        = 0x03,
0669         .update_val     = 0x01,
0670         .update_val_idle    = 0x03,
0671         .update_val_normal  = 0x01,
0672         .voltage_bank       = 0x04,
0673         .voltage_reg        = 0x1f,
0674         .voltage_mask       = 0x0f,
0675     },
0676     [AB8500_LDO_AUX2] = {
0677         .desc = {
0678             .name       = "LDO-AUX2",
0679             .ops        = &ab8500_regulator_volt_mode_ops,
0680             .type       = REGULATOR_VOLTAGE,
0681             .id     = AB8500_LDO_AUX2,
0682             .owner      = THIS_MODULE,
0683             .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
0684             .volt_table = ldo_vauxn_voltages,
0685             .enable_time    = 200,
0686             .supply_name    = "vin",
0687         },
0688         .load_lp_uA     = 5000,
0689         .update_bank        = 0x04,
0690         .update_reg     = 0x09,
0691         .update_mask        = 0x0c,
0692         .update_val     = 0x04,
0693         .update_val_idle    = 0x0c,
0694         .update_val_normal  = 0x04,
0695         .voltage_bank       = 0x04,
0696         .voltage_reg        = 0x20,
0697         .voltage_mask       = 0x0f,
0698     },
0699     [AB8500_LDO_AUX3] = {
0700         .desc = {
0701             .name       = "LDO-AUX3",
0702             .ops        = &ab8500_regulator_volt_mode_ops,
0703             .type       = REGULATOR_VOLTAGE,
0704             .id     = AB8500_LDO_AUX3,
0705             .owner      = THIS_MODULE,
0706             .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
0707             .volt_table = ldo_vaux3_voltages,
0708             .enable_time    = 450,
0709             .supply_name    = "vin",
0710         },
0711         .load_lp_uA     = 5000,
0712         .update_bank        = 0x04,
0713         .update_reg     = 0x0a,
0714         .update_mask        = 0x03,
0715         .update_val     = 0x01,
0716         .update_val_idle    = 0x03,
0717         .update_val_normal  = 0x01,
0718         .voltage_bank       = 0x04,
0719         .voltage_reg        = 0x21,
0720         .voltage_mask       = 0x07,
0721     },
0722     [AB8500_LDO_INTCORE] = {
0723         .desc = {
0724             .name       = "LDO-INTCORE",
0725             .ops        = &ab8500_regulator_volt_mode_ops,
0726             .type       = REGULATOR_VOLTAGE,
0727             .id     = AB8500_LDO_INTCORE,
0728             .owner      = THIS_MODULE,
0729             .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
0730             .volt_table = ldo_vintcore_voltages,
0731             .enable_time    = 750,
0732         },
0733         .load_lp_uA     = 5000,
0734         .update_bank        = 0x03,
0735         .update_reg     = 0x80,
0736         .update_mask        = 0x44,
0737         .update_val     = 0x44,
0738         .update_val_idle    = 0x44,
0739         .update_val_normal  = 0x04,
0740         .voltage_bank       = 0x03,
0741         .voltage_reg        = 0x80,
0742         .voltage_mask       = 0x38,
0743     },
0744 
0745     /*
0746      * Fixed Voltage Regulators
0747      *   name, fixed mV,
0748      *   update bank, reg, mask, enable val
0749      */
0750     [AB8500_LDO_TVOUT] = {
0751         .desc = {
0752             .name       = "LDO-TVOUT",
0753             .ops        = &ab8500_regulator_mode_ops,
0754             .type       = REGULATOR_VOLTAGE,
0755             .id     = AB8500_LDO_TVOUT,
0756             .owner      = THIS_MODULE,
0757             .n_voltages = 1,
0758             .volt_table = fixed_2000000_voltage,
0759             .enable_time    = 500,
0760         },
0761         .load_lp_uA     = 1000,
0762         .update_bank        = 0x03,
0763         .update_reg     = 0x80,
0764         .update_mask        = 0x82,
0765         .update_val     = 0x02,
0766         .update_val_idle    = 0x82,
0767         .update_val_normal  = 0x02,
0768     },
0769     [AB8500_LDO_AUDIO] = {
0770         .desc = {
0771             .name       = "LDO-AUDIO",
0772             .ops        = &ab8500_regulator_ops,
0773             .type       = REGULATOR_VOLTAGE,
0774             .id     = AB8500_LDO_AUDIO,
0775             .owner      = THIS_MODULE,
0776             .n_voltages = 1,
0777             .enable_time    = 140,
0778             .volt_table = fixed_2000000_voltage,
0779         },
0780         .update_bank        = 0x03,
0781         .update_reg     = 0x83,
0782         .update_mask        = 0x02,
0783         .update_val     = 0x02,
0784     },
0785     [AB8500_LDO_ANAMIC1] = {
0786         .desc = {
0787             .name       = "LDO-ANAMIC1",
0788             .ops        = &ab8500_regulator_ops,
0789             .type       = REGULATOR_VOLTAGE,
0790             .id     = AB8500_LDO_ANAMIC1,
0791             .owner      = THIS_MODULE,
0792             .n_voltages = 1,
0793             .enable_time    = 500,
0794             .volt_table = fixed_2050000_voltage,
0795         },
0796         .update_bank        = 0x03,
0797         .update_reg     = 0x83,
0798         .update_mask        = 0x08,
0799         .update_val     = 0x08,
0800     },
0801     [AB8500_LDO_ANAMIC2] = {
0802         .desc = {
0803             .name       = "LDO-ANAMIC2",
0804             .ops        = &ab8500_regulator_ops,
0805             .type       = REGULATOR_VOLTAGE,
0806             .id     = AB8500_LDO_ANAMIC2,
0807             .owner      = THIS_MODULE,
0808             .n_voltages = 1,
0809             .enable_time    = 500,
0810             .volt_table = fixed_2050000_voltage,
0811         },
0812         .update_bank        = 0x03,
0813         .update_reg     = 0x83,
0814         .update_mask        = 0x10,
0815         .update_val     = 0x10,
0816     },
0817     [AB8500_LDO_DMIC] = {
0818         .desc = {
0819             .name       = "LDO-DMIC",
0820             .ops        = &ab8500_regulator_ops,
0821             .type       = REGULATOR_VOLTAGE,
0822             .id     = AB8500_LDO_DMIC,
0823             .owner      = THIS_MODULE,
0824             .n_voltages = 1,
0825             .enable_time    = 420,
0826             .volt_table = fixed_1800000_voltage,
0827         },
0828         .update_bank        = 0x03,
0829         .update_reg     = 0x83,
0830         .update_mask        = 0x04,
0831         .update_val     = 0x04,
0832     },
0833 
0834     /*
0835      * Regulators with fixed voltage and normal/idle modes
0836      */
0837     [AB8500_LDO_ANA] = {
0838         .desc = {
0839             .name       = "LDO-ANA",
0840             .ops        = &ab8500_regulator_mode_ops,
0841             .type       = REGULATOR_VOLTAGE,
0842             .id     = AB8500_LDO_ANA,
0843             .owner      = THIS_MODULE,
0844             .n_voltages = 1,
0845             .enable_time    = 140,
0846             .volt_table = fixed_1200000_voltage,
0847         },
0848         .load_lp_uA     = 1000,
0849         .update_bank        = 0x04,
0850         .update_reg     = 0x06,
0851         .update_mask        = 0x0c,
0852         .update_val     = 0x04,
0853         .update_val_idle    = 0x0c,
0854         .update_val_normal  = 0x04,
0855     },
0856 };
0857 
0858 /* AB8505 regulator information */
0859 static struct ab8500_regulator_info
0860         ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
0861     /*
0862      * Variable Voltage Regulators
0863      *   name, min mV, max mV,
0864      *   update bank, reg, mask, enable val
0865      *   volt bank, reg, mask
0866      */
0867     [AB8505_LDO_AUX1] = {
0868         .desc = {
0869             .name       = "LDO-AUX1",
0870             .ops        = &ab8500_regulator_volt_mode_ops,
0871             .type       = REGULATOR_VOLTAGE,
0872             .id     = AB8505_LDO_AUX1,
0873             .owner      = THIS_MODULE,
0874             .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
0875             .volt_table = ldo_vauxn_voltages,
0876         },
0877         .load_lp_uA     = 5000,
0878         .update_bank        = 0x04,
0879         .update_reg     = 0x09,
0880         .update_mask        = 0x03,
0881         .update_val     = 0x01,
0882         .update_val_idle    = 0x03,
0883         .update_val_normal  = 0x01,
0884         .voltage_bank       = 0x04,
0885         .voltage_reg        = 0x1f,
0886         .voltage_mask       = 0x0f,
0887     },
0888     [AB8505_LDO_AUX2] = {
0889         .desc = {
0890             .name       = "LDO-AUX2",
0891             .ops        = &ab8500_regulator_volt_mode_ops,
0892             .type       = REGULATOR_VOLTAGE,
0893             .id     = AB8505_LDO_AUX2,
0894             .owner      = THIS_MODULE,
0895             .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
0896             .volt_table = ldo_vauxn_voltages,
0897         },
0898         .load_lp_uA     = 5000,
0899         .update_bank        = 0x04,
0900         .update_reg     = 0x09,
0901         .update_mask        = 0x0c,
0902         .update_val     = 0x04,
0903         .update_val_idle    = 0x0c,
0904         .update_val_normal  = 0x04,
0905         .voltage_bank       = 0x04,
0906         .voltage_reg        = 0x20,
0907         .voltage_mask       = 0x0f,
0908     },
0909     [AB8505_LDO_AUX3] = {
0910         .desc = {
0911             .name       = "LDO-AUX3",
0912             .ops        = &ab8500_regulator_volt_mode_ops,
0913             .type       = REGULATOR_VOLTAGE,
0914             .id     = AB8505_LDO_AUX3,
0915             .owner      = THIS_MODULE,
0916             .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
0917             .volt_table = ldo_vaux3_voltages,
0918         },
0919         .load_lp_uA     = 5000,
0920         .update_bank        = 0x04,
0921         .update_reg     = 0x0a,
0922         .update_mask        = 0x03,
0923         .update_val     = 0x01,
0924         .update_val_idle    = 0x03,
0925         .update_val_normal  = 0x01,
0926         .voltage_bank       = 0x04,
0927         .voltage_reg        = 0x21,
0928         .voltage_mask       = 0x07,
0929     },
0930     [AB8505_LDO_AUX4] = {
0931         .desc = {
0932             .name       = "LDO-AUX4",
0933             .ops        = &ab8500_regulator_volt_mode_ops,
0934             .type       = REGULATOR_VOLTAGE,
0935             .id     = AB8505_LDO_AUX4,
0936             .owner      = THIS_MODULE,
0937             .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
0938             .volt_table = ldo_vauxn_voltages,
0939         },
0940         .load_lp_uA     = 5000,
0941         /* values for Vaux4Regu register */
0942         .update_bank        = 0x04,
0943         .update_reg     = 0x2e,
0944         .update_mask        = 0x03,
0945         .update_val     = 0x01,
0946         .update_val_idle    = 0x03,
0947         .update_val_normal  = 0x01,
0948         /* values for Vaux4SEL register */
0949         .voltage_bank       = 0x04,
0950         .voltage_reg        = 0x2f,
0951         .voltage_mask       = 0x0f,
0952     },
0953     [AB8505_LDO_AUX5] = {
0954         .desc = {
0955             .name       = "LDO-AUX5",
0956             .ops        = &ab8500_regulator_volt_mode_ops,
0957             .type       = REGULATOR_VOLTAGE,
0958             .id     = AB8505_LDO_AUX5,
0959             .owner      = THIS_MODULE,
0960             .n_voltages = ARRAY_SIZE(ldo_vaux56_voltages),
0961             .volt_table = ldo_vaux56_voltages,
0962         },
0963         .load_lp_uA     = 2000,
0964         /* values for CtrlVaux5 register */
0965         .update_bank        = 0x01,
0966         .update_reg     = 0x55,
0967         .update_mask        = 0x18,
0968         .update_val     = 0x10,
0969         .update_val_idle    = 0x18,
0970         .update_val_normal  = 0x10,
0971         .voltage_bank       = 0x01,
0972         .voltage_reg        = 0x55,
0973         .voltage_mask       = 0x07,
0974     },
0975     [AB8505_LDO_AUX6] = {
0976         .desc = {
0977             .name       = "LDO-AUX6",
0978             .ops        = &ab8500_regulator_volt_mode_ops,
0979             .type       = REGULATOR_VOLTAGE,
0980             .id     = AB8505_LDO_AUX6,
0981             .owner      = THIS_MODULE,
0982             .n_voltages = ARRAY_SIZE(ldo_vaux56_voltages),
0983             .volt_table = ldo_vaux56_voltages,
0984         },
0985         .load_lp_uA     = 2000,
0986         /* values for CtrlVaux6 register */
0987         .update_bank        = 0x01,
0988         .update_reg     = 0x56,
0989         .update_mask        = 0x18,
0990         .update_val     = 0x10,
0991         .update_val_idle    = 0x18,
0992         .update_val_normal  = 0x10,
0993         .voltage_bank       = 0x01,
0994         .voltage_reg        = 0x56,
0995         .voltage_mask       = 0x07,
0996     },
0997     [AB8505_LDO_INTCORE] = {
0998         .desc = {
0999             .name       = "LDO-INTCORE",
1000             .ops        = &ab8500_regulator_volt_mode_ops,
1001             .type       = REGULATOR_VOLTAGE,
1002             .id     = AB8505_LDO_INTCORE,
1003             .owner      = THIS_MODULE,
1004             .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
1005             .volt_table = ldo_vintcore_voltages,
1006         },
1007         .load_lp_uA     = 5000,
1008         .update_bank        = 0x03,
1009         .update_reg     = 0x80,
1010         .update_mask        = 0x44,
1011         .update_val     = 0x04,
1012         .update_val_idle    = 0x44,
1013         .update_val_normal  = 0x04,
1014         .voltage_bank       = 0x03,
1015         .voltage_reg        = 0x80,
1016         .voltage_mask       = 0x38,
1017     },
1018 
1019     /*
1020      * Fixed Voltage Regulators
1021      *   name, fixed mV,
1022      *   update bank, reg, mask, enable val
1023      */
1024     [AB8505_LDO_ADC] = {
1025         .desc = {
1026             .name       = "LDO-ADC",
1027             .ops        = &ab8500_regulator_mode_ops,
1028             .type       = REGULATOR_VOLTAGE,
1029             .id     = AB8505_LDO_ADC,
1030             .owner      = THIS_MODULE,
1031             .n_voltages = 1,
1032             .volt_table = fixed_2000000_voltage,
1033             .enable_time    = 10000,
1034         },
1035         .load_lp_uA     = 1000,
1036         .update_bank        = 0x03,
1037         .update_reg     = 0x80,
1038         .update_mask        = 0x82,
1039         .update_val     = 0x02,
1040         .update_val_idle    = 0x82,
1041         .update_val_normal  = 0x02,
1042     },
1043     [AB8505_LDO_AUDIO] = {
1044         .desc = {
1045             .name       = "LDO-AUDIO",
1046             .ops        = &ab8500_regulator_volt_ops,
1047             .type       = REGULATOR_VOLTAGE,
1048             .id     = AB8505_LDO_AUDIO,
1049             .owner      = THIS_MODULE,
1050             .n_voltages = ARRAY_SIZE(ldo_vaudio_voltages),
1051             .volt_table = ldo_vaudio_voltages,
1052         },
1053         .update_bank        = 0x03,
1054         .update_reg     = 0x83,
1055         .update_mask        = 0x02,
1056         .update_val     = 0x02,
1057         .voltage_bank       = 0x01,
1058         .voltage_reg        = 0x57,
1059         .voltage_mask       = 0x70,
1060     },
1061     [AB8505_LDO_ANAMIC1] = {
1062         .desc = {
1063             .name       = "LDO-ANAMIC1",
1064             .ops        = &ab8500_regulator_anamic_mode_ops,
1065             .type       = REGULATOR_VOLTAGE,
1066             .id     = AB8505_LDO_ANAMIC1,
1067             .owner      = THIS_MODULE,
1068             .n_voltages = 1,
1069             .volt_table = fixed_2050000_voltage,
1070         },
1071         .shared_mode        = &ldo_anamic1_shared,
1072         .update_bank        = 0x03,
1073         .update_reg     = 0x83,
1074         .update_mask        = 0x08,
1075         .update_val     = 0x08,
1076         .mode_bank      = 0x01,
1077         .mode_reg       = 0x54,
1078         .mode_mask      = 0x04,
1079         .mode_val_idle      = 0x04,
1080         .mode_val_normal    = 0x00,
1081     },
1082     [AB8505_LDO_ANAMIC2] = {
1083         .desc = {
1084             .name       = "LDO-ANAMIC2",
1085             .ops        = &ab8500_regulator_anamic_mode_ops,
1086             .type       = REGULATOR_VOLTAGE,
1087             .id     = AB8505_LDO_ANAMIC2,
1088             .owner      = THIS_MODULE,
1089             .n_voltages = 1,
1090             .volt_table = fixed_2050000_voltage,
1091         },
1092         .shared_mode        = &ldo_anamic2_shared,
1093         .update_bank        = 0x03,
1094         .update_reg     = 0x83,
1095         .update_mask        = 0x10,
1096         .update_val     = 0x10,
1097         .mode_bank      = 0x01,
1098         .mode_reg       = 0x54,
1099         .mode_mask      = 0x04,
1100         .mode_val_idle      = 0x04,
1101         .mode_val_normal    = 0x00,
1102     },
1103     [AB8505_LDO_AUX8] = {
1104         .desc = {
1105             .name       = "LDO-AUX8",
1106             .ops        = &ab8500_regulator_ops,
1107             .type       = REGULATOR_VOLTAGE,
1108             .id     = AB8505_LDO_AUX8,
1109             .owner      = THIS_MODULE,
1110             .n_voltages = 1,
1111             .volt_table = fixed_1800000_voltage,
1112         },
1113         .update_bank        = 0x03,
1114         .update_reg     = 0x83,
1115         .update_mask        = 0x04,
1116         .update_val     = 0x04,
1117     },
1118     /*
1119      * Regulators with fixed voltage and normal/idle modes
1120      */
1121     [AB8505_LDO_ANA] = {
1122         .desc = {
1123             .name       = "LDO-ANA",
1124             .ops        = &ab8500_regulator_volt_mode_ops,
1125             .type       = REGULATOR_VOLTAGE,
1126             .id     = AB8505_LDO_ANA,
1127             .owner      = THIS_MODULE,
1128             .n_voltages = ARRAY_SIZE(ldo_vana_voltages),
1129             .volt_table = ldo_vana_voltages,
1130         },
1131         .load_lp_uA     = 1000,
1132         .update_bank        = 0x04,
1133         .update_reg     = 0x06,
1134         .update_mask        = 0x0c,
1135         .update_val     = 0x04,
1136         .update_val_idle    = 0x0c,
1137         .update_val_normal  = 0x04,
1138         .voltage_bank       = 0x04,
1139         .voltage_reg        = 0x29,
1140         .voltage_mask       = 0x7,
1141     },
1142 };
1143 
1144 static struct ab8500_shared_mode ldo_anamic1_shared = {
1145     .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC2],
1146 };
1147 
1148 static struct ab8500_shared_mode ldo_anamic2_shared = {
1149     .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC1],
1150 };
1151 
1152 struct ab8500_reg_init {
1153     u8 bank;
1154     u8 addr;
1155     u8 mask;
1156 };
1157 
1158 #define REG_INIT(_id, _bank, _addr, _mask)  \
1159     [_id] = {               \
1160         .bank = _bank,          \
1161         .addr = _addr,          \
1162         .mask = _mask,          \
1163     }
1164 
1165 /* AB8500 register init */
1166 static struct ab8500_reg_init ab8500_reg_init[] = {
1167     /*
1168      * 0x30, VanaRequestCtrl
1169      * 0xc0, VextSupply1RequestCtrl
1170      */
1171     REG_INIT(AB8500_REGUREQUESTCTRL2,   0x03, 0x04, 0xf0),
1172     /*
1173      * 0x03, VextSupply2RequestCtrl
1174      * 0x0c, VextSupply3RequestCtrl
1175      * 0x30, Vaux1RequestCtrl
1176      * 0xc0, Vaux2RequestCtrl
1177      */
1178     REG_INIT(AB8500_REGUREQUESTCTRL3,   0x03, 0x05, 0xff),
1179     /*
1180      * 0x03, Vaux3RequestCtrl
1181      * 0x04, SwHPReq
1182      */
1183     REG_INIT(AB8500_REGUREQUESTCTRL4,   0x03, 0x06, 0x07),
1184     /*
1185      * 0x08, VanaSysClkReq1HPValid
1186      * 0x20, Vaux1SysClkReq1HPValid
1187      * 0x40, Vaux2SysClkReq1HPValid
1188      * 0x80, Vaux3SysClkReq1HPValid
1189      */
1190     REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
1191     /*
1192      * 0x10, VextSupply1SysClkReq1HPValid
1193      * 0x20, VextSupply2SysClkReq1HPValid
1194      * 0x40, VextSupply3SysClkReq1HPValid
1195      */
1196     REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
1197     /*
1198      * 0x08, VanaHwHPReq1Valid
1199      * 0x20, Vaux1HwHPReq1Valid
1200      * 0x40, Vaux2HwHPReq1Valid
1201      * 0x80, Vaux3HwHPReq1Valid
1202      */
1203     REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xe8),
1204     /*
1205      * 0x01, VextSupply1HwHPReq1Valid
1206      * 0x02, VextSupply2HwHPReq1Valid
1207      * 0x04, VextSupply3HwHPReq1Valid
1208      */
1209     REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07),
1210     /*
1211      * 0x08, VanaHwHPReq2Valid
1212      * 0x20, Vaux1HwHPReq2Valid
1213      * 0x40, Vaux2HwHPReq2Valid
1214      * 0x80, Vaux3HwHPReq2Valid
1215      */
1216     REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xe8),
1217     /*
1218      * 0x01, VextSupply1HwHPReq2Valid
1219      * 0x02, VextSupply2HwHPReq2Valid
1220      * 0x04, VextSupply3HwHPReq2Valid
1221      */
1222     REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07),
1223     /*
1224      * 0x20, VanaSwHPReqValid
1225      * 0x80, Vaux1SwHPReqValid
1226      */
1227     REG_INIT(AB8500_REGUSWHPREQVALID1,  0x03, 0x0d, 0xa0),
1228     /*
1229      * 0x01, Vaux2SwHPReqValid
1230      * 0x02, Vaux3SwHPReqValid
1231      * 0x04, VextSupply1SwHPReqValid
1232      * 0x08, VextSupply2SwHPReqValid
1233      * 0x10, VextSupply3SwHPReqValid
1234      */
1235     REG_INIT(AB8500_REGUSWHPREQVALID2,  0x03, 0x0e, 0x1f),
1236     /*
1237      * 0x02, SysClkReq2Valid1
1238      * 0x04, SysClkReq3Valid1
1239      * 0x08, SysClkReq4Valid1
1240      * 0x10, SysClkReq5Valid1
1241      * 0x20, SysClkReq6Valid1
1242      * 0x40, SysClkReq7Valid1
1243      * 0x80, SysClkReq8Valid1
1244      */
1245     REG_INIT(AB8500_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
1246     /*
1247      * 0x02, SysClkReq2Valid2
1248      * 0x04, SysClkReq3Valid2
1249      * 0x08, SysClkReq4Valid2
1250      * 0x10, SysClkReq5Valid2
1251      * 0x20, SysClkReq6Valid2
1252      * 0x40, SysClkReq7Valid2
1253      * 0x80, SysClkReq8Valid2
1254      */
1255     REG_INIT(AB8500_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
1256     /*
1257      * 0x02, VTVoutEna
1258      * 0x04, Vintcore12Ena
1259      * 0x38, Vintcore12Sel
1260      * 0x40, Vintcore12LP
1261      * 0x80, VTVoutLP
1262      */
1263     REG_INIT(AB8500_REGUMISC1,      0x03, 0x80, 0xfe),
1264     /*
1265      * 0x02, VaudioEna
1266      * 0x04, VdmicEna
1267      * 0x08, Vamic1Ena
1268      * 0x10, Vamic2Ena
1269      */
1270     REG_INIT(AB8500_VAUDIOSUPPLY,       0x03, 0x83, 0x1e),
1271     /*
1272      * 0x01, Vamic1_dzout
1273      * 0x02, Vamic2_dzout
1274      */
1275     REG_INIT(AB8500_REGUCTRL1VAMIC,     0x03, 0x84, 0x03),
1276     /*
1277      * 0x03, VpllRegu (NOTE! PRCMU register bits)
1278      * 0x0c, VanaRegu
1279      */
1280     REG_INIT(AB8500_VPLLVANAREGU,       0x04, 0x06, 0x0f),
1281     /*
1282      * 0x01, VrefDDREna
1283      * 0x02, VrefDDRSleepMode
1284      */
1285     REG_INIT(AB8500_VREFDDR,        0x04, 0x07, 0x03),
1286     /*
1287      * 0x03, VextSupply1Regu
1288      * 0x0c, VextSupply2Regu
1289      * 0x30, VextSupply3Regu
1290      * 0x40, ExtSupply2Bypass
1291      * 0x80, ExtSupply3Bypass
1292      */
1293     REG_INIT(AB8500_EXTSUPPLYREGU,      0x04, 0x08, 0xff),
1294     /*
1295      * 0x03, Vaux1Regu
1296      * 0x0c, Vaux2Regu
1297      */
1298     REG_INIT(AB8500_VAUX12REGU,     0x04, 0x09, 0x0f),
1299     /*
1300      * 0x03, Vaux3Regu
1301      */
1302     REG_INIT(AB8500_VRF1VAUX3REGU,      0x04, 0x0a, 0x03),
1303     /*
1304      * 0x0f, Vaux1Sel
1305      */
1306     REG_INIT(AB8500_VAUX1SEL,       0x04, 0x1f, 0x0f),
1307     /*
1308      * 0x0f, Vaux2Sel
1309      */
1310     REG_INIT(AB8500_VAUX2SEL,       0x04, 0x20, 0x0f),
1311     /*
1312      * 0x07, Vaux3Sel
1313      */
1314     REG_INIT(AB8500_VRF1VAUX3SEL,       0x04, 0x21, 0x07),
1315     /*
1316      * 0x01, VextSupply12LP
1317      */
1318     REG_INIT(AB8500_REGUCTRL2SPARE,     0x04, 0x22, 0x01),
1319     /*
1320      * 0x04, Vaux1Disch
1321      * 0x08, Vaux2Disch
1322      * 0x10, Vaux3Disch
1323      * 0x20, Vintcore12Disch
1324      * 0x40, VTVoutDisch
1325      * 0x80, VaudioDisch
1326      */
1327     REG_INIT(AB8500_REGUCTRLDISCH,      0x04, 0x43, 0xfc),
1328     /*
1329      * 0x02, VanaDisch
1330      * 0x04, VdmicPullDownEna
1331      * 0x10, VdmicDisch
1332      */
1333     REG_INIT(AB8500_REGUCTRLDISCH2,     0x04, 0x44, 0x16),
1334 };
1335 
1336 /* AB8505 register init */
1337 static struct ab8500_reg_init ab8505_reg_init[] = {
1338     /*
1339      * 0x03, VarmRequestCtrl
1340      * 0x0c, VsmpsCRequestCtrl
1341      * 0x30, VsmpsARequestCtrl
1342      * 0xc0, VsmpsBRequestCtrl
1343      */
1344     REG_INIT(AB8505_REGUREQUESTCTRL1,   0x03, 0x03, 0xff),
1345     /*
1346      * 0x03, VsafeRequestCtrl
1347      * 0x0c, VpllRequestCtrl
1348      * 0x30, VanaRequestCtrl
1349      */
1350     REG_INIT(AB8505_REGUREQUESTCTRL2,   0x03, 0x04, 0x3f),
1351     /*
1352      * 0x30, Vaux1RequestCtrl
1353      * 0xc0, Vaux2RequestCtrl
1354      */
1355     REG_INIT(AB8505_REGUREQUESTCTRL3,   0x03, 0x05, 0xf0),
1356     /*
1357      * 0x03, Vaux3RequestCtrl
1358      * 0x04, SwHPReq
1359      */
1360     REG_INIT(AB8505_REGUREQUESTCTRL4,   0x03, 0x06, 0x07),
1361     /*
1362      * 0x01, VsmpsASysClkReq1HPValid
1363      * 0x02, VsmpsBSysClkReq1HPValid
1364      * 0x04, VsafeSysClkReq1HPValid
1365      * 0x08, VanaSysClkReq1HPValid
1366      * 0x10, VpllSysClkReq1HPValid
1367      * 0x20, Vaux1SysClkReq1HPValid
1368      * 0x40, Vaux2SysClkReq1HPValid
1369      * 0x80, Vaux3SysClkReq1HPValid
1370      */
1371     REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
1372     /*
1373      * 0x01, VsmpsCSysClkReq1HPValid
1374      * 0x02, VarmSysClkReq1HPValid
1375      * 0x04, VbbSysClkReq1HPValid
1376      * 0x08, VsmpsMSysClkReq1HPValid
1377      */
1378     REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
1379     /*
1380      * 0x01, VsmpsAHwHPReq1Valid
1381      * 0x02, VsmpsBHwHPReq1Valid
1382      * 0x04, VsafeHwHPReq1Valid
1383      * 0x08, VanaHwHPReq1Valid
1384      * 0x10, VpllHwHPReq1Valid
1385      * 0x20, Vaux1HwHPReq1Valid
1386      * 0x40, Vaux2HwHPReq1Valid
1387      * 0x80, Vaux3HwHPReq1Valid
1388      */
1389     REG_INIT(AB8505_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff),
1390     /*
1391      * 0x08, VsmpsMHwHPReq1Valid
1392      */
1393     REG_INIT(AB8505_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x08),
1394     /*
1395      * 0x01, VsmpsAHwHPReq2Valid
1396      * 0x02, VsmpsBHwHPReq2Valid
1397      * 0x04, VsafeHwHPReq2Valid
1398      * 0x08, VanaHwHPReq2Valid
1399      * 0x10, VpllHwHPReq2Valid
1400      * 0x20, Vaux1HwHPReq2Valid
1401      * 0x40, Vaux2HwHPReq2Valid
1402      * 0x80, Vaux3HwHPReq2Valid
1403      */
1404     REG_INIT(AB8505_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff),
1405     /*
1406      * 0x08, VsmpsMHwHPReq2Valid
1407      */
1408     REG_INIT(AB8505_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x08),
1409     /*
1410      * 0x01, VsmpsCSwHPReqValid
1411      * 0x02, VarmSwHPReqValid
1412      * 0x04, VsmpsASwHPReqValid
1413      * 0x08, VsmpsBSwHPReqValid
1414      * 0x10, VsafeSwHPReqValid
1415      * 0x20, VanaSwHPReqValid
1416      * 0x40, VpllSwHPReqValid
1417      * 0x80, Vaux1SwHPReqValid
1418      */
1419     REG_INIT(AB8505_REGUSWHPREQVALID1,  0x03, 0x0d, 0xff),
1420     /*
1421      * 0x01, Vaux2SwHPReqValid
1422      * 0x02, Vaux3SwHPReqValid
1423      * 0x20, VsmpsMSwHPReqValid
1424      */
1425     REG_INIT(AB8505_REGUSWHPREQVALID2,  0x03, 0x0e, 0x23),
1426     /*
1427      * 0x02, SysClkReq2Valid1
1428      * 0x04, SysClkReq3Valid1
1429      * 0x08, SysClkReq4Valid1
1430      */
1431     REG_INIT(AB8505_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0x0e),
1432     /*
1433      * 0x02, SysClkReq2Valid2
1434      * 0x04, SysClkReq3Valid2
1435      * 0x08, SysClkReq4Valid2
1436      */
1437     REG_INIT(AB8505_REGUSYSCLKREQVALID2,    0x03, 0x10, 0x0e),
1438     /*
1439      * 0x01, Vaux4SwHPReqValid
1440      * 0x02, Vaux4HwHPReq2Valid
1441      * 0x04, Vaux4HwHPReq1Valid
1442      * 0x08, Vaux4SysClkReq1HPValid
1443      */
1444     REG_INIT(AB8505_REGUVAUX4REQVALID,  0x03, 0x11, 0x0f),
1445     /*
1446      * 0x02, VadcEna
1447      * 0x04, VintCore12Ena
1448      * 0x38, VintCore12Sel
1449      * 0x40, VintCore12LP
1450      * 0x80, VadcLP
1451      */
1452     REG_INIT(AB8505_REGUMISC1,      0x03, 0x80, 0xfe),
1453     /*
1454      * 0x02, VaudioEna
1455      * 0x04, VdmicEna
1456      * 0x08, Vamic1Ena
1457      * 0x10, Vamic2Ena
1458      */
1459     REG_INIT(AB8505_VAUDIOSUPPLY,       0x03, 0x83, 0x1e),
1460     /*
1461      * 0x01, Vamic1_dzout
1462      * 0x02, Vamic2_dzout
1463      */
1464     REG_INIT(AB8505_REGUCTRL1VAMIC,     0x03, 0x84, 0x03),
1465     /*
1466      * 0x03, VsmpsARegu
1467      * 0x0c, VsmpsASelCtrl
1468      * 0x10, VsmpsAAutoMode
1469      * 0x20, VsmpsAPWMMode
1470      */
1471     REG_INIT(AB8505_VSMPSAREGU,     0x04, 0x03, 0x3f),
1472     /*
1473      * 0x03, VsmpsBRegu
1474      * 0x0c, VsmpsBSelCtrl
1475      * 0x10, VsmpsBAutoMode
1476      * 0x20, VsmpsBPWMMode
1477      */
1478     REG_INIT(AB8505_VSMPSBREGU,     0x04, 0x04, 0x3f),
1479     /*
1480      * 0x03, VsafeRegu
1481      * 0x0c, VsafeSelCtrl
1482      * 0x10, VsafeAutoMode
1483      * 0x20, VsafePWMMode
1484      */
1485     REG_INIT(AB8505_VSAFEREGU,      0x04, 0x05, 0x3f),
1486     /*
1487      * 0x03, VpllRegu (NOTE! PRCMU register bits)
1488      * 0x0c, VanaRegu
1489      */
1490     REG_INIT(AB8505_VPLLVANAREGU,       0x04, 0x06, 0x0f),
1491     /*
1492      * 0x03, VextSupply1Regu
1493      * 0x0c, VextSupply2Regu
1494      * 0x30, VextSupply3Regu
1495      * 0x40, ExtSupply2Bypass
1496      * 0x80, ExtSupply3Bypass
1497      */
1498     REG_INIT(AB8505_EXTSUPPLYREGU,      0x04, 0x08, 0xff),
1499     /*
1500      * 0x03, Vaux1Regu
1501      * 0x0c, Vaux2Regu
1502      */
1503     REG_INIT(AB8505_VAUX12REGU,     0x04, 0x09, 0x0f),
1504     /*
1505      * 0x0f, Vaux3Regu
1506      */
1507     REG_INIT(AB8505_VRF1VAUX3REGU,      0x04, 0x0a, 0x0f),
1508     /*
1509      * 0x3f, VsmpsASel1
1510      */
1511     REG_INIT(AB8505_VSMPSASEL1,     0x04, 0x13, 0x3f),
1512     /*
1513      * 0x3f, VsmpsASel2
1514      */
1515     REG_INIT(AB8505_VSMPSASEL2,     0x04, 0x14, 0x3f),
1516     /*
1517      * 0x3f, VsmpsASel3
1518      */
1519     REG_INIT(AB8505_VSMPSASEL3,     0x04, 0x15, 0x3f),
1520     /*
1521      * 0x3f, VsmpsBSel1
1522      */
1523     REG_INIT(AB8505_VSMPSBSEL1,     0x04, 0x17, 0x3f),
1524     /*
1525      * 0x3f, VsmpsBSel2
1526      */
1527     REG_INIT(AB8505_VSMPSBSEL2,     0x04, 0x18, 0x3f),
1528     /*
1529      * 0x3f, VsmpsBSel3
1530      */
1531     REG_INIT(AB8505_VSMPSBSEL3,     0x04, 0x19, 0x3f),
1532     /*
1533      * 0x7f, VsafeSel1
1534      */
1535     REG_INIT(AB8505_VSAFESEL1,      0x04, 0x1b, 0x7f),
1536     /*
1537      * 0x3f, VsafeSel2
1538      */
1539     REG_INIT(AB8505_VSAFESEL2,      0x04, 0x1c, 0x7f),
1540     /*
1541      * 0x3f, VsafeSel3
1542      */
1543     REG_INIT(AB8505_VSAFESEL3,      0x04, 0x1d, 0x7f),
1544     /*
1545      * 0x0f, Vaux1Sel
1546      */
1547     REG_INIT(AB8505_VAUX1SEL,       0x04, 0x1f, 0x0f),
1548     /*
1549      * 0x0f, Vaux2Sel
1550      */
1551     REG_INIT(AB8505_VAUX2SEL,       0x04, 0x20, 0x0f),
1552     /*
1553      * 0x07, Vaux3Sel
1554      * 0x30, VRF1Sel
1555      */
1556     REG_INIT(AB8505_VRF1VAUX3SEL,       0x04, 0x21, 0x37),
1557     /*
1558      * 0x03, Vaux4RequestCtrl
1559      */
1560     REG_INIT(AB8505_VAUX4REQCTRL,       0x04, 0x2d, 0x03),
1561     /*
1562      * 0x03, Vaux4Regu
1563      */
1564     REG_INIT(AB8505_VAUX4REGU,      0x04, 0x2e, 0x03),
1565     /*
1566      * 0x0f, Vaux4Sel
1567      */
1568     REG_INIT(AB8505_VAUX4SEL,       0x04, 0x2f, 0x0f),
1569     /*
1570      * 0x04, Vaux1Disch
1571      * 0x08, Vaux2Disch
1572      * 0x10, Vaux3Disch
1573      * 0x20, Vintcore12Disch
1574      * 0x40, VTVoutDisch
1575      * 0x80, VaudioDisch
1576      */
1577     REG_INIT(AB8505_REGUCTRLDISCH,      0x04, 0x43, 0xfc),
1578     /*
1579      * 0x02, VanaDisch
1580      * 0x04, VdmicPullDownEna
1581      * 0x10, VdmicDisch
1582      */
1583     REG_INIT(AB8505_REGUCTRLDISCH2,     0x04, 0x44, 0x16),
1584     /*
1585      * 0x01, Vaux4Disch
1586      */
1587     REG_INIT(AB8505_REGUCTRLDISCH3,     0x04, 0x48, 0x01),
1588     /*
1589      * 0x07, Vaux5Sel
1590      * 0x08, Vaux5LP
1591      * 0x10, Vaux5Ena
1592      * 0x20, Vaux5Disch
1593      * 0x40, Vaux5DisSfst
1594      * 0x80, Vaux5DisPulld
1595      */
1596     REG_INIT(AB8505_CTRLVAUX5,      0x01, 0x55, 0xff),
1597     /*
1598      * 0x07, Vaux6Sel
1599      * 0x08, Vaux6LP
1600      * 0x10, Vaux6Ena
1601      * 0x80, Vaux6DisPulld
1602      */
1603     REG_INIT(AB8505_CTRLVAUX6,      0x01, 0x56, 0x9f),
1604 };
1605 
1606 static struct of_regulator_match ab8500_regulator_match[] = {
1607     { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8500_LDO_AUX1, },
1608     { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8500_LDO_AUX2, },
1609     { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8500_LDO_AUX3, },
1610     { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
1611     { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8500_LDO_TVOUT, },
1612     { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8500_LDO_AUDIO, },
1613     { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
1614     { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
1615     { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8500_LDO_DMIC, },
1616     { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8500_LDO_ANA, },
1617 };
1618 
1619 static struct of_regulator_match ab8505_regulator_match[] = {
1620     { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8505_LDO_AUX1, },
1621     { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8505_LDO_AUX2, },
1622     { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8505_LDO_AUX3, },
1623     { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8505_LDO_AUX4, },
1624     { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8505_LDO_AUX5, },
1625     { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8505_LDO_AUX6, },
1626     { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
1627     { .name = "ab8500_ldo_adc", .driver_data = (void *) AB8505_LDO_ADC, },
1628     { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8505_LDO_AUDIO, },
1629     { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
1630     { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
1631     { .name = "ab8500_ldo_aux8",    .driver_data = (void *) AB8505_LDO_AUX8, },
1632     { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8505_LDO_ANA, },
1633 };
1634 
1635 static struct {
1636     struct ab8500_regulator_info *info;
1637     int info_size;
1638     struct ab8500_reg_init *init;
1639     int init_size;
1640     struct of_regulator_match *match;
1641     int match_size;
1642 } abx500_regulator;
1643 
1644 static void abx500_get_regulator_info(struct ab8500 *ab8500)
1645 {
1646     if (is_ab8505(ab8500)) {
1647         abx500_regulator.info = ab8505_regulator_info;
1648         abx500_regulator.info_size = ARRAY_SIZE(ab8505_regulator_info);
1649         abx500_regulator.init = ab8505_reg_init;
1650         abx500_regulator.init_size = AB8505_NUM_REGULATOR_REGISTERS;
1651         abx500_regulator.match = ab8505_regulator_match;
1652         abx500_regulator.match_size = ARRAY_SIZE(ab8505_regulator_match);
1653     } else {
1654         abx500_regulator.info = ab8500_regulator_info;
1655         abx500_regulator.info_size = ARRAY_SIZE(ab8500_regulator_info);
1656         abx500_regulator.init = ab8500_reg_init;
1657         abx500_regulator.init_size = AB8500_NUM_REGULATOR_REGISTERS;
1658         abx500_regulator.match = ab8500_regulator_match;
1659         abx500_regulator.match_size = ARRAY_SIZE(ab8500_regulator_match);
1660     }
1661 }
1662 
1663 static int ab8500_regulator_register(struct platform_device *pdev,
1664                      struct regulator_init_data *init_data,
1665                      int id, struct device_node *np)
1666 {
1667     struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1668     struct ab8500_regulator_info *info = NULL;
1669     struct regulator_config config = { };
1670     struct regulator_dev *rdev;
1671 
1672     /* assign per-regulator data */
1673     info = &abx500_regulator.info[id];
1674     info->dev = &pdev->dev;
1675 
1676     config.dev = &pdev->dev;
1677     config.init_data = init_data;
1678     config.driver_data = info;
1679     config.of_node = np;
1680 
1681     /* fix for hardware before ab8500v2.0 */
1682     if (is_ab8500_1p1_or_earlier(ab8500)) {
1683         if (info->desc.id == AB8500_LDO_AUX3) {
1684             info->desc.n_voltages =
1685                 ARRAY_SIZE(ldo_vauxn_voltages);
1686             info->desc.volt_table = ldo_vauxn_voltages;
1687             info->voltage_mask = 0xf;
1688         }
1689     }
1690 
1691     /* register regulator with framework */
1692     rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
1693     if (IS_ERR(rdev)) {
1694         dev_err(&pdev->dev, "failed to register regulator %s\n",
1695             info->desc.name);
1696         return PTR_ERR(rdev);
1697     }
1698 
1699     return 0;
1700 }
1701 
1702 static int ab8500_regulator_probe(struct platform_device *pdev)
1703 {
1704     struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1705     struct device_node *np = pdev->dev.of_node;
1706     struct of_regulator_match *match;
1707     int err, i;
1708 
1709     if (!ab8500) {
1710         dev_err(&pdev->dev, "null mfd parent\n");
1711         return -EINVAL;
1712     }
1713 
1714     abx500_get_regulator_info(ab8500);
1715 
1716     err = of_regulator_match(&pdev->dev, np,
1717                  abx500_regulator.match,
1718                  abx500_regulator.match_size);
1719     if (err < 0) {
1720         dev_err(&pdev->dev,
1721             "Error parsing regulator init data: %d\n", err);
1722         return err;
1723     }
1724 
1725     match = abx500_regulator.match;
1726     for (i = 0; i < abx500_regulator.info_size; i++) {
1727         err = ab8500_regulator_register(pdev, match[i].init_data, i,
1728                         match[i].of_node);
1729         if (err)
1730             return err;
1731     }
1732 
1733     return 0;
1734 }
1735 
1736 static struct platform_driver ab8500_regulator_driver = {
1737     .probe = ab8500_regulator_probe,
1738     .driver         = {
1739         .name   = "ab8500-regulator",
1740     },
1741 };
1742 
1743 static int __init ab8500_regulator_init(void)
1744 {
1745     int ret;
1746 
1747     ret = platform_driver_register(&ab8500_regulator_driver);
1748     if (ret != 0)
1749         pr_err("Failed to register ab8500 regulator: %d\n", ret);
1750 
1751     return ret;
1752 }
1753 subsys_initcall(ab8500_regulator_init);
1754 
1755 static void __exit ab8500_regulator_exit(void)
1756 {
1757     platform_driver_unregister(&ab8500_regulator_driver);
1758 }
1759 module_exit(ab8500_regulator_exit);
1760 
1761 MODULE_LICENSE("GPL v2");
1762 MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
1763 MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
1764 MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
1765 MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
1766 MODULE_ALIAS("platform:ab8500-regulator");
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