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0011 #include <linux/module.h>
0012 #include <linux/kernel.h>
0013 #include <linux/platform_device.h>
0014 #include <linux/slab.h>
0015 #include <linux/err.h>
0016 #include <linux/clk.h>
0017 #include <linux/io.h>
0018 #include <linux/pwm.h>
0019 #include <linux/of_device.h>
0020
0021 #include <asm/div64.h>
0022
0023 #define HAS_SECONDARY_PWM 0x10
0024
0025 static const struct platform_device_id pwm_id_table[] = {
0026
0027 { "pxa25x-pwm", 0 },
0028 { "pxa27x-pwm", HAS_SECONDARY_PWM },
0029 { "pxa168-pwm", 0 },
0030 { "pxa910-pwm", 0 },
0031 { },
0032 };
0033 MODULE_DEVICE_TABLE(platform, pwm_id_table);
0034
0035
0036 #define PWMCR (0x00)
0037 #define PWMDCR (0x04)
0038 #define PWMPCR (0x08)
0039
0040 #define PWMCR_SD (1 << 6)
0041 #define PWMDCR_FD (1 << 10)
0042
0043 struct pxa_pwm_chip {
0044 struct pwm_chip chip;
0045 struct device *dev;
0046
0047 struct clk *clk;
0048 void __iomem *mmio_base;
0049 };
0050
0051 static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
0052 {
0053 return container_of(chip, struct pxa_pwm_chip, chip);
0054 }
0055
0056
0057
0058
0059
0060 static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
0061 u64 duty_ns, u64 period_ns)
0062 {
0063 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
0064 unsigned long long c;
0065 unsigned long period_cycles, prescale, pv, dc;
0066 unsigned long offset;
0067 int rc;
0068
0069 offset = pwm->hwpwm ? 0x10 : 0;
0070
0071 c = clk_get_rate(pc->clk);
0072 c = c * period_ns;
0073 do_div(c, 1000000000);
0074 period_cycles = c;
0075
0076 if (period_cycles < 1)
0077 period_cycles = 1;
0078 prescale = (period_cycles - 1) / 1024;
0079 pv = period_cycles / (prescale + 1) - 1;
0080
0081 if (prescale > 63)
0082 return -EINVAL;
0083
0084 if (duty_ns == period_ns)
0085 dc = PWMDCR_FD;
0086 else
0087 dc = mul_u64_u64_div_u64(pv + 1, duty_ns, period_ns);
0088
0089
0090
0091
0092 rc = clk_prepare_enable(pc->clk);
0093 if (rc < 0)
0094 return rc;
0095
0096 writel(prescale, pc->mmio_base + offset + PWMCR);
0097 writel(dc, pc->mmio_base + offset + PWMDCR);
0098 writel(pv, pc->mmio_base + offset + PWMPCR);
0099
0100 clk_disable_unprepare(pc->clk);
0101 return 0;
0102 }
0103
0104 static int pxa_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
0105 {
0106 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
0107
0108 return clk_prepare_enable(pc->clk);
0109 }
0110
0111 static void pxa_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
0112 {
0113 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
0114
0115 clk_disable_unprepare(pc->clk);
0116 }
0117
0118 static int pxa_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
0119 const struct pwm_state *state)
0120 {
0121 int err;
0122
0123 if (state->polarity != PWM_POLARITY_NORMAL)
0124 return -EINVAL;
0125
0126 if (!state->enabled) {
0127 if (pwm->state.enabled)
0128 pxa_pwm_disable(chip, pwm);
0129
0130 return 0;
0131 }
0132
0133 err = pxa_pwm_config(chip, pwm, state->duty_cycle, state->period);
0134 if (err)
0135 return err;
0136
0137 if (!pwm->state.enabled)
0138 return pxa_pwm_enable(chip, pwm);
0139
0140 return 0;
0141 }
0142
0143 static const struct pwm_ops pxa_pwm_ops = {
0144 .apply = pxa_pwm_apply,
0145 .owner = THIS_MODULE,
0146 };
0147
0148 #ifdef CONFIG_OF
0149
0150
0151
0152
0153
0154
0155 static const struct of_device_id pwm_of_match[] = {
0156 { .compatible = "marvell,pxa250-pwm", .data = &pwm_id_table[0]},
0157 { .compatible = "marvell,pxa270-pwm", .data = &pwm_id_table[0]},
0158 { .compatible = "marvell,pxa168-pwm", .data = &pwm_id_table[0]},
0159 { .compatible = "marvell,pxa910-pwm", .data = &pwm_id_table[0]},
0160 { }
0161 };
0162 MODULE_DEVICE_TABLE(of, pwm_of_match);
0163 #else
0164 #define pwm_of_match NULL
0165 #endif
0166
0167 static const struct platform_device_id *pxa_pwm_get_id_dt(struct device *dev)
0168 {
0169 const struct of_device_id *id = of_match_device(pwm_of_match, dev);
0170
0171 return id ? id->data : NULL;
0172 }
0173
0174 static int pwm_probe(struct platform_device *pdev)
0175 {
0176 const struct platform_device_id *id = platform_get_device_id(pdev);
0177 struct pxa_pwm_chip *pc;
0178 int ret = 0;
0179
0180 if (IS_ENABLED(CONFIG_OF) && id == NULL)
0181 id = pxa_pwm_get_id_dt(&pdev->dev);
0182
0183 if (id == NULL)
0184 return -EINVAL;
0185
0186 pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
0187 if (pc == NULL)
0188 return -ENOMEM;
0189
0190 pc->clk = devm_clk_get(&pdev->dev, NULL);
0191 if (IS_ERR(pc->clk))
0192 return PTR_ERR(pc->clk);
0193
0194 pc->chip.dev = &pdev->dev;
0195 pc->chip.ops = &pxa_pwm_ops;
0196 pc->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1;
0197
0198 if (IS_ENABLED(CONFIG_OF)) {
0199 pc->chip.of_xlate = of_pwm_single_xlate;
0200 pc->chip.of_pwm_n_cells = 1;
0201 }
0202
0203 pc->mmio_base = devm_platform_ioremap_resource(pdev, 0);
0204 if (IS_ERR(pc->mmio_base))
0205 return PTR_ERR(pc->mmio_base);
0206
0207 ret = devm_pwmchip_add(&pdev->dev, &pc->chip);
0208 if (ret < 0) {
0209 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
0210 return ret;
0211 }
0212
0213 return 0;
0214 }
0215
0216 static struct platform_driver pwm_driver = {
0217 .driver = {
0218 .name = "pxa25x-pwm",
0219 .of_match_table = pwm_of_match,
0220 },
0221 .probe = pwm_probe,
0222 .id_table = pwm_id_table,
0223 };
0224
0225 module_platform_driver(pwm_driver);
0226
0227 MODULE_LICENSE("GPL v2");