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0011 #include <linux/acpi.h>
0012 #include <linux/gpio/driver.h>
0013 #include <linux/i2c.h>
0014 #include <linux/module.h>
0015 #include <linux/mutex.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/property.h>
0018 #include <linux/pwm.h>
0019 #include <linux/regmap.h>
0020 #include <linux/slab.h>
0021 #include <linux/delay.h>
0022 #include <linux/pm_runtime.h>
0023 #include <linux/bitmap.h>
0024
0025
0026
0027
0028
0029
0030
0031
0032
0033 #define PCA9685_MODE1 0x00
0034 #define PCA9685_MODE2 0x01
0035 #define PCA9685_SUBADDR1 0x02
0036 #define PCA9685_SUBADDR2 0x03
0037 #define PCA9685_SUBADDR3 0x04
0038 #define PCA9685_ALLCALLADDR 0x05
0039 #define PCA9685_LEDX_ON_L 0x06
0040 #define PCA9685_LEDX_ON_H 0x07
0041 #define PCA9685_LEDX_OFF_L 0x08
0042 #define PCA9685_LEDX_OFF_H 0x09
0043
0044 #define PCA9685_ALL_LED_ON_L 0xFA
0045 #define PCA9685_ALL_LED_ON_H 0xFB
0046 #define PCA9685_ALL_LED_OFF_L 0xFC
0047 #define PCA9685_ALL_LED_OFF_H 0xFD
0048 #define PCA9685_PRESCALE 0xFE
0049
0050 #define PCA9685_PRESCALE_MIN 0x03
0051 #define PCA9685_PRESCALE_MAX 0xFF
0052
0053 #define PCA9685_COUNTER_RANGE 4096
0054 #define PCA9685_OSC_CLOCK_MHZ 25
0055
0056 #define PCA9685_NUMREGS 0xFF
0057 #define PCA9685_MAXCHAN 0x10
0058
0059 #define LED_FULL BIT(4)
0060 #define MODE1_ALLCALL BIT(0)
0061 #define MODE1_SUB3 BIT(1)
0062 #define MODE1_SUB2 BIT(2)
0063 #define MODE1_SUB1 BIT(3)
0064 #define MODE1_SLEEP BIT(4)
0065 #define MODE2_INVRT BIT(4)
0066 #define MODE2_OUTDRV BIT(2)
0067
0068 #define LED_N_ON_H(N) (PCA9685_LEDX_ON_H + (4 * (N)))
0069 #define LED_N_ON_L(N) (PCA9685_LEDX_ON_L + (4 * (N)))
0070 #define LED_N_OFF_H(N) (PCA9685_LEDX_OFF_H + (4 * (N)))
0071 #define LED_N_OFF_L(N) (PCA9685_LEDX_OFF_L + (4 * (N)))
0072
0073 #define REG_ON_H(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_H : LED_N_ON_H((C)))
0074 #define REG_ON_L(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_L : LED_N_ON_L((C)))
0075 #define REG_OFF_H(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_H : LED_N_OFF_H((C)))
0076 #define REG_OFF_L(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_L : LED_N_OFF_L((C)))
0077
0078 struct pca9685 {
0079 struct pwm_chip chip;
0080 struct regmap *regmap;
0081 struct mutex lock;
0082 DECLARE_BITMAP(pwms_enabled, PCA9685_MAXCHAN + 1);
0083 #if IS_ENABLED(CONFIG_GPIOLIB)
0084 struct gpio_chip gpio;
0085 DECLARE_BITMAP(pwms_inuse, PCA9685_MAXCHAN + 1);
0086 #endif
0087 };
0088
0089 static inline struct pca9685 *to_pca(struct pwm_chip *chip)
0090 {
0091 return container_of(chip, struct pca9685, chip);
0092 }
0093
0094
0095 static bool pca9685_prescaler_can_change(struct pca9685 *pca, int channel)
0096 {
0097
0098 if (bitmap_empty(pca->pwms_enabled, PCA9685_MAXCHAN + 1))
0099 return true;
0100
0101 if (bitmap_weight(pca->pwms_enabled, PCA9685_MAXCHAN + 1) > 1)
0102 return false;
0103
0104
0105
0106
0107 return test_bit(channel, pca->pwms_enabled);
0108 }
0109
0110 static int pca9685_read_reg(struct pca9685 *pca, unsigned int reg, unsigned int *val)
0111 {
0112 struct device *dev = pca->chip.dev;
0113 int err;
0114
0115 err = regmap_read(pca->regmap, reg, val);
0116 if (err)
0117 dev_err(dev, "regmap_read of register 0x%x failed: %pe\n", reg, ERR_PTR(err));
0118
0119 return err;
0120 }
0121
0122 static int pca9685_write_reg(struct pca9685 *pca, unsigned int reg, unsigned int val)
0123 {
0124 struct device *dev = pca->chip.dev;
0125 int err;
0126
0127 err = regmap_write(pca->regmap, reg, val);
0128 if (err)
0129 dev_err(dev, "regmap_write to register 0x%x failed: %pe\n", reg, ERR_PTR(err));
0130
0131 return err;
0132 }
0133
0134
0135 static void pca9685_pwm_set_duty(struct pca9685 *pca, int channel, unsigned int duty)
0136 {
0137 struct pwm_device *pwm = &pca->chip.pwms[channel];
0138 unsigned int on, off;
0139
0140 if (duty == 0) {
0141
0142 pca9685_write_reg(pca, REG_OFF_H(channel), LED_FULL);
0143 return;
0144 } else if (duty >= PCA9685_COUNTER_RANGE) {
0145
0146 pca9685_write_reg(pca, REG_ON_H(channel), LED_FULL);
0147 pca9685_write_reg(pca, REG_OFF_H(channel), 0);
0148 return;
0149 }
0150
0151
0152 if (pwm->state.usage_power && channel < PCA9685_MAXCHAN) {
0153
0154
0155
0156
0157
0158
0159
0160 on = channel * PCA9685_COUNTER_RANGE / PCA9685_MAXCHAN;
0161 } else
0162 on = 0;
0163
0164 off = (on + duty) % PCA9685_COUNTER_RANGE;
0165
0166
0167 pca9685_write_reg(pca, REG_ON_L(channel), on & 0xff);
0168 pca9685_write_reg(pca, REG_ON_H(channel), (on >> 8) & 0xf);
0169
0170 pca9685_write_reg(pca, REG_OFF_L(channel), off & 0xff);
0171 pca9685_write_reg(pca, REG_OFF_H(channel), (off >> 8) & 0xf);
0172 }
0173
0174 static unsigned int pca9685_pwm_get_duty(struct pca9685 *pca, int channel)
0175 {
0176 struct pwm_device *pwm = &pca->chip.pwms[channel];
0177 unsigned int off = 0, on = 0, val = 0;
0178
0179 if (WARN_ON(channel >= PCA9685_MAXCHAN)) {
0180
0181 return 0;
0182 }
0183
0184 pca9685_read_reg(pca, LED_N_OFF_H(channel), &off);
0185 if (off & LED_FULL) {
0186
0187 return 0;
0188 }
0189
0190 pca9685_read_reg(pca, LED_N_ON_H(channel), &on);
0191 if (on & LED_FULL) {
0192
0193 return PCA9685_COUNTER_RANGE;
0194 }
0195
0196 pca9685_read_reg(pca, LED_N_OFF_L(channel), &val);
0197 off = ((off & 0xf) << 8) | (val & 0xff);
0198 if (!pwm->state.usage_power)
0199 return off;
0200
0201
0202 if (pca9685_read_reg(pca, LED_N_ON_L(channel), &val)) {
0203
0204 val = 0;
0205 }
0206 on = ((on & 0xf) << 8) | (val & 0xff);
0207 return (off - on) & (PCA9685_COUNTER_RANGE - 1);
0208 }
0209
0210 #if IS_ENABLED(CONFIG_GPIOLIB)
0211 static bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca, int pwm_idx)
0212 {
0213 bool is_inuse;
0214
0215 mutex_lock(&pca->lock);
0216 if (pwm_idx >= PCA9685_MAXCHAN) {
0217
0218
0219
0220
0221 if (!bitmap_empty(pca->pwms_inuse, PCA9685_MAXCHAN)) {
0222 is_inuse = true;
0223 goto out;
0224 }
0225 } else {
0226
0227
0228
0229
0230 if (test_bit(PCA9685_MAXCHAN, pca->pwms_inuse)) {
0231 is_inuse = true;
0232 goto out;
0233 }
0234 }
0235 is_inuse = test_and_set_bit(pwm_idx, pca->pwms_inuse);
0236 out:
0237 mutex_unlock(&pca->lock);
0238 return is_inuse;
0239 }
0240
0241 static void pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx)
0242 {
0243 mutex_lock(&pca->lock);
0244 clear_bit(pwm_idx, pca->pwms_inuse);
0245 mutex_unlock(&pca->lock);
0246 }
0247
0248 static int pca9685_pwm_gpio_request(struct gpio_chip *gpio, unsigned int offset)
0249 {
0250 struct pca9685 *pca = gpiochip_get_data(gpio);
0251
0252 if (pca9685_pwm_test_and_set_inuse(pca, offset))
0253 return -EBUSY;
0254 pm_runtime_get_sync(pca->chip.dev);
0255 return 0;
0256 }
0257
0258 static int pca9685_pwm_gpio_get(struct gpio_chip *gpio, unsigned int offset)
0259 {
0260 struct pca9685 *pca = gpiochip_get_data(gpio);
0261
0262 return pca9685_pwm_get_duty(pca, offset) != 0;
0263 }
0264
0265 static void pca9685_pwm_gpio_set(struct gpio_chip *gpio, unsigned int offset,
0266 int value)
0267 {
0268 struct pca9685 *pca = gpiochip_get_data(gpio);
0269
0270 pca9685_pwm_set_duty(pca, offset, value ? PCA9685_COUNTER_RANGE : 0);
0271 }
0272
0273 static void pca9685_pwm_gpio_free(struct gpio_chip *gpio, unsigned int offset)
0274 {
0275 struct pca9685 *pca = gpiochip_get_data(gpio);
0276
0277 pca9685_pwm_set_duty(pca, offset, 0);
0278 pm_runtime_put(pca->chip.dev);
0279 pca9685_pwm_clear_inuse(pca, offset);
0280 }
0281
0282 static int pca9685_pwm_gpio_get_direction(struct gpio_chip *chip,
0283 unsigned int offset)
0284 {
0285
0286 return GPIO_LINE_DIRECTION_OUT;
0287 }
0288
0289 static int pca9685_pwm_gpio_direction_input(struct gpio_chip *gpio,
0290 unsigned int offset)
0291 {
0292 return -EINVAL;
0293 }
0294
0295 static int pca9685_pwm_gpio_direction_output(struct gpio_chip *gpio,
0296 unsigned int offset, int value)
0297 {
0298 pca9685_pwm_gpio_set(gpio, offset, value);
0299
0300 return 0;
0301 }
0302
0303
0304
0305
0306
0307
0308
0309 static int pca9685_pwm_gpio_probe(struct pca9685 *pca)
0310 {
0311 struct device *dev = pca->chip.dev;
0312
0313 pca->gpio.label = dev_name(dev);
0314 pca->gpio.parent = dev;
0315 pca->gpio.request = pca9685_pwm_gpio_request;
0316 pca->gpio.free = pca9685_pwm_gpio_free;
0317 pca->gpio.get_direction = pca9685_pwm_gpio_get_direction;
0318 pca->gpio.direction_input = pca9685_pwm_gpio_direction_input;
0319 pca->gpio.direction_output = pca9685_pwm_gpio_direction_output;
0320 pca->gpio.get = pca9685_pwm_gpio_get;
0321 pca->gpio.set = pca9685_pwm_gpio_set;
0322 pca->gpio.base = -1;
0323 pca->gpio.ngpio = PCA9685_MAXCHAN;
0324 pca->gpio.can_sleep = true;
0325
0326 return devm_gpiochip_add_data(dev, &pca->gpio, pca);
0327 }
0328 #else
0329 static inline bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca,
0330 int pwm_idx)
0331 {
0332 return false;
0333 }
0334
0335 static inline void
0336 pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx)
0337 {
0338 }
0339
0340 static inline int pca9685_pwm_gpio_probe(struct pca9685 *pca)
0341 {
0342 return 0;
0343 }
0344 #endif
0345
0346 static void pca9685_set_sleep_mode(struct pca9685 *pca, bool enable)
0347 {
0348 struct device *dev = pca->chip.dev;
0349 int err = regmap_update_bits(pca->regmap, PCA9685_MODE1,
0350 MODE1_SLEEP, enable ? MODE1_SLEEP : 0);
0351 if (err) {
0352 dev_err(dev, "regmap_update_bits of register 0x%x failed: %pe\n",
0353 PCA9685_MODE1, ERR_PTR(err));
0354 return;
0355 }
0356
0357 if (!enable) {
0358
0359 udelay(500);
0360 }
0361 }
0362
0363 static int __pca9685_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
0364 const struct pwm_state *state)
0365 {
0366 struct pca9685 *pca = to_pca(chip);
0367 unsigned long long duty, prescale;
0368 unsigned int val = 0;
0369
0370 if (state->polarity != PWM_POLARITY_NORMAL)
0371 return -EINVAL;
0372
0373 prescale = DIV_ROUND_CLOSEST_ULL(PCA9685_OSC_CLOCK_MHZ * state->period,
0374 PCA9685_COUNTER_RANGE * 1000) - 1;
0375 if (prescale < PCA9685_PRESCALE_MIN || prescale > PCA9685_PRESCALE_MAX) {
0376 dev_err(chip->dev, "pwm not changed: period out of bounds!\n");
0377 return -EINVAL;
0378 }
0379
0380 if (!state->enabled) {
0381 pca9685_pwm_set_duty(pca, pwm->hwpwm, 0);
0382 return 0;
0383 }
0384
0385 pca9685_read_reg(pca, PCA9685_PRESCALE, &val);
0386 if (prescale != val) {
0387 if (!pca9685_prescaler_can_change(pca, pwm->hwpwm)) {
0388 dev_err(chip->dev,
0389 "pwm not changed: periods of enabled pwms must match!\n");
0390 return -EBUSY;
0391 }
0392
0393
0394
0395
0396
0397
0398
0399
0400 pca9685_set_sleep_mode(pca, true);
0401
0402
0403 pca9685_write_reg(pca, PCA9685_PRESCALE, prescale);
0404
0405
0406 pca9685_set_sleep_mode(pca, false);
0407 }
0408
0409 duty = PCA9685_COUNTER_RANGE * state->duty_cycle;
0410 duty = DIV_ROUND_UP_ULL(duty, state->period);
0411 pca9685_pwm_set_duty(pca, pwm->hwpwm, duty);
0412 return 0;
0413 }
0414
0415 static int pca9685_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
0416 const struct pwm_state *state)
0417 {
0418 struct pca9685 *pca = to_pca(chip);
0419 int ret;
0420
0421 mutex_lock(&pca->lock);
0422 ret = __pca9685_pwm_apply(chip, pwm, state);
0423 if (ret == 0) {
0424 if (state->enabled)
0425 set_bit(pwm->hwpwm, pca->pwms_enabled);
0426 else
0427 clear_bit(pwm->hwpwm, pca->pwms_enabled);
0428 }
0429 mutex_unlock(&pca->lock);
0430
0431 return ret;
0432 }
0433
0434 static void pca9685_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
0435 struct pwm_state *state)
0436 {
0437 struct pca9685 *pca = to_pca(chip);
0438 unsigned long long duty;
0439 unsigned int val = 0;
0440
0441
0442 pca9685_read_reg(pca, PCA9685_PRESCALE, &val);
0443
0444
0445
0446
0447
0448 state->period = (PCA9685_COUNTER_RANGE * 1000 / PCA9685_OSC_CLOCK_MHZ) *
0449 (val + 1);
0450
0451
0452 state->polarity = PWM_POLARITY_NORMAL;
0453
0454 if (pwm->hwpwm >= PCA9685_MAXCHAN) {
0455
0456
0457
0458
0459 state->duty_cycle = 0;
0460 state->enabled = false;
0461 return;
0462 }
0463
0464 state->enabled = true;
0465 duty = pca9685_pwm_get_duty(pca, pwm->hwpwm);
0466 state->duty_cycle = DIV_ROUND_DOWN_ULL(duty * state->period, PCA9685_COUNTER_RANGE);
0467 }
0468
0469 static int pca9685_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
0470 {
0471 struct pca9685 *pca = to_pca(chip);
0472
0473 if (pca9685_pwm_test_and_set_inuse(pca, pwm->hwpwm))
0474 return -EBUSY;
0475
0476 if (pwm->hwpwm < PCA9685_MAXCHAN) {
0477
0478 mutex_lock(&pca->lock);
0479 set_bit(pwm->hwpwm, pca->pwms_enabled);
0480 mutex_unlock(&pca->lock);
0481 }
0482
0483 pm_runtime_get_sync(chip->dev);
0484
0485 return 0;
0486 }
0487
0488 static void pca9685_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
0489 {
0490 struct pca9685 *pca = to_pca(chip);
0491
0492 mutex_lock(&pca->lock);
0493 pca9685_pwm_set_duty(pca, pwm->hwpwm, 0);
0494 clear_bit(pwm->hwpwm, pca->pwms_enabled);
0495 mutex_unlock(&pca->lock);
0496
0497 pm_runtime_put(chip->dev);
0498 pca9685_pwm_clear_inuse(pca, pwm->hwpwm);
0499 }
0500
0501 static const struct pwm_ops pca9685_pwm_ops = {
0502 .apply = pca9685_pwm_apply,
0503 .get_state = pca9685_pwm_get_state,
0504 .request = pca9685_pwm_request,
0505 .free = pca9685_pwm_free,
0506 .owner = THIS_MODULE,
0507 };
0508
0509 static const struct regmap_config pca9685_regmap_i2c_config = {
0510 .reg_bits = 8,
0511 .val_bits = 8,
0512 .max_register = PCA9685_NUMREGS,
0513 .cache_type = REGCACHE_NONE,
0514 };
0515
0516 static int pca9685_pwm_probe(struct i2c_client *client,
0517 const struct i2c_device_id *id)
0518 {
0519 struct pca9685 *pca;
0520 unsigned int reg;
0521 int ret;
0522
0523 pca = devm_kzalloc(&client->dev, sizeof(*pca), GFP_KERNEL);
0524 if (!pca)
0525 return -ENOMEM;
0526
0527 pca->regmap = devm_regmap_init_i2c(client, &pca9685_regmap_i2c_config);
0528 if (IS_ERR(pca->regmap)) {
0529 ret = PTR_ERR(pca->regmap);
0530 dev_err(&client->dev, "Failed to initialize register map: %d\n",
0531 ret);
0532 return ret;
0533 }
0534
0535 i2c_set_clientdata(client, pca);
0536
0537 mutex_init(&pca->lock);
0538
0539 ret = pca9685_read_reg(pca, PCA9685_MODE2, ®);
0540 if (ret)
0541 return ret;
0542
0543 if (device_property_read_bool(&client->dev, "invert"))
0544 reg |= MODE2_INVRT;
0545 else
0546 reg &= ~MODE2_INVRT;
0547
0548 if (device_property_read_bool(&client->dev, "open-drain"))
0549 reg &= ~MODE2_OUTDRV;
0550 else
0551 reg |= MODE2_OUTDRV;
0552
0553 ret = pca9685_write_reg(pca, PCA9685_MODE2, reg);
0554 if (ret)
0555 return ret;
0556
0557
0558 pca9685_read_reg(pca, PCA9685_MODE1, ®);
0559 reg &= ~(MODE1_ALLCALL | MODE1_SUB1 | MODE1_SUB2 | MODE1_SUB3);
0560 pca9685_write_reg(pca, PCA9685_MODE1, reg);
0561
0562
0563 pca9685_write_reg(pca, PCA9685_ALL_LED_OFF_L, 0);
0564 pca9685_write_reg(pca, PCA9685_ALL_LED_OFF_H, LED_FULL);
0565 pca9685_write_reg(pca, PCA9685_ALL_LED_ON_L, 0);
0566 pca9685_write_reg(pca, PCA9685_ALL_LED_ON_H, LED_FULL);
0567
0568 pca->chip.ops = &pca9685_pwm_ops;
0569
0570 pca->chip.npwm = PCA9685_MAXCHAN + 1;
0571
0572 pca->chip.dev = &client->dev;
0573
0574 ret = pwmchip_add(&pca->chip);
0575 if (ret < 0)
0576 return ret;
0577
0578 ret = pca9685_pwm_gpio_probe(pca);
0579 if (ret < 0) {
0580 pwmchip_remove(&pca->chip);
0581 return ret;
0582 }
0583
0584 pm_runtime_enable(&client->dev);
0585
0586 if (pm_runtime_enabled(&client->dev)) {
0587
0588
0589
0590
0591 pca9685_set_sleep_mode(pca, true);
0592 pm_runtime_set_suspended(&client->dev);
0593 } else {
0594
0595 pca9685_set_sleep_mode(pca, false);
0596 }
0597
0598 return 0;
0599 }
0600
0601 static int pca9685_pwm_remove(struct i2c_client *client)
0602 {
0603 struct pca9685 *pca = i2c_get_clientdata(client);
0604
0605 pwmchip_remove(&pca->chip);
0606
0607 if (!pm_runtime_enabled(&client->dev)) {
0608
0609 pca9685_set_sleep_mode(pca, true);
0610 }
0611
0612 pm_runtime_disable(&client->dev);
0613
0614 return 0;
0615 }
0616
0617 static int __maybe_unused pca9685_pwm_runtime_suspend(struct device *dev)
0618 {
0619 struct i2c_client *client = to_i2c_client(dev);
0620 struct pca9685 *pca = i2c_get_clientdata(client);
0621
0622 pca9685_set_sleep_mode(pca, true);
0623 return 0;
0624 }
0625
0626 static int __maybe_unused pca9685_pwm_runtime_resume(struct device *dev)
0627 {
0628 struct i2c_client *client = to_i2c_client(dev);
0629 struct pca9685 *pca = i2c_get_clientdata(client);
0630
0631 pca9685_set_sleep_mode(pca, false);
0632 return 0;
0633 }
0634
0635 static const struct i2c_device_id pca9685_id[] = {
0636 { "pca9685", 0 },
0637 { },
0638 };
0639 MODULE_DEVICE_TABLE(i2c, pca9685_id);
0640
0641 #ifdef CONFIG_ACPI
0642 static const struct acpi_device_id pca9685_acpi_ids[] = {
0643 { "INT3492", 0 },
0644 { },
0645 };
0646 MODULE_DEVICE_TABLE(acpi, pca9685_acpi_ids);
0647 #endif
0648
0649 #ifdef CONFIG_OF
0650 static const struct of_device_id pca9685_dt_ids[] = {
0651 { .compatible = "nxp,pca9685-pwm", },
0652 { }
0653 };
0654 MODULE_DEVICE_TABLE(of, pca9685_dt_ids);
0655 #endif
0656
0657 static const struct dev_pm_ops pca9685_pwm_pm = {
0658 SET_RUNTIME_PM_OPS(pca9685_pwm_runtime_suspend,
0659 pca9685_pwm_runtime_resume, NULL)
0660 };
0661
0662 static struct i2c_driver pca9685_i2c_driver = {
0663 .driver = {
0664 .name = "pca9685-pwm",
0665 .acpi_match_table = ACPI_PTR(pca9685_acpi_ids),
0666 .of_match_table = of_match_ptr(pca9685_dt_ids),
0667 .pm = &pca9685_pwm_pm,
0668 },
0669 .probe = pca9685_pwm_probe,
0670 .remove = pca9685_pwm_remove,
0671 .id_table = pca9685_id,
0672 };
0673
0674 module_i2c_driver(pca9685_i2c_driver);
0675
0676 MODULE_AUTHOR("Steffen Trumtrar <s.trumtrar@pengutronix.de>");
0677 MODULE_DESCRIPTION("PWM driver for PCA9685");
0678 MODULE_LICENSE("GPL");