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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * TI/National Semiconductor LP3943 PWM driver
0004  *
0005  * Copyright 2013 Texas Instruments
0006  *
0007  * Author: Milo Kim <milo.kim@ti.com>
0008  */
0009 
0010 #include <linux/err.h>
0011 #include <linux/i2c.h>
0012 #include <linux/mfd/lp3943.h>
0013 #include <linux/module.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/pwm.h>
0016 #include <linux/slab.h>
0017 
0018 #define LP3943_MAX_DUTY         255
0019 #define LP3943_MIN_PERIOD       6250
0020 #define LP3943_MAX_PERIOD       1600000
0021 
0022 struct lp3943_pwm {
0023     struct pwm_chip chip;
0024     struct lp3943 *lp3943;
0025     struct lp3943_platform_data *pdata;
0026 };
0027 
0028 static inline struct lp3943_pwm *to_lp3943_pwm(struct pwm_chip *_chip)
0029 {
0030     return container_of(_chip, struct lp3943_pwm, chip);
0031 }
0032 
0033 static struct lp3943_pwm_map *
0034 lp3943_pwm_request_map(struct lp3943_pwm *lp3943_pwm, int hwpwm)
0035 {
0036     struct lp3943_platform_data *pdata = lp3943_pwm->pdata;
0037     struct lp3943 *lp3943 = lp3943_pwm->lp3943;
0038     struct lp3943_pwm_map *pwm_map;
0039     int i, offset;
0040 
0041     pwm_map = kzalloc(sizeof(*pwm_map), GFP_KERNEL);
0042     if (!pwm_map)
0043         return ERR_PTR(-ENOMEM);
0044 
0045     pwm_map->output = pdata->pwms[hwpwm]->output;
0046     pwm_map->num_outputs = pdata->pwms[hwpwm]->num_outputs;
0047 
0048     for (i = 0; i < pwm_map->num_outputs; i++) {
0049         offset = pwm_map->output[i];
0050 
0051         /* Return an error if the pin is already assigned */
0052         if (test_and_set_bit(offset, &lp3943->pin_used)) {
0053             kfree(pwm_map);
0054             return ERR_PTR(-EBUSY);
0055         }
0056     }
0057 
0058     return pwm_map;
0059 }
0060 
0061 static int lp3943_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
0062 {
0063     struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
0064     struct lp3943_pwm_map *pwm_map;
0065 
0066     pwm_map = lp3943_pwm_request_map(lp3943_pwm, pwm->hwpwm);
0067     if (IS_ERR(pwm_map))
0068         return PTR_ERR(pwm_map);
0069 
0070     return pwm_set_chip_data(pwm, pwm_map);
0071 }
0072 
0073 static void lp3943_pwm_free_map(struct lp3943_pwm *lp3943_pwm,
0074                 struct lp3943_pwm_map *pwm_map)
0075 {
0076     struct lp3943 *lp3943 = lp3943_pwm->lp3943;
0077     int i, offset;
0078 
0079     for (i = 0; i < pwm_map->num_outputs; i++) {
0080         offset = pwm_map->output[i];
0081         clear_bit(offset, &lp3943->pin_used);
0082     }
0083 
0084     kfree(pwm_map);
0085 }
0086 
0087 static void lp3943_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
0088 {
0089     struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
0090     struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);
0091 
0092     lp3943_pwm_free_map(lp3943_pwm, pwm_map);
0093 }
0094 
0095 static int lp3943_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
0096                  u64 duty_ns, u64 period_ns)
0097 {
0098     struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
0099     struct lp3943 *lp3943 = lp3943_pwm->lp3943;
0100     u8 val, reg_duty, reg_prescale;
0101     int err;
0102 
0103     /*
0104      * How to configure the LP3943 PWMs
0105      *
0106      * 1) Period = 6250 ~ 1600000
0107      * 2) Prescale = period / 6250 -1
0108      * 3) Duty = input duty
0109      *
0110      * Prescale and duty are register values
0111      */
0112 
0113     if (pwm->hwpwm == 0) {
0114         reg_prescale = LP3943_REG_PRESCALE0;
0115         reg_duty     = LP3943_REG_PWM0;
0116     } else {
0117         reg_prescale = LP3943_REG_PRESCALE1;
0118         reg_duty     = LP3943_REG_PWM1;
0119     }
0120 
0121     /*
0122      * Note that after this clamping, period_ns fits into an int. This is
0123      * helpful because we can resort to integer division below instead of
0124      * the (more expensive) 64 bit division.
0125      */
0126     period_ns = clamp(period_ns, (u64)LP3943_MIN_PERIOD, (u64)LP3943_MAX_PERIOD);
0127     val       = (u8)((int)period_ns / LP3943_MIN_PERIOD - 1);
0128 
0129     err = lp3943_write_byte(lp3943, reg_prescale, val);
0130     if (err)
0131         return err;
0132 
0133     duty_ns = min(duty_ns, period_ns);
0134     val = (u8)((int)duty_ns * LP3943_MAX_DUTY / (int)period_ns);
0135 
0136     return lp3943_write_byte(lp3943, reg_duty, val);
0137 }
0138 
0139 static int lp3943_pwm_set_mode(struct lp3943_pwm *lp3943_pwm,
0140                    struct lp3943_pwm_map *pwm_map,
0141                    u8 val)
0142 {
0143     struct lp3943 *lp3943 = lp3943_pwm->lp3943;
0144     const struct lp3943_reg_cfg *mux = lp3943->mux_cfg;
0145     int i, index, err;
0146 
0147     for (i = 0; i < pwm_map->num_outputs; i++) {
0148         index = pwm_map->output[i];
0149         err = lp3943_update_bits(lp3943, mux[index].reg,
0150                      mux[index].mask,
0151                      val << mux[index].shift);
0152         if (err)
0153             return err;
0154     }
0155 
0156     return 0;
0157 }
0158 
0159 static int lp3943_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
0160 {
0161     struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
0162     struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);
0163     u8 val;
0164 
0165     if (pwm->hwpwm == 0)
0166         val = LP3943_DIM_PWM0;
0167     else
0168         val = LP3943_DIM_PWM1;
0169 
0170     /*
0171      * Each PWM generator is set to control any of outputs of LP3943.
0172      * To enable/disable the PWM, these output pins should be configured.
0173      */
0174 
0175     return lp3943_pwm_set_mode(lp3943_pwm, pwm_map, val);
0176 }
0177 
0178 static void lp3943_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
0179 {
0180     struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
0181     struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);
0182 
0183     /*
0184      * LP3943 outputs are open-drain, so the pin should be configured
0185      * when the PWM is disabled.
0186      */
0187 
0188     lp3943_pwm_set_mode(lp3943_pwm, pwm_map, LP3943_GPIO_OUT_HIGH);
0189 }
0190 
0191 static int lp3943_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
0192                 const struct pwm_state *state)
0193 {
0194     int err;
0195 
0196     if (state->polarity != PWM_POLARITY_NORMAL)
0197         return -EINVAL;
0198 
0199     if (!state->enabled) {
0200         if (pwm->state.enabled)
0201             lp3943_pwm_disable(chip, pwm);
0202         return 0;
0203     }
0204 
0205     err = lp3943_pwm_config(chip, pwm, state->duty_cycle, state->period);
0206     if (err)
0207         return err;
0208 
0209     if (!pwm->state.enabled)
0210         err = lp3943_pwm_enable(chip, pwm);
0211 
0212     return err;
0213 }
0214 
0215 static const struct pwm_ops lp3943_pwm_ops = {
0216     .request    = lp3943_pwm_request,
0217     .free       = lp3943_pwm_free,
0218     .apply      = lp3943_pwm_apply,
0219     .owner      = THIS_MODULE,
0220 };
0221 
0222 static int lp3943_pwm_parse_dt(struct device *dev,
0223                    struct lp3943_pwm *lp3943_pwm)
0224 {
0225     static const char * const name[] = { "ti,pwm0", "ti,pwm1", };
0226     struct device_node *node = dev->of_node;
0227     struct lp3943_platform_data *pdata;
0228     struct lp3943_pwm_map *pwm_map;
0229     enum lp3943_pwm_output *output;
0230     int i, err, proplen, count = 0;
0231     u32 num_outputs;
0232 
0233     if (!node)
0234         return -EINVAL;
0235 
0236     pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
0237     if (!pdata)
0238         return -ENOMEM;
0239 
0240     /*
0241      * Read the output map configuration from the device tree.
0242      * Each of the two PWM generators can drive zero or more outputs.
0243      */
0244 
0245     for (i = 0; i < LP3943_NUM_PWMS; i++) {
0246         if (!of_get_property(node, name[i], &proplen))
0247             continue;
0248 
0249         num_outputs = proplen / sizeof(u32);
0250         if (num_outputs == 0)
0251             continue;
0252 
0253         output = devm_kcalloc(dev, num_outputs, sizeof(*output),
0254                       GFP_KERNEL);
0255         if (!output)
0256             return -ENOMEM;
0257 
0258         err = of_property_read_u32_array(node, name[i], output,
0259                          num_outputs);
0260         if (err)
0261             return err;
0262 
0263         pwm_map = devm_kzalloc(dev, sizeof(*pwm_map), GFP_KERNEL);
0264         if (!pwm_map)
0265             return -ENOMEM;
0266 
0267         pwm_map->output = output;
0268         pwm_map->num_outputs = num_outputs;
0269         pdata->pwms[i] = pwm_map;
0270 
0271         count++;
0272     }
0273 
0274     if (count == 0)
0275         return -ENODATA;
0276 
0277     lp3943_pwm->pdata = pdata;
0278     return 0;
0279 }
0280 
0281 static int lp3943_pwm_probe(struct platform_device *pdev)
0282 {
0283     struct lp3943 *lp3943 = dev_get_drvdata(pdev->dev.parent);
0284     struct lp3943_pwm *lp3943_pwm;
0285     int ret;
0286 
0287     lp3943_pwm = devm_kzalloc(&pdev->dev, sizeof(*lp3943_pwm), GFP_KERNEL);
0288     if (!lp3943_pwm)
0289         return -ENOMEM;
0290 
0291     lp3943_pwm->pdata = lp3943->pdata;
0292     if (!lp3943_pwm->pdata) {
0293         if (IS_ENABLED(CONFIG_OF))
0294             ret = lp3943_pwm_parse_dt(&pdev->dev, lp3943_pwm);
0295         else
0296             ret = -ENODEV;
0297 
0298         if (ret)
0299             return ret;
0300     }
0301 
0302     lp3943_pwm->lp3943 = lp3943;
0303     lp3943_pwm->chip.dev = &pdev->dev;
0304     lp3943_pwm->chip.ops = &lp3943_pwm_ops;
0305     lp3943_pwm->chip.npwm = LP3943_NUM_PWMS;
0306 
0307     return devm_pwmchip_add(&pdev->dev, &lp3943_pwm->chip);
0308 }
0309 
0310 #ifdef CONFIG_OF
0311 static const struct of_device_id lp3943_pwm_of_match[] = {
0312     { .compatible = "ti,lp3943-pwm", },
0313     { }
0314 };
0315 MODULE_DEVICE_TABLE(of, lp3943_pwm_of_match);
0316 #endif
0317 
0318 static struct platform_driver lp3943_pwm_driver = {
0319     .probe = lp3943_pwm_probe,
0320     .driver = {
0321         .name = "lp3943-pwm",
0322         .of_match_table = of_match_ptr(lp3943_pwm_of_match),
0323     },
0324 };
0325 module_platform_driver(lp3943_pwm_driver);
0326 
0327 MODULE_DESCRIPTION("LP3943 PWM driver");
0328 MODULE_ALIAS("platform:lp3943-pwm");
0329 MODULE_AUTHOR("Milo Kim");
0330 MODULE_LICENSE("GPL");