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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * PTP 1588 clock for Freescale QorIQ 1588 timer
0004  *
0005  * Copyright (C) 2010 OMICRON electronics GmbH
0006  */
0007 
0008 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0009 
0010 #include <linux/device.h>
0011 #include <linux/hrtimer.h>
0012 #include <linux/kernel.h>
0013 #include <linux/module.h>
0014 #include <linux/of.h>
0015 #include <linux/of_platform.h>
0016 #include <linux/timex.h>
0017 #include <linux/slab.h>
0018 #include <linux/clk.h>
0019 
0020 #include <linux/fsl/ptp_qoriq.h>
0021 
0022 /*
0023  * Register access functions
0024  */
0025 
0026 /* Caller must hold ptp_qoriq->lock. */
0027 static u64 tmr_cnt_read(struct ptp_qoriq *ptp_qoriq)
0028 {
0029     struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
0030     u64 ns;
0031     u32 lo, hi;
0032 
0033     lo = ptp_qoriq->read(&regs->ctrl_regs->tmr_cnt_l);
0034     hi = ptp_qoriq->read(&regs->ctrl_regs->tmr_cnt_h);
0035     ns = ((u64) hi) << 32;
0036     ns |= lo;
0037     return ns;
0038 }
0039 
0040 /* Caller must hold ptp_qoriq->lock. */
0041 static void tmr_cnt_write(struct ptp_qoriq *ptp_qoriq, u64 ns)
0042 {
0043     struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
0044     u32 hi = ns >> 32;
0045     u32 lo = ns & 0xffffffff;
0046 
0047     ptp_qoriq->write(&regs->ctrl_regs->tmr_cnt_l, lo);
0048     ptp_qoriq->write(&regs->ctrl_regs->tmr_cnt_h, hi);
0049 }
0050 
0051 /* Caller must hold ptp_qoriq->lock. */
0052 static void set_alarm(struct ptp_qoriq *ptp_qoriq)
0053 {
0054     struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
0055     u64 ns;
0056     u32 lo, hi;
0057 
0058     ns = tmr_cnt_read(ptp_qoriq) + 1500000000ULL;
0059     ns = div_u64(ns, 1000000000UL) * 1000000000ULL;
0060     ns -= ptp_qoriq->tclk_period;
0061     hi = ns >> 32;
0062     lo = ns & 0xffffffff;
0063     ptp_qoriq->write(&regs->alarm_regs->tmr_alarm1_l, lo);
0064     ptp_qoriq->write(&regs->alarm_regs->tmr_alarm1_h, hi);
0065 }
0066 
0067 /* Caller must hold ptp_qoriq->lock. */
0068 static void set_fipers(struct ptp_qoriq *ptp_qoriq)
0069 {
0070     struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
0071 
0072     set_alarm(ptp_qoriq);
0073     ptp_qoriq->write(&regs->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1);
0074     ptp_qoriq->write(&regs->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2);
0075 
0076     if (ptp_qoriq->fiper3_support)
0077         ptp_qoriq->write(&regs->fiper_regs->tmr_fiper3,
0078                  ptp_qoriq->tmr_fiper3);
0079 }
0080 
0081 int extts_clean_up(struct ptp_qoriq *ptp_qoriq, int index, bool update_event)
0082 {
0083     struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
0084     struct ptp_clock_event event;
0085     void __iomem *reg_etts_l;
0086     void __iomem *reg_etts_h;
0087     u32 valid, lo, hi;
0088 
0089     switch (index) {
0090     case 0:
0091         valid = ETS1_VLD;
0092         reg_etts_l = &regs->etts_regs->tmr_etts1_l;
0093         reg_etts_h = &regs->etts_regs->tmr_etts1_h;
0094         break;
0095     case 1:
0096         valid = ETS2_VLD;
0097         reg_etts_l = &regs->etts_regs->tmr_etts2_l;
0098         reg_etts_h = &regs->etts_regs->tmr_etts2_h;
0099         break;
0100     default:
0101         return -EINVAL;
0102     }
0103 
0104     event.type = PTP_CLOCK_EXTTS;
0105     event.index = index;
0106 
0107     if (ptp_qoriq->extts_fifo_support)
0108         if (!(ptp_qoriq->read(&regs->ctrl_regs->tmr_stat) & valid))
0109             return 0;
0110 
0111     do {
0112         lo = ptp_qoriq->read(reg_etts_l);
0113         hi = ptp_qoriq->read(reg_etts_h);
0114 
0115         if (update_event) {
0116             event.timestamp = ((u64) hi) << 32;
0117             event.timestamp |= lo;
0118             ptp_clock_event(ptp_qoriq->clock, &event);
0119         }
0120 
0121         if (!ptp_qoriq->extts_fifo_support)
0122             break;
0123     } while (ptp_qoriq->read(&regs->ctrl_regs->tmr_stat) & valid);
0124 
0125     return 0;
0126 }
0127 EXPORT_SYMBOL_GPL(extts_clean_up);
0128 
0129 /*
0130  * Interrupt service routine
0131  */
0132 
0133 irqreturn_t ptp_qoriq_isr(int irq, void *priv)
0134 {
0135     struct ptp_qoriq *ptp_qoriq = priv;
0136     struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
0137     struct ptp_clock_event event;
0138     u32 ack = 0, mask, val, irqs;
0139 
0140     spin_lock(&ptp_qoriq->lock);
0141 
0142     val = ptp_qoriq->read(&regs->ctrl_regs->tmr_tevent);
0143     mask = ptp_qoriq->read(&regs->ctrl_regs->tmr_temask);
0144 
0145     spin_unlock(&ptp_qoriq->lock);
0146 
0147     irqs = val & mask;
0148 
0149     if (irqs & ETS1) {
0150         ack |= ETS1;
0151         extts_clean_up(ptp_qoriq, 0, true);
0152     }
0153 
0154     if (irqs & ETS2) {
0155         ack |= ETS2;
0156         extts_clean_up(ptp_qoriq, 1, true);
0157     }
0158 
0159     if (irqs & PP1) {
0160         ack |= PP1;
0161         event.type = PTP_CLOCK_PPS;
0162         ptp_clock_event(ptp_qoriq->clock, &event);
0163     }
0164 
0165     if (ack) {
0166         ptp_qoriq->write(&regs->ctrl_regs->tmr_tevent, ack);
0167         return IRQ_HANDLED;
0168     } else
0169         return IRQ_NONE;
0170 }
0171 EXPORT_SYMBOL_GPL(ptp_qoriq_isr);
0172 
0173 /*
0174  * PTP clock operations
0175  */
0176 
0177 int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
0178 {
0179     u64 adj, diff;
0180     u32 tmr_add;
0181     int neg_adj = 0;
0182     struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
0183     struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
0184 
0185     if (scaled_ppm < 0) {
0186         neg_adj = 1;
0187         scaled_ppm = -scaled_ppm;
0188     }
0189     tmr_add = ptp_qoriq->tmr_add;
0190     adj = tmr_add;
0191 
0192     /*
0193      * Calculate diff and round() to the nearest integer
0194      *
0195      * diff = adj * (ppb / 1000000000)
0196      *      = adj * scaled_ppm / 65536000000
0197      */
0198     diff = mul_u64_u64_div_u64(adj, scaled_ppm, 32768000000);
0199     diff = DIV64_U64_ROUND_UP(diff, 2);
0200 
0201     tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
0202     ptp_qoriq->write(&regs->ctrl_regs->tmr_add, tmr_add);
0203 
0204     return 0;
0205 }
0206 EXPORT_SYMBOL_GPL(ptp_qoriq_adjfine);
0207 
0208 int ptp_qoriq_adjtime(struct ptp_clock_info *ptp, s64 delta)
0209 {
0210     s64 now;
0211     unsigned long flags;
0212     struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
0213 
0214     spin_lock_irqsave(&ptp_qoriq->lock, flags);
0215 
0216     now = tmr_cnt_read(ptp_qoriq);
0217     now += delta;
0218     tmr_cnt_write(ptp_qoriq, now);
0219     set_fipers(ptp_qoriq);
0220 
0221     spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
0222 
0223     return 0;
0224 }
0225 EXPORT_SYMBOL_GPL(ptp_qoriq_adjtime);
0226 
0227 int ptp_qoriq_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
0228 {
0229     u64 ns;
0230     unsigned long flags;
0231     struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
0232 
0233     spin_lock_irqsave(&ptp_qoriq->lock, flags);
0234 
0235     ns = tmr_cnt_read(ptp_qoriq);
0236 
0237     spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
0238 
0239     *ts = ns_to_timespec64(ns);
0240 
0241     return 0;
0242 }
0243 EXPORT_SYMBOL_GPL(ptp_qoriq_gettime);
0244 
0245 int ptp_qoriq_settime(struct ptp_clock_info *ptp,
0246               const struct timespec64 *ts)
0247 {
0248     u64 ns;
0249     unsigned long flags;
0250     struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
0251 
0252     ns = timespec64_to_ns(ts);
0253 
0254     spin_lock_irqsave(&ptp_qoriq->lock, flags);
0255 
0256     tmr_cnt_write(ptp_qoriq, ns);
0257     set_fipers(ptp_qoriq);
0258 
0259     spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
0260 
0261     return 0;
0262 }
0263 EXPORT_SYMBOL_GPL(ptp_qoriq_settime);
0264 
0265 int ptp_qoriq_enable(struct ptp_clock_info *ptp,
0266              struct ptp_clock_request *rq, int on)
0267 {
0268     struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
0269     struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
0270     unsigned long flags;
0271     u32 bit, mask = 0;
0272 
0273     switch (rq->type) {
0274     case PTP_CLK_REQ_EXTTS:
0275         switch (rq->extts.index) {
0276         case 0:
0277             bit = ETS1EN;
0278             break;
0279         case 1:
0280             bit = ETS2EN;
0281             break;
0282         default:
0283             return -EINVAL;
0284         }
0285 
0286         if (on)
0287             extts_clean_up(ptp_qoriq, rq->extts.index, false);
0288 
0289         break;
0290     case PTP_CLK_REQ_PPS:
0291         bit = PP1EN;
0292         break;
0293     default:
0294         return -EOPNOTSUPP;
0295     }
0296 
0297     spin_lock_irqsave(&ptp_qoriq->lock, flags);
0298 
0299     mask = ptp_qoriq->read(&regs->ctrl_regs->tmr_temask);
0300     if (on) {
0301         mask |= bit;
0302         ptp_qoriq->write(&regs->ctrl_regs->tmr_tevent, bit);
0303     } else {
0304         mask &= ~bit;
0305     }
0306 
0307     ptp_qoriq->write(&regs->ctrl_regs->tmr_temask, mask);
0308 
0309     spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
0310     return 0;
0311 }
0312 EXPORT_SYMBOL_GPL(ptp_qoriq_enable);
0313 
0314 static const struct ptp_clock_info ptp_qoriq_caps = {
0315     .owner      = THIS_MODULE,
0316     .name       = "qoriq ptp clock",
0317     .max_adj    = 512000,
0318     .n_alarm    = 0,
0319     .n_ext_ts   = N_EXT_TS,
0320     .n_per_out  = 0,
0321     .n_pins     = 0,
0322     .pps        = 1,
0323     .adjfine    = ptp_qoriq_adjfine,
0324     .adjtime    = ptp_qoriq_adjtime,
0325     .gettime64  = ptp_qoriq_gettime,
0326     .settime64  = ptp_qoriq_settime,
0327     .enable     = ptp_qoriq_enable,
0328 };
0329 
0330 /**
0331  * ptp_qoriq_nominal_freq - calculate nominal frequency according to
0332  *              reference clock frequency
0333  *
0334  * @clk_src: reference clock frequency
0335  *
0336  * The nominal frequency is the desired clock frequency.
0337  * It should be less than the reference clock frequency.
0338  * It should be a factor of 1000MHz.
0339  *
0340  * Return the nominal frequency
0341  */
0342 static u32 ptp_qoriq_nominal_freq(u32 clk_src)
0343 {
0344     u32 remainder = 0;
0345 
0346     clk_src /= 1000000;
0347     remainder = clk_src % 100;
0348     if (remainder) {
0349         clk_src -= remainder;
0350         clk_src += 100;
0351     }
0352 
0353     do {
0354         clk_src -= 100;
0355 
0356     } while (1000 % clk_src);
0357 
0358     return clk_src * 1000000;
0359 }
0360 
0361 /**
0362  * ptp_qoriq_auto_config - calculate a set of default configurations
0363  *
0364  * @ptp_qoriq: pointer to ptp_qoriq
0365  * @node: pointer to device_node
0366  *
0367  * If below dts properties are not provided, this function will be
0368  * called to calculate a set of default configurations for them.
0369  *   "fsl,tclk-period"
0370  *   "fsl,tmr-prsc"
0371  *   "fsl,tmr-add"
0372  *   "fsl,tmr-fiper1"
0373  *   "fsl,tmr-fiper2"
0374  *   "fsl,tmr-fiper3" (required only for DPAA2 and ENETC hardware)
0375  *   "fsl,max-adj"
0376  *
0377  * Return 0 if success
0378  */
0379 static int ptp_qoriq_auto_config(struct ptp_qoriq *ptp_qoriq,
0380                  struct device_node *node)
0381 {
0382     struct clk *clk;
0383     u64 freq_comp;
0384     u64 max_adj;
0385     u32 nominal_freq;
0386     u32 remainder = 0;
0387     u32 clk_src = 0;
0388 
0389     ptp_qoriq->cksel = DEFAULT_CKSEL;
0390 
0391     clk = of_clk_get(node, 0);
0392     if (!IS_ERR(clk)) {
0393         clk_src = clk_get_rate(clk);
0394         clk_put(clk);
0395     }
0396 
0397     if (clk_src <= 100000000UL) {
0398         pr_err("error reference clock value, or lower than 100MHz\n");
0399         return -EINVAL;
0400     }
0401 
0402     nominal_freq = ptp_qoriq_nominal_freq(clk_src);
0403     if (!nominal_freq)
0404         return -EINVAL;
0405 
0406     ptp_qoriq->tclk_period = 1000000000UL / nominal_freq;
0407     ptp_qoriq->tmr_prsc = DEFAULT_TMR_PRSC;
0408 
0409     /* Calculate initial frequency compensation value for TMR_ADD register.
0410      * freq_comp = ceil(2^32 / freq_ratio)
0411      * freq_ratio = reference_clock_freq / nominal_freq
0412      */
0413     freq_comp = ((u64)1 << 32) * nominal_freq;
0414     freq_comp = div_u64_rem(freq_comp, clk_src, &remainder);
0415     if (remainder)
0416         freq_comp++;
0417 
0418     ptp_qoriq->tmr_add = freq_comp;
0419     ptp_qoriq->tmr_fiper1 = DEFAULT_FIPER1_PERIOD - ptp_qoriq->tclk_period;
0420     ptp_qoriq->tmr_fiper2 = DEFAULT_FIPER2_PERIOD - ptp_qoriq->tclk_period;
0421     ptp_qoriq->tmr_fiper3 = DEFAULT_FIPER3_PERIOD - ptp_qoriq->tclk_period;
0422 
0423     /* max_adj = 1000000000 * (freq_ratio - 1.0) - 1
0424      * freq_ratio = reference_clock_freq / nominal_freq
0425      */
0426     max_adj = 1000000000ULL * (clk_src - nominal_freq);
0427     max_adj = div_u64(max_adj, nominal_freq) - 1;
0428     ptp_qoriq->caps.max_adj = max_adj;
0429 
0430     return 0;
0431 }
0432 
0433 int ptp_qoriq_init(struct ptp_qoriq *ptp_qoriq, void __iomem *base,
0434            const struct ptp_clock_info *caps)
0435 {
0436     struct device_node *node = ptp_qoriq->dev->of_node;
0437     struct ptp_qoriq_registers *regs;
0438     struct timespec64 now;
0439     unsigned long flags;
0440     u32 tmr_ctrl;
0441 
0442     if (!node)
0443         return -ENODEV;
0444 
0445     ptp_qoriq->base = base;
0446     ptp_qoriq->caps = *caps;
0447 
0448     if (of_property_read_u32(node, "fsl,cksel", &ptp_qoriq->cksel))
0449         ptp_qoriq->cksel = DEFAULT_CKSEL;
0450 
0451     if (of_property_read_bool(node, "fsl,extts-fifo"))
0452         ptp_qoriq->extts_fifo_support = true;
0453     else
0454         ptp_qoriq->extts_fifo_support = false;
0455 
0456     if (of_device_is_compatible(node, "fsl,dpaa2-ptp") ||
0457         of_device_is_compatible(node, "fsl,enetc-ptp"))
0458         ptp_qoriq->fiper3_support = true;
0459 
0460     if (of_property_read_u32(node,
0461                  "fsl,tclk-period", &ptp_qoriq->tclk_period) ||
0462         of_property_read_u32(node,
0463                  "fsl,tmr-prsc", &ptp_qoriq->tmr_prsc) ||
0464         of_property_read_u32(node,
0465                  "fsl,tmr-add", &ptp_qoriq->tmr_add) ||
0466         of_property_read_u32(node,
0467                  "fsl,tmr-fiper1", &ptp_qoriq->tmr_fiper1) ||
0468         of_property_read_u32(node,
0469                  "fsl,tmr-fiper2", &ptp_qoriq->tmr_fiper2) ||
0470         of_property_read_u32(node,
0471                  "fsl,max-adj", &ptp_qoriq->caps.max_adj) ||
0472         (ptp_qoriq->fiper3_support &&
0473          of_property_read_u32(node, "fsl,tmr-fiper3",
0474                   &ptp_qoriq->tmr_fiper3))) {
0475         pr_warn("device tree node missing required elements, try automatic configuration\n");
0476 
0477         if (ptp_qoriq_auto_config(ptp_qoriq, node))
0478             return -ENODEV;
0479     }
0480 
0481     if (of_property_read_bool(node, "little-endian")) {
0482         ptp_qoriq->read = qoriq_read_le;
0483         ptp_qoriq->write = qoriq_write_le;
0484     } else {
0485         ptp_qoriq->read = qoriq_read_be;
0486         ptp_qoriq->write = qoriq_write_be;
0487     }
0488 
0489     /* The eTSEC uses differnt memory map with DPAA/ENETC */
0490     if (of_device_is_compatible(node, "fsl,etsec-ptp")) {
0491         ptp_qoriq->regs.ctrl_regs = base + ETSEC_CTRL_REGS_OFFSET;
0492         ptp_qoriq->regs.alarm_regs = base + ETSEC_ALARM_REGS_OFFSET;
0493         ptp_qoriq->regs.fiper_regs = base + ETSEC_FIPER_REGS_OFFSET;
0494         ptp_qoriq->regs.etts_regs = base + ETSEC_ETTS_REGS_OFFSET;
0495     } else {
0496         ptp_qoriq->regs.ctrl_regs = base + CTRL_REGS_OFFSET;
0497         ptp_qoriq->regs.alarm_regs = base + ALARM_REGS_OFFSET;
0498         ptp_qoriq->regs.fiper_regs = base + FIPER_REGS_OFFSET;
0499         ptp_qoriq->regs.etts_regs = base + ETTS_REGS_OFFSET;
0500     }
0501 
0502     spin_lock_init(&ptp_qoriq->lock);
0503 
0504     ktime_get_real_ts64(&now);
0505     ptp_qoriq_settime(&ptp_qoriq->caps, &now);
0506 
0507     tmr_ctrl =
0508       (ptp_qoriq->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT |
0509       (ptp_qoriq->cksel & CKSEL_MASK) << CKSEL_SHIFT;
0510 
0511     spin_lock_irqsave(&ptp_qoriq->lock, flags);
0512 
0513     regs = &ptp_qoriq->regs;
0514     ptp_qoriq->write(&regs->ctrl_regs->tmr_ctrl, tmr_ctrl);
0515     ptp_qoriq->write(&regs->ctrl_regs->tmr_add, ptp_qoriq->tmr_add);
0516     ptp_qoriq->write(&regs->ctrl_regs->tmr_prsc, ptp_qoriq->tmr_prsc);
0517     ptp_qoriq->write(&regs->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1);
0518     ptp_qoriq->write(&regs->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2);
0519 
0520     if (ptp_qoriq->fiper3_support)
0521         ptp_qoriq->write(&regs->fiper_regs->tmr_fiper3,
0522                  ptp_qoriq->tmr_fiper3);
0523 
0524     set_alarm(ptp_qoriq);
0525     ptp_qoriq->write(&regs->ctrl_regs->tmr_ctrl,
0526              tmr_ctrl|FIPERST|RTPE|TE|FRD);
0527 
0528     spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
0529 
0530     ptp_qoriq->clock = ptp_clock_register(&ptp_qoriq->caps, ptp_qoriq->dev);
0531     if (IS_ERR(ptp_qoriq->clock))
0532         return PTR_ERR(ptp_qoriq->clock);
0533 
0534     ptp_qoriq->phc_index = ptp_clock_index(ptp_qoriq->clock);
0535     ptp_qoriq_create_debugfs(ptp_qoriq);
0536     return 0;
0537 }
0538 EXPORT_SYMBOL_GPL(ptp_qoriq_init);
0539 
0540 void ptp_qoriq_free(struct ptp_qoriq *ptp_qoriq)
0541 {
0542     struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
0543 
0544     ptp_qoriq->write(&regs->ctrl_regs->tmr_temask, 0);
0545     ptp_qoriq->write(&regs->ctrl_regs->tmr_ctrl,   0);
0546 
0547     ptp_qoriq_remove_debugfs(ptp_qoriq);
0548     ptp_clock_unregister(ptp_qoriq->clock);
0549     iounmap(ptp_qoriq->base);
0550     free_irq(ptp_qoriq->irq, ptp_qoriq);
0551 }
0552 EXPORT_SYMBOL_GPL(ptp_qoriq_free);
0553 
0554 static int ptp_qoriq_probe(struct platform_device *dev)
0555 {
0556     struct ptp_qoriq *ptp_qoriq;
0557     int err = -ENOMEM;
0558     void __iomem *base;
0559 
0560     ptp_qoriq = kzalloc(sizeof(*ptp_qoriq), GFP_KERNEL);
0561     if (!ptp_qoriq)
0562         goto no_memory;
0563 
0564     ptp_qoriq->dev = &dev->dev;
0565 
0566     err = -ENODEV;
0567 
0568     ptp_qoriq->irq = platform_get_irq(dev, 0);
0569     if (ptp_qoriq->irq < 0) {
0570         pr_err("irq not in device tree\n");
0571         goto no_node;
0572     }
0573     if (request_irq(ptp_qoriq->irq, ptp_qoriq_isr, IRQF_SHARED,
0574             DRIVER, ptp_qoriq)) {
0575         pr_err("request_irq failed\n");
0576         goto no_node;
0577     }
0578 
0579     ptp_qoriq->rsrc = platform_get_resource(dev, IORESOURCE_MEM, 0);
0580     if (!ptp_qoriq->rsrc) {
0581         pr_err("no resource\n");
0582         goto no_resource;
0583     }
0584     if (request_resource(&iomem_resource, ptp_qoriq->rsrc)) {
0585         pr_err("resource busy\n");
0586         goto no_resource;
0587     }
0588 
0589     base = ioremap(ptp_qoriq->rsrc->start,
0590                resource_size(ptp_qoriq->rsrc));
0591     if (!base) {
0592         pr_err("ioremap ptp registers failed\n");
0593         goto no_ioremap;
0594     }
0595 
0596     err = ptp_qoriq_init(ptp_qoriq, base, &ptp_qoriq_caps);
0597     if (err)
0598         goto no_clock;
0599 
0600     platform_set_drvdata(dev, ptp_qoriq);
0601     return 0;
0602 
0603 no_clock:
0604     iounmap(ptp_qoriq->base);
0605 no_ioremap:
0606     release_resource(ptp_qoriq->rsrc);
0607 no_resource:
0608     free_irq(ptp_qoriq->irq, ptp_qoriq);
0609 no_node:
0610     kfree(ptp_qoriq);
0611 no_memory:
0612     return err;
0613 }
0614 
0615 static int ptp_qoriq_remove(struct platform_device *dev)
0616 {
0617     struct ptp_qoriq *ptp_qoriq = platform_get_drvdata(dev);
0618 
0619     ptp_qoriq_free(ptp_qoriq);
0620     release_resource(ptp_qoriq->rsrc);
0621     kfree(ptp_qoriq);
0622     return 0;
0623 }
0624 
0625 static const struct of_device_id match_table[] = {
0626     { .compatible = "fsl,etsec-ptp" },
0627     { .compatible = "fsl,fman-ptp-timer" },
0628     {},
0629 };
0630 MODULE_DEVICE_TABLE(of, match_table);
0631 
0632 static struct platform_driver ptp_qoriq_driver = {
0633     .driver = {
0634         .name       = "ptp_qoriq",
0635         .of_match_table = match_table,
0636     },
0637     .probe       = ptp_qoriq_probe,
0638     .remove      = ptp_qoriq_remove,
0639 };
0640 
0641 module_platform_driver(ptp_qoriq_driver);
0642 
0643 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
0644 MODULE_DESCRIPTION("PTP clock for Freescale QorIQ 1588 timer");
0645 MODULE_LICENSE("GPL");
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