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0005 #include <linux/err.h>
0006 #include <linux/i2c.h>
0007 #include <linux/init.h>
0008 #include <linux/interrupt.h>
0009 #include <linux/kernel.h>
0010 #include <linux/module.h>
0011 #include <linux/gpio/consumer.h>
0012 #include <linux/power_supply.h>
0013 #include <linux/regmap.h>
0014 #include <linux/types.h>
0015 #include <linux/delay.h>
0016 #include <linux/device.h>
0017 #include <linux/moduleparam.h>
0018 #include <linux/slab.h>
0019
0020 #include "bq25980_charger.h"
0021
0022 struct bq25980_state {
0023 bool dischg;
0024 bool ovp;
0025 bool ocp;
0026 bool wdt;
0027 bool tflt;
0028 bool online;
0029 bool ce;
0030 bool hiz;
0031 bool bypass;
0032
0033 u32 vbat_adc;
0034 u32 vsys_adc;
0035 u32 ibat_adc;
0036 };
0037
0038 enum bq25980_id {
0039 BQ25980,
0040 BQ25975,
0041 BQ25960,
0042 };
0043
0044 struct bq25980_chip_info {
0045
0046 int model_id;
0047
0048 const struct regmap_config *regmap_config;
0049
0050 int busocp_def;
0051 int busocp_sc_max;
0052 int busocp_byp_max;
0053 int busocp_sc_min;
0054 int busocp_byp_min;
0055
0056 int busovp_sc_def;
0057 int busovp_byp_def;
0058 int busovp_sc_step;
0059
0060 int busovp_sc_offset;
0061 int busovp_byp_step;
0062 int busovp_byp_offset;
0063 int busovp_sc_min;
0064 int busovp_sc_max;
0065 int busovp_byp_min;
0066 int busovp_byp_max;
0067
0068 int batovp_def;
0069 int batovp_max;
0070 int batovp_min;
0071 int batovp_step;
0072 int batovp_offset;
0073
0074 int batocp_def;
0075 int batocp_max;
0076 };
0077
0078 struct bq25980_init_data {
0079 u32 ichg;
0080 u32 bypass_ilim;
0081 u32 sc_ilim;
0082 u32 vreg;
0083 u32 iterm;
0084 u32 iprechg;
0085 u32 bypass_vlim;
0086 u32 sc_vlim;
0087 u32 ichg_max;
0088 u32 vreg_max;
0089 };
0090
0091 struct bq25980_device {
0092 struct i2c_client *client;
0093 struct device *dev;
0094 struct power_supply *charger;
0095 struct power_supply *battery;
0096 struct mutex lock;
0097 struct regmap *regmap;
0098
0099 char model_name[I2C_NAME_SIZE];
0100
0101 struct bq25980_init_data init_data;
0102 const struct bq25980_chip_info *chip_info;
0103 struct bq25980_state state;
0104 int watchdog_timer;
0105 };
0106
0107 static struct reg_default bq25980_reg_defs[] = {
0108 {BQ25980_BATOVP, 0x5A},
0109 {BQ25980_BATOVP_ALM, 0x46},
0110 {BQ25980_BATOCP, 0x51},
0111 {BQ25980_BATOCP_ALM, 0x50},
0112 {BQ25980_BATUCP_ALM, 0x28},
0113 {BQ25980_CHRGR_CTRL_1, 0x0},
0114 {BQ25980_BUSOVP, 0x26},
0115 {BQ25980_BUSOVP_ALM, 0x22},
0116 {BQ25980_BUSOCP, 0xD},
0117 {BQ25980_BUSOCP_ALM, 0xC},
0118 {BQ25980_TEMP_CONTROL, 0x30},
0119 {BQ25980_TDIE_ALM, 0xC8},
0120 {BQ25980_TSBUS_FLT, 0x15},
0121 {BQ25980_TSBAT_FLG, 0x15},
0122 {BQ25980_VAC_CONTROL, 0x0},
0123 {BQ25980_CHRGR_CTRL_2, 0x0},
0124 {BQ25980_CHRGR_CTRL_3, 0x20},
0125 {BQ25980_CHRGR_CTRL_4, 0x1D},
0126 {BQ25980_CHRGR_CTRL_5, 0x18},
0127 {BQ25980_STAT1, 0x0},
0128 {BQ25980_STAT2, 0x0},
0129 {BQ25980_STAT3, 0x0},
0130 {BQ25980_STAT4, 0x0},
0131 {BQ25980_STAT5, 0x0},
0132 {BQ25980_FLAG1, 0x0},
0133 {BQ25980_FLAG2, 0x0},
0134 {BQ25980_FLAG3, 0x0},
0135 {BQ25980_FLAG4, 0x0},
0136 {BQ25980_FLAG5, 0x0},
0137 {BQ25980_MASK1, 0x0},
0138 {BQ25980_MASK2, 0x0},
0139 {BQ25980_MASK3, 0x0},
0140 {BQ25980_MASK4, 0x0},
0141 {BQ25980_MASK5, 0x0},
0142 {BQ25980_DEVICE_INFO, 0x8},
0143 {BQ25980_ADC_CONTROL1, 0x0},
0144 {BQ25980_ADC_CONTROL2, 0x0},
0145 {BQ25980_IBUS_ADC_LSB, 0x0},
0146 {BQ25980_IBUS_ADC_MSB, 0x0},
0147 {BQ25980_VBUS_ADC_LSB, 0x0},
0148 {BQ25980_VBUS_ADC_MSB, 0x0},
0149 {BQ25980_VAC1_ADC_LSB, 0x0},
0150 {BQ25980_VAC2_ADC_LSB, 0x0},
0151 {BQ25980_VOUT_ADC_LSB, 0x0},
0152 {BQ25980_VBAT_ADC_LSB, 0x0},
0153 {BQ25980_IBAT_ADC_MSB, 0x0},
0154 {BQ25980_IBAT_ADC_LSB, 0x0},
0155 {BQ25980_TSBUS_ADC_LSB, 0x0},
0156 {BQ25980_TSBAT_ADC_LSB, 0x0},
0157 {BQ25980_TDIE_ADC_LSB, 0x0},
0158 {BQ25980_DEGLITCH_TIME, 0x0},
0159 {BQ25980_CHRGR_CTRL_6, 0x0},
0160 };
0161
0162 static struct reg_default bq25975_reg_defs[] = {
0163 {BQ25980_BATOVP, 0x5A},
0164 {BQ25980_BATOVP_ALM, 0x46},
0165 {BQ25980_BATOCP, 0x51},
0166 {BQ25980_BATOCP_ALM, 0x50},
0167 {BQ25980_BATUCP_ALM, 0x28},
0168 {BQ25980_CHRGR_CTRL_1, 0x0},
0169 {BQ25980_BUSOVP, 0x26},
0170 {BQ25980_BUSOVP_ALM, 0x22},
0171 {BQ25980_BUSOCP, 0xD},
0172 {BQ25980_BUSOCP_ALM, 0xC},
0173 {BQ25980_TEMP_CONTROL, 0x30},
0174 {BQ25980_TDIE_ALM, 0xC8},
0175 {BQ25980_TSBUS_FLT, 0x15},
0176 {BQ25980_TSBAT_FLG, 0x15},
0177 {BQ25980_VAC_CONTROL, 0x0},
0178 {BQ25980_CHRGR_CTRL_2, 0x0},
0179 {BQ25980_CHRGR_CTRL_3, 0x20},
0180 {BQ25980_CHRGR_CTRL_4, 0x1D},
0181 {BQ25980_CHRGR_CTRL_5, 0x18},
0182 {BQ25980_STAT1, 0x0},
0183 {BQ25980_STAT2, 0x0},
0184 {BQ25980_STAT3, 0x0},
0185 {BQ25980_STAT4, 0x0},
0186 {BQ25980_STAT5, 0x0},
0187 {BQ25980_FLAG1, 0x0},
0188 {BQ25980_FLAG2, 0x0},
0189 {BQ25980_FLAG3, 0x0},
0190 {BQ25980_FLAG4, 0x0},
0191 {BQ25980_FLAG5, 0x0},
0192 {BQ25980_MASK1, 0x0},
0193 {BQ25980_MASK2, 0x0},
0194 {BQ25980_MASK3, 0x0},
0195 {BQ25980_MASK4, 0x0},
0196 {BQ25980_MASK5, 0x0},
0197 {BQ25980_DEVICE_INFO, 0x8},
0198 {BQ25980_ADC_CONTROL1, 0x0},
0199 {BQ25980_ADC_CONTROL2, 0x0},
0200 {BQ25980_IBUS_ADC_LSB, 0x0},
0201 {BQ25980_IBUS_ADC_MSB, 0x0},
0202 {BQ25980_VBUS_ADC_LSB, 0x0},
0203 {BQ25980_VBUS_ADC_MSB, 0x0},
0204 {BQ25980_VAC1_ADC_LSB, 0x0},
0205 {BQ25980_VAC2_ADC_LSB, 0x0},
0206 {BQ25980_VOUT_ADC_LSB, 0x0},
0207 {BQ25980_VBAT_ADC_LSB, 0x0},
0208 {BQ25980_IBAT_ADC_MSB, 0x0},
0209 {BQ25980_IBAT_ADC_LSB, 0x0},
0210 {BQ25980_TSBUS_ADC_LSB, 0x0},
0211 {BQ25980_TSBAT_ADC_LSB, 0x0},
0212 {BQ25980_TDIE_ADC_LSB, 0x0},
0213 {BQ25980_DEGLITCH_TIME, 0x0},
0214 {BQ25980_CHRGR_CTRL_6, 0x0},
0215 };
0216
0217 static struct reg_default bq25960_reg_defs[] = {
0218 {BQ25980_BATOVP, 0x5A},
0219 {BQ25980_BATOVP_ALM, 0x46},
0220 {BQ25980_BATOCP, 0x51},
0221 {BQ25980_BATOCP_ALM, 0x50},
0222 {BQ25980_BATUCP_ALM, 0x28},
0223 {BQ25980_CHRGR_CTRL_1, 0x0},
0224 {BQ25980_BUSOVP, 0x26},
0225 {BQ25980_BUSOVP_ALM, 0x22},
0226 {BQ25980_BUSOCP, 0xD},
0227 {BQ25980_BUSOCP_ALM, 0xC},
0228 {BQ25980_TEMP_CONTROL, 0x30},
0229 {BQ25980_TDIE_ALM, 0xC8},
0230 {BQ25980_TSBUS_FLT, 0x15},
0231 {BQ25980_TSBAT_FLG, 0x15},
0232 {BQ25980_VAC_CONTROL, 0x0},
0233 {BQ25980_CHRGR_CTRL_2, 0x0},
0234 {BQ25980_CHRGR_CTRL_3, 0x20},
0235 {BQ25980_CHRGR_CTRL_4, 0x1D},
0236 {BQ25980_CHRGR_CTRL_5, 0x18},
0237 {BQ25980_STAT1, 0x0},
0238 {BQ25980_STAT2, 0x0},
0239 {BQ25980_STAT3, 0x0},
0240 {BQ25980_STAT4, 0x0},
0241 {BQ25980_STAT5, 0x0},
0242 {BQ25980_FLAG1, 0x0},
0243 {BQ25980_FLAG2, 0x0},
0244 {BQ25980_FLAG3, 0x0},
0245 {BQ25980_FLAG4, 0x0},
0246 {BQ25980_FLAG5, 0x0},
0247 {BQ25980_MASK1, 0x0},
0248 {BQ25980_MASK2, 0x0},
0249 {BQ25980_MASK3, 0x0},
0250 {BQ25980_MASK4, 0x0},
0251 {BQ25980_MASK5, 0x0},
0252 {BQ25980_DEVICE_INFO, 0x8},
0253 {BQ25980_ADC_CONTROL1, 0x0},
0254 {BQ25980_ADC_CONTROL2, 0x0},
0255 {BQ25980_IBUS_ADC_LSB, 0x0},
0256 {BQ25980_IBUS_ADC_MSB, 0x0},
0257 {BQ25980_VBUS_ADC_LSB, 0x0},
0258 {BQ25980_VBUS_ADC_MSB, 0x0},
0259 {BQ25980_VAC1_ADC_LSB, 0x0},
0260 {BQ25980_VAC2_ADC_LSB, 0x0},
0261 {BQ25980_VOUT_ADC_LSB, 0x0},
0262 {BQ25980_VBAT_ADC_LSB, 0x0},
0263 {BQ25980_IBAT_ADC_MSB, 0x0},
0264 {BQ25980_IBAT_ADC_LSB, 0x0},
0265 {BQ25980_TSBUS_ADC_LSB, 0x0},
0266 {BQ25980_TSBAT_ADC_LSB, 0x0},
0267 {BQ25980_TDIE_ADC_LSB, 0x0},
0268 {BQ25980_DEGLITCH_TIME, 0x0},
0269 {BQ25980_CHRGR_CTRL_6, 0x0},
0270 };
0271
0272 static int bq25980_watchdog_time[BQ25980_NUM_WD_VAL] = {5000, 10000, 50000,
0273 300000};
0274
0275 static int bq25980_get_input_curr_lim(struct bq25980_device *bq)
0276 {
0277 unsigned int busocp_reg_code;
0278 int ret;
0279
0280 ret = regmap_read(bq->regmap, BQ25980_BUSOCP, &busocp_reg_code);
0281 if (ret)
0282 return ret;
0283
0284 return (busocp_reg_code * BQ25980_BUSOCP_STEP_uA) + BQ25980_BUSOCP_OFFSET_uA;
0285 }
0286
0287 static int bq25980_set_hiz(struct bq25980_device *bq, int setting)
0288 {
0289 return regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2,
0290 BQ25980_EN_HIZ, setting);
0291 }
0292
0293 static int bq25980_set_input_curr_lim(struct bq25980_device *bq, int busocp)
0294 {
0295 unsigned int busocp_reg_code;
0296 int ret;
0297
0298 if (!busocp)
0299 return bq25980_set_hiz(bq, BQ25980_ENABLE_HIZ);
0300
0301 bq25980_set_hiz(bq, BQ25980_DISABLE_HIZ);
0302
0303 if (busocp < BQ25980_BUSOCP_MIN_uA)
0304 busocp = BQ25980_BUSOCP_MIN_uA;
0305
0306 if (bq->state.bypass)
0307 busocp = min(busocp, bq->chip_info->busocp_sc_max);
0308 else
0309 busocp = min(busocp, bq->chip_info->busocp_byp_max);
0310
0311 busocp_reg_code = (busocp - BQ25980_BUSOCP_OFFSET_uA)
0312 / BQ25980_BUSOCP_STEP_uA;
0313
0314 ret = regmap_write(bq->regmap, BQ25980_BUSOCP, busocp_reg_code);
0315 if (ret)
0316 return ret;
0317
0318 return regmap_write(bq->regmap, BQ25980_BUSOCP_ALM, busocp_reg_code);
0319 }
0320
0321 static int bq25980_get_input_volt_lim(struct bq25980_device *bq)
0322 {
0323 unsigned int busovp_reg_code;
0324 unsigned int busovp_offset;
0325 unsigned int busovp_step;
0326 int ret;
0327
0328 if (bq->state.bypass) {
0329 busovp_step = bq->chip_info->busovp_byp_step;
0330 busovp_offset = bq->chip_info->busovp_byp_offset;
0331 } else {
0332 busovp_step = bq->chip_info->busovp_sc_step;
0333 busovp_offset = bq->chip_info->busovp_sc_offset;
0334 }
0335
0336 ret = regmap_read(bq->regmap, BQ25980_BUSOVP, &busovp_reg_code);
0337 if (ret)
0338 return ret;
0339
0340 return (busovp_reg_code * busovp_step) + busovp_offset;
0341 }
0342
0343 static int bq25980_set_input_volt_lim(struct bq25980_device *bq, int busovp)
0344 {
0345 unsigned int busovp_reg_code;
0346 unsigned int busovp_step;
0347 unsigned int busovp_offset;
0348 int ret;
0349
0350 if (bq->state.bypass) {
0351 busovp_step = bq->chip_info->busovp_byp_step;
0352 busovp_offset = bq->chip_info->busovp_byp_offset;
0353 if (busovp > bq->chip_info->busovp_byp_max)
0354 busovp = bq->chip_info->busovp_byp_max;
0355 else if (busovp < bq->chip_info->busovp_byp_min)
0356 busovp = bq->chip_info->busovp_byp_min;
0357 } else {
0358 busovp_step = bq->chip_info->busovp_sc_step;
0359 busovp_offset = bq->chip_info->busovp_sc_offset;
0360 if (busovp > bq->chip_info->busovp_sc_max)
0361 busovp = bq->chip_info->busovp_sc_max;
0362 else if (busovp < bq->chip_info->busovp_sc_min)
0363 busovp = bq->chip_info->busovp_sc_min;
0364 }
0365
0366 busovp_reg_code = (busovp - busovp_offset) / busovp_step;
0367
0368 ret = regmap_write(bq->regmap, BQ25980_BUSOVP, busovp_reg_code);
0369 if (ret)
0370 return ret;
0371
0372 return regmap_write(bq->regmap, BQ25980_BUSOVP_ALM, busovp_reg_code);
0373 }
0374
0375 static int bq25980_get_const_charge_curr(struct bq25980_device *bq)
0376 {
0377 unsigned int batocp_reg_code;
0378 int ret;
0379
0380 ret = regmap_read(bq->regmap, BQ25980_BATOCP, &batocp_reg_code);
0381 if (ret)
0382 return ret;
0383
0384 return (batocp_reg_code & BQ25980_BATOCP_MASK) *
0385 BQ25980_BATOCP_STEP_uA;
0386 }
0387
0388 static int bq25980_set_const_charge_curr(struct bq25980_device *bq, int batocp)
0389 {
0390 unsigned int batocp_reg_code;
0391 int ret;
0392
0393 batocp = max(batocp, BQ25980_BATOCP_MIN_uA);
0394 batocp = min(batocp, bq->chip_info->batocp_max);
0395
0396 batocp_reg_code = batocp / BQ25980_BATOCP_STEP_uA;
0397
0398 ret = regmap_update_bits(bq->regmap, BQ25980_BATOCP,
0399 BQ25980_BATOCP_MASK, batocp_reg_code);
0400 if (ret)
0401 return ret;
0402
0403 return regmap_update_bits(bq->regmap, BQ25980_BATOCP_ALM,
0404 BQ25980_BATOCP_MASK, batocp_reg_code);
0405 }
0406
0407 static int bq25980_get_const_charge_volt(struct bq25980_device *bq)
0408 {
0409 unsigned int batovp_reg_code;
0410 int ret;
0411
0412 ret = regmap_read(bq->regmap, BQ25980_BATOVP, &batovp_reg_code);
0413 if (ret)
0414 return ret;
0415
0416 return ((batovp_reg_code * bq->chip_info->batovp_step) +
0417 bq->chip_info->batovp_offset);
0418 }
0419
0420 static int bq25980_set_const_charge_volt(struct bq25980_device *bq, int batovp)
0421 {
0422 unsigned int batovp_reg_code;
0423 int ret;
0424
0425 if (batovp < bq->chip_info->batovp_min)
0426 batovp = bq->chip_info->batovp_min;
0427
0428 if (batovp > bq->chip_info->batovp_max)
0429 batovp = bq->chip_info->batovp_max;
0430
0431 batovp_reg_code = (batovp - bq->chip_info->batovp_offset) /
0432 bq->chip_info->batovp_step;
0433
0434 ret = regmap_write(bq->regmap, BQ25980_BATOVP, batovp_reg_code);
0435 if (ret)
0436 return ret;
0437
0438 return regmap_write(bq->regmap, BQ25980_BATOVP_ALM, batovp_reg_code);
0439 }
0440
0441 static int bq25980_set_bypass(struct bq25980_device *bq, bool en_bypass)
0442 {
0443 int ret;
0444
0445 if (en_bypass)
0446 ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2,
0447 BQ25980_EN_BYPASS, BQ25980_EN_BYPASS);
0448 else
0449 ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2,
0450 BQ25980_EN_BYPASS, en_bypass);
0451 if (ret)
0452 return ret;
0453
0454 bq->state.bypass = en_bypass;
0455
0456 return bq->state.bypass;
0457 }
0458
0459 static int bq25980_set_chg_en(struct bq25980_device *bq, bool en_chg)
0460 {
0461 int ret;
0462
0463 if (en_chg)
0464 ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2,
0465 BQ25980_CHG_EN, BQ25980_CHG_EN);
0466 else
0467 ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2,
0468 BQ25980_CHG_EN, en_chg);
0469 if (ret)
0470 return ret;
0471
0472 bq->state.ce = en_chg;
0473
0474 return 0;
0475 }
0476
0477 static int bq25980_get_adc_ibus(struct bq25980_device *bq)
0478 {
0479 int ibus_adc_lsb, ibus_adc_msb;
0480 u16 ibus_adc;
0481 int ret;
0482
0483 ret = regmap_read(bq->regmap, BQ25980_IBUS_ADC_MSB, &ibus_adc_msb);
0484 if (ret)
0485 return ret;
0486
0487 ret = regmap_read(bq->regmap, BQ25980_IBUS_ADC_LSB, &ibus_adc_lsb);
0488 if (ret)
0489 return ret;
0490
0491 ibus_adc = (ibus_adc_msb << 8) | ibus_adc_lsb;
0492
0493 if (ibus_adc_msb & BQ25980_ADC_POLARITY_BIT)
0494 return ((ibus_adc ^ 0xffff) + 1) * BQ25980_ADC_CURR_STEP_uA;
0495
0496 return ibus_adc * BQ25980_ADC_CURR_STEP_uA;
0497 }
0498
0499 static int bq25980_get_adc_vbus(struct bq25980_device *bq)
0500 {
0501 int vbus_adc_lsb, vbus_adc_msb;
0502 u16 vbus_adc;
0503 int ret;
0504
0505 ret = regmap_read(bq->regmap, BQ25980_VBUS_ADC_MSB, &vbus_adc_msb);
0506 if (ret)
0507 return ret;
0508
0509 ret = regmap_read(bq->regmap, BQ25980_VBUS_ADC_LSB, &vbus_adc_lsb);
0510 if (ret)
0511 return ret;
0512
0513 vbus_adc = (vbus_adc_msb << 8) | vbus_adc_lsb;
0514
0515 return vbus_adc * BQ25980_ADC_VOLT_STEP_uV;
0516 }
0517
0518 static int bq25980_get_ibat_adc(struct bq25980_device *bq)
0519 {
0520 int ret;
0521 int ibat_adc_lsb, ibat_adc_msb;
0522 int ibat_adc;
0523
0524 ret = regmap_read(bq->regmap, BQ25980_IBAT_ADC_MSB, &ibat_adc_msb);
0525 if (ret)
0526 return ret;
0527
0528 ret = regmap_read(bq->regmap, BQ25980_IBAT_ADC_LSB, &ibat_adc_lsb);
0529 if (ret)
0530 return ret;
0531
0532 ibat_adc = (ibat_adc_msb << 8) | ibat_adc_lsb;
0533
0534 if (ibat_adc_msb & BQ25980_ADC_POLARITY_BIT)
0535 return ((ibat_adc ^ 0xffff) + 1) * BQ25980_ADC_CURR_STEP_uA;
0536
0537 return ibat_adc * BQ25980_ADC_CURR_STEP_uA;
0538 }
0539
0540 static int bq25980_get_adc_vbat(struct bq25980_device *bq)
0541 {
0542 int vsys_adc_lsb, vsys_adc_msb;
0543 u16 vsys_adc;
0544 int ret;
0545
0546 ret = regmap_read(bq->regmap, BQ25980_VBAT_ADC_MSB, &vsys_adc_msb);
0547 if (ret)
0548 return ret;
0549
0550 ret = regmap_read(bq->regmap, BQ25980_VBAT_ADC_LSB, &vsys_adc_lsb);
0551 if (ret)
0552 return ret;
0553
0554 vsys_adc = (vsys_adc_msb << 8) | vsys_adc_lsb;
0555
0556 return vsys_adc * BQ25980_ADC_VOLT_STEP_uV;
0557 }
0558
0559 static int bq25980_get_state(struct bq25980_device *bq,
0560 struct bq25980_state *state)
0561 {
0562 unsigned int chg_ctrl_2;
0563 unsigned int stat1;
0564 unsigned int stat2;
0565 unsigned int stat3;
0566 unsigned int stat4;
0567 unsigned int ibat_adc_msb;
0568 int ret;
0569
0570 ret = regmap_read(bq->regmap, BQ25980_STAT1, &stat1);
0571 if (ret)
0572 return ret;
0573
0574 ret = regmap_read(bq->regmap, BQ25980_STAT2, &stat2);
0575 if (ret)
0576 return ret;
0577
0578 ret = regmap_read(bq->regmap, BQ25980_STAT3, &stat3);
0579 if (ret)
0580 return ret;
0581
0582 ret = regmap_read(bq->regmap, BQ25980_STAT4, &stat4);
0583 if (ret)
0584 return ret;
0585
0586 ret = regmap_read(bq->regmap, BQ25980_CHRGR_CTRL_2, &chg_ctrl_2);
0587 if (ret)
0588 return ret;
0589
0590 ret = regmap_read(bq->regmap, BQ25980_IBAT_ADC_MSB, &ibat_adc_msb);
0591 if (ret)
0592 return ret;
0593
0594 state->dischg = ibat_adc_msb & BQ25980_ADC_POLARITY_BIT;
0595 state->ovp = (stat1 & BQ25980_STAT1_OVP_MASK) |
0596 (stat3 & BQ25980_STAT3_OVP_MASK);
0597 state->ocp = (stat1 & BQ25980_STAT1_OCP_MASK) |
0598 (stat2 & BQ25980_STAT2_OCP_MASK);
0599 state->tflt = stat4 & BQ25980_STAT4_TFLT_MASK;
0600 state->wdt = stat4 & BQ25980_WD_STAT;
0601 state->online = stat3 & BQ25980_PRESENT_MASK;
0602 state->ce = chg_ctrl_2 & BQ25980_CHG_EN;
0603 state->hiz = chg_ctrl_2 & BQ25980_EN_HIZ;
0604 state->bypass = chg_ctrl_2 & BQ25980_EN_BYPASS;
0605
0606 return 0;
0607 }
0608
0609 static int bq25980_get_battery_property(struct power_supply *psy,
0610 enum power_supply_property psp,
0611 union power_supply_propval *val)
0612 {
0613 struct bq25980_device *bq = power_supply_get_drvdata(psy);
0614 int ret = 0;
0615
0616 switch (psp) {
0617 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX:
0618 val->intval = bq->init_data.ichg_max;
0619 break;
0620
0621 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX:
0622 val->intval = bq->init_data.vreg_max;
0623 break;
0624
0625 case POWER_SUPPLY_PROP_CURRENT_NOW:
0626 ret = bq25980_get_ibat_adc(bq);
0627 val->intval = ret;
0628 break;
0629
0630 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
0631 ret = bq25980_get_adc_vbat(bq);
0632 if (ret < 0)
0633 return ret;
0634
0635 val->intval = ret;
0636 break;
0637
0638 default:
0639 return -EINVAL;
0640 }
0641
0642 return ret;
0643 }
0644
0645 static int bq25980_set_charger_property(struct power_supply *psy,
0646 enum power_supply_property prop,
0647 const union power_supply_propval *val)
0648 {
0649 struct bq25980_device *bq = power_supply_get_drvdata(psy);
0650 int ret = -EINVAL;
0651
0652 switch (prop) {
0653 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
0654 ret = bq25980_set_input_curr_lim(bq, val->intval);
0655 if (ret)
0656 return ret;
0657 break;
0658
0659 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
0660 ret = bq25980_set_input_volt_lim(bq, val->intval);
0661 if (ret)
0662 return ret;
0663 break;
0664
0665 case POWER_SUPPLY_PROP_CHARGE_TYPE:
0666 ret = bq25980_set_bypass(bq, val->intval);
0667 if (ret)
0668 return ret;
0669 break;
0670
0671 case POWER_SUPPLY_PROP_STATUS:
0672 ret = bq25980_set_chg_en(bq, val->intval);
0673 if (ret)
0674 return ret;
0675 break;
0676
0677 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
0678 ret = bq25980_set_const_charge_curr(bq, val->intval);
0679 if (ret)
0680 return ret;
0681 break;
0682
0683 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
0684 ret = bq25980_set_const_charge_volt(bq, val->intval);
0685 if (ret)
0686 return ret;
0687 break;
0688
0689 default:
0690 return -EINVAL;
0691 }
0692
0693 return ret;
0694 }
0695
0696 static int bq25980_get_charger_property(struct power_supply *psy,
0697 enum power_supply_property psp,
0698 union power_supply_propval *val)
0699 {
0700 struct bq25980_device *bq = power_supply_get_drvdata(psy);
0701 struct bq25980_state state;
0702 int ret = 0;
0703
0704 mutex_lock(&bq->lock);
0705 ret = bq25980_get_state(bq, &state);
0706 mutex_unlock(&bq->lock);
0707 if (ret)
0708 return ret;
0709
0710 switch (psp) {
0711 case POWER_SUPPLY_PROP_MANUFACTURER:
0712 val->strval = BQ25980_MANUFACTURER;
0713 break;
0714 case POWER_SUPPLY_PROP_MODEL_NAME:
0715 val->strval = bq->model_name;
0716 break;
0717 case POWER_SUPPLY_PROP_ONLINE:
0718 val->intval = state.online;
0719 break;
0720
0721 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
0722 ret = bq25980_get_input_volt_lim(bq);
0723 if (ret < 0)
0724 return ret;
0725 val->intval = ret;
0726 break;
0727
0728 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
0729 ret = bq25980_get_input_curr_lim(bq);
0730 if (ret < 0)
0731 return ret;
0732
0733 val->intval = ret;
0734 break;
0735
0736 case POWER_SUPPLY_PROP_HEALTH:
0737 val->intval = POWER_SUPPLY_HEALTH_GOOD;
0738
0739 if (state.tflt)
0740 val->intval = POWER_SUPPLY_HEALTH_OVERHEAT;
0741 else if (state.ovp)
0742 val->intval = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
0743 else if (state.ocp)
0744 val->intval = POWER_SUPPLY_HEALTH_OVERCURRENT;
0745 else if (state.wdt)
0746 val->intval =
0747 POWER_SUPPLY_HEALTH_WATCHDOG_TIMER_EXPIRE;
0748 break;
0749
0750 case POWER_SUPPLY_PROP_STATUS:
0751 val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
0752
0753 if ((state.ce) && (!state.hiz))
0754 val->intval = POWER_SUPPLY_STATUS_CHARGING;
0755 else if (state.dischg)
0756 val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
0757 else if (!state.ce)
0758 val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
0759 break;
0760
0761 case POWER_SUPPLY_PROP_CHARGE_TYPE:
0762 val->intval = POWER_SUPPLY_CHARGE_TYPE_UNKNOWN;
0763
0764 if (!state.ce)
0765 val->intval = POWER_SUPPLY_CHARGE_TYPE_NONE;
0766 else if (state.bypass)
0767 val->intval = POWER_SUPPLY_CHARGE_TYPE_BYPASS;
0768 else if (!state.bypass)
0769 val->intval = POWER_SUPPLY_CHARGE_TYPE_STANDARD;
0770 break;
0771
0772 case POWER_SUPPLY_PROP_CURRENT_NOW:
0773 ret = bq25980_get_adc_ibus(bq);
0774 if (ret < 0)
0775 return ret;
0776
0777 val->intval = ret;
0778 break;
0779
0780 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
0781 ret = bq25980_get_adc_vbus(bq);
0782 if (ret < 0)
0783 return ret;
0784
0785 val->intval = ret;
0786 break;
0787
0788 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
0789 ret = bq25980_get_const_charge_curr(bq);
0790 if (ret < 0)
0791 return ret;
0792
0793 val->intval = ret;
0794 break;
0795
0796 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
0797 ret = bq25980_get_const_charge_volt(bq);
0798 if (ret < 0)
0799 return ret;
0800
0801 val->intval = ret;
0802 break;
0803
0804 default:
0805 return -EINVAL;
0806 }
0807
0808 return ret;
0809 }
0810
0811 static bool bq25980_state_changed(struct bq25980_device *bq,
0812 struct bq25980_state *new_state)
0813 {
0814 struct bq25980_state old_state;
0815
0816 mutex_lock(&bq->lock);
0817 old_state = bq->state;
0818 mutex_unlock(&bq->lock);
0819
0820 return (old_state.dischg != new_state->dischg ||
0821 old_state.ovp != new_state->ovp ||
0822 old_state.ocp != new_state->ocp ||
0823 old_state.online != new_state->online ||
0824 old_state.wdt != new_state->wdt ||
0825 old_state.tflt != new_state->tflt ||
0826 old_state.ce != new_state->ce ||
0827 old_state.hiz != new_state->hiz ||
0828 old_state.bypass != new_state->bypass);
0829 }
0830
0831 static irqreturn_t bq25980_irq_handler_thread(int irq, void *private)
0832 {
0833 struct bq25980_device *bq = private;
0834 struct bq25980_state state;
0835 int ret;
0836
0837 ret = bq25980_get_state(bq, &state);
0838 if (ret < 0)
0839 goto irq_out;
0840
0841 if (!bq25980_state_changed(bq, &state))
0842 goto irq_out;
0843
0844 mutex_lock(&bq->lock);
0845 bq->state = state;
0846 mutex_unlock(&bq->lock);
0847
0848 power_supply_changed(bq->charger);
0849
0850 irq_out:
0851 return IRQ_HANDLED;
0852 }
0853
0854 static enum power_supply_property bq25980_power_supply_props[] = {
0855 POWER_SUPPLY_PROP_MANUFACTURER,
0856 POWER_SUPPLY_PROP_MODEL_NAME,
0857 POWER_SUPPLY_PROP_STATUS,
0858 POWER_SUPPLY_PROP_ONLINE,
0859 POWER_SUPPLY_PROP_HEALTH,
0860 POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT,
0861 POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT,
0862 POWER_SUPPLY_PROP_CHARGE_TYPE,
0863 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT,
0864 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE,
0865 POWER_SUPPLY_PROP_CURRENT_NOW,
0866 POWER_SUPPLY_PROP_VOLTAGE_NOW,
0867 };
0868
0869 static enum power_supply_property bq25980_battery_props[] = {
0870 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX,
0871 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX,
0872 POWER_SUPPLY_PROP_CURRENT_NOW,
0873 POWER_SUPPLY_PROP_VOLTAGE_NOW,
0874 };
0875
0876 static char *bq25980_charger_supplied_to[] = {
0877 "main-battery",
0878 };
0879
0880 static int bq25980_property_is_writeable(struct power_supply *psy,
0881 enum power_supply_property prop)
0882 {
0883 switch (prop) {
0884 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
0885 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
0886 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
0887 case POWER_SUPPLY_PROP_CHARGE_TYPE:
0888 case POWER_SUPPLY_PROP_STATUS:
0889 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
0890 return true;
0891 default:
0892 return false;
0893 }
0894 }
0895
0896 static const struct power_supply_desc bq25980_power_supply_desc = {
0897 .name = "bq25980-charger",
0898 .type = POWER_SUPPLY_TYPE_MAINS,
0899 .properties = bq25980_power_supply_props,
0900 .num_properties = ARRAY_SIZE(bq25980_power_supply_props),
0901 .get_property = bq25980_get_charger_property,
0902 .set_property = bq25980_set_charger_property,
0903 .property_is_writeable = bq25980_property_is_writeable,
0904 };
0905
0906 static struct power_supply_desc bq25980_battery_desc = {
0907 .name = "bq25980-battery",
0908 .type = POWER_SUPPLY_TYPE_BATTERY,
0909 .get_property = bq25980_get_battery_property,
0910 .properties = bq25980_battery_props,
0911 .num_properties = ARRAY_SIZE(bq25980_battery_props),
0912 .property_is_writeable = bq25980_property_is_writeable,
0913 };
0914
0915
0916 static bool bq25980_is_volatile_reg(struct device *dev, unsigned int reg)
0917 {
0918 switch (reg) {
0919 case BQ25980_CHRGR_CTRL_2:
0920 case BQ25980_STAT1...BQ25980_FLAG5:
0921 case BQ25980_ADC_CONTROL1...BQ25980_TDIE_ADC_LSB:
0922 return true;
0923 default:
0924 return false;
0925 }
0926 }
0927
0928 static const struct regmap_config bq25980_regmap_config = {
0929 .reg_bits = 8,
0930 .val_bits = 8,
0931
0932 .max_register = BQ25980_CHRGR_CTRL_6,
0933 .reg_defaults = bq25980_reg_defs,
0934 .num_reg_defaults = ARRAY_SIZE(bq25980_reg_defs),
0935 .cache_type = REGCACHE_RBTREE,
0936 .volatile_reg = bq25980_is_volatile_reg,
0937 };
0938
0939 static const struct regmap_config bq25975_regmap_config = {
0940 .reg_bits = 8,
0941 .val_bits = 8,
0942
0943 .max_register = BQ25980_CHRGR_CTRL_6,
0944 .reg_defaults = bq25975_reg_defs,
0945 .num_reg_defaults = ARRAY_SIZE(bq25975_reg_defs),
0946 .cache_type = REGCACHE_RBTREE,
0947 .volatile_reg = bq25980_is_volatile_reg,
0948 };
0949
0950 static const struct regmap_config bq25960_regmap_config = {
0951 .reg_bits = 8,
0952 .val_bits = 8,
0953
0954 .max_register = BQ25980_CHRGR_CTRL_6,
0955 .reg_defaults = bq25960_reg_defs,
0956 .num_reg_defaults = ARRAY_SIZE(bq25960_reg_defs),
0957 .cache_type = REGCACHE_RBTREE,
0958 .volatile_reg = bq25980_is_volatile_reg,
0959 };
0960
0961 static const struct bq25980_chip_info bq25980_chip_info_tbl[] = {
0962 [BQ25980] = {
0963 .model_id = BQ25980,
0964 .regmap_config = &bq25980_regmap_config,
0965
0966 .busocp_def = BQ25980_BUSOCP_DFLT_uA,
0967 .busocp_sc_min = BQ25960_BUSOCP_SC_MAX_uA,
0968 .busocp_sc_max = BQ25980_BUSOCP_SC_MAX_uA,
0969 .busocp_byp_max = BQ25980_BUSOCP_BYP_MAX_uA,
0970 .busocp_byp_min = BQ25980_BUSOCP_MIN_uA,
0971
0972 .busovp_sc_def = BQ25980_BUSOVP_DFLT_uV,
0973 .busovp_byp_def = BQ25980_BUSOVP_BYPASS_DFLT_uV,
0974 .busovp_sc_step = BQ25980_BUSOVP_SC_STEP_uV,
0975 .busovp_sc_offset = BQ25980_BUSOVP_SC_OFFSET_uV,
0976 .busovp_byp_step = BQ25980_BUSOVP_BYP_STEP_uV,
0977 .busovp_byp_offset = BQ25980_BUSOVP_BYP_OFFSET_uV,
0978 .busovp_sc_min = BQ25980_BUSOVP_SC_MIN_uV,
0979 .busovp_sc_max = BQ25980_BUSOVP_SC_MAX_uV,
0980 .busovp_byp_min = BQ25980_BUSOVP_BYP_MIN_uV,
0981 .busovp_byp_max = BQ25980_BUSOVP_BYP_MAX_uV,
0982
0983 .batovp_def = BQ25980_BATOVP_DFLT_uV,
0984 .batovp_max = BQ25980_BATOVP_MAX_uV,
0985 .batovp_min = BQ25980_BATOVP_MIN_uV,
0986 .batovp_step = BQ25980_BATOVP_STEP_uV,
0987 .batovp_offset = BQ25980_BATOVP_OFFSET_uV,
0988
0989 .batocp_def = BQ25980_BATOCP_DFLT_uA,
0990 .batocp_max = BQ25980_BATOCP_MAX_uA,
0991 },
0992
0993 [BQ25975] = {
0994 .model_id = BQ25975,
0995 .regmap_config = &bq25975_regmap_config,
0996
0997 .busocp_def = BQ25975_BUSOCP_DFLT_uA,
0998 .busocp_sc_min = BQ25975_BUSOCP_SC_MAX_uA,
0999 .busocp_sc_max = BQ25975_BUSOCP_SC_MAX_uA,
1000 .busocp_byp_min = BQ25980_BUSOCP_MIN_uA,
1001 .busocp_byp_max = BQ25975_BUSOCP_BYP_MAX_uA,
1002
1003 .busovp_sc_def = BQ25975_BUSOVP_DFLT_uV,
1004 .busovp_byp_def = BQ25975_BUSOVP_BYPASS_DFLT_uV,
1005 .busovp_sc_step = BQ25975_BUSOVP_SC_STEP_uV,
1006 .busovp_sc_offset = BQ25975_BUSOVP_SC_OFFSET_uV,
1007 .busovp_byp_step = BQ25975_BUSOVP_BYP_STEP_uV,
1008 .busovp_byp_offset = BQ25975_BUSOVP_BYP_OFFSET_uV,
1009 .busovp_sc_min = BQ25975_BUSOVP_SC_MIN_uV,
1010 .busovp_sc_max = BQ25975_BUSOVP_SC_MAX_uV,
1011 .busovp_byp_min = BQ25975_BUSOVP_BYP_MIN_uV,
1012 .busovp_byp_max = BQ25975_BUSOVP_BYP_MAX_uV,
1013
1014 .batovp_def = BQ25975_BATOVP_DFLT_uV,
1015 .batovp_max = BQ25975_BATOVP_MAX_uV,
1016 .batovp_min = BQ25975_BATOVP_MIN_uV,
1017 .batovp_step = BQ25975_BATOVP_STEP_uV,
1018 .batovp_offset = BQ25975_BATOVP_OFFSET_uV,
1019
1020 .batocp_def = BQ25980_BATOCP_DFLT_uA,
1021 .batocp_max = BQ25980_BATOCP_MAX_uA,
1022 },
1023
1024 [BQ25960] = {
1025 .model_id = BQ25960,
1026 .regmap_config = &bq25960_regmap_config,
1027
1028 .busocp_def = BQ25960_BUSOCP_DFLT_uA,
1029 .busocp_sc_min = BQ25960_BUSOCP_SC_MAX_uA,
1030 .busocp_sc_max = BQ25960_BUSOCP_SC_MAX_uA,
1031 .busocp_byp_min = BQ25960_BUSOCP_SC_MAX_uA,
1032 .busocp_byp_max = BQ25960_BUSOCP_BYP_MAX_uA,
1033
1034 .busovp_sc_def = BQ25975_BUSOVP_DFLT_uV,
1035 .busovp_byp_def = BQ25975_BUSOVP_BYPASS_DFLT_uV,
1036 .busovp_sc_step = BQ25960_BUSOVP_SC_STEP_uV,
1037 .busovp_sc_offset = BQ25960_BUSOVP_SC_OFFSET_uV,
1038 .busovp_byp_step = BQ25960_BUSOVP_BYP_STEP_uV,
1039 .busovp_byp_offset = BQ25960_BUSOVP_BYP_OFFSET_uV,
1040 .busovp_sc_min = BQ25960_BUSOVP_SC_MIN_uV,
1041 .busovp_sc_max = BQ25960_BUSOVP_SC_MAX_uV,
1042 .busovp_byp_min = BQ25960_BUSOVP_BYP_MIN_uV,
1043 .busovp_byp_max = BQ25960_BUSOVP_BYP_MAX_uV,
1044
1045 .batovp_def = BQ25960_BATOVP_DFLT_uV,
1046 .batovp_max = BQ25960_BATOVP_MAX_uV,
1047 .batovp_min = BQ25960_BATOVP_MIN_uV,
1048 .batovp_step = BQ25960_BATOVP_STEP_uV,
1049 .batovp_offset = BQ25960_BATOVP_OFFSET_uV,
1050
1051 .batocp_def = BQ25960_BATOCP_DFLT_uA,
1052 .batocp_max = BQ25960_BATOCP_MAX_uA,
1053 },
1054 };
1055
1056 static int bq25980_power_supply_init(struct bq25980_device *bq,
1057 struct device *dev)
1058 {
1059 struct power_supply_config psy_cfg = { .drv_data = bq,
1060 .of_node = dev->of_node, };
1061
1062 psy_cfg.supplied_to = bq25980_charger_supplied_to;
1063 psy_cfg.num_supplicants = ARRAY_SIZE(bq25980_charger_supplied_to);
1064
1065 bq->charger = devm_power_supply_register(bq->dev,
1066 &bq25980_power_supply_desc,
1067 &psy_cfg);
1068 if (IS_ERR(bq->charger))
1069 return -EINVAL;
1070
1071 bq->battery = devm_power_supply_register(bq->dev,
1072 &bq25980_battery_desc,
1073 &psy_cfg);
1074 if (IS_ERR(bq->battery))
1075 return -EINVAL;
1076
1077 return 0;
1078 }
1079
1080 static int bq25980_hw_init(struct bq25980_device *bq)
1081 {
1082 struct power_supply_battery_info *bat_info;
1083 int wd_reg_val = BQ25980_WATCHDOG_DIS;
1084 int wd_max_val = BQ25980_NUM_WD_VAL - 1;
1085 int ret = 0;
1086 int curr_val;
1087 int volt_val;
1088 int i;
1089
1090 if (bq->watchdog_timer) {
1091 if (bq->watchdog_timer >= bq25980_watchdog_time[wd_max_val])
1092 wd_reg_val = wd_max_val;
1093 else {
1094 for (i = 0; i < wd_max_val; i++) {
1095 if (bq->watchdog_timer > bq25980_watchdog_time[i] &&
1096 bq->watchdog_timer < bq25980_watchdog_time[i + 1]) {
1097 wd_reg_val = i;
1098 break;
1099 }
1100 }
1101 }
1102 }
1103
1104 ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_3,
1105 BQ25980_WATCHDOG_MASK, wd_reg_val);
1106 if (ret)
1107 return ret;
1108
1109 ret = power_supply_get_battery_info(bq->charger, &bat_info);
1110 if (ret) {
1111 dev_warn(bq->dev, "battery info missing\n");
1112 return -EINVAL;
1113 }
1114
1115 bq->init_data.ichg_max = bat_info->constant_charge_current_max_ua;
1116 bq->init_data.vreg_max = bat_info->constant_charge_voltage_max_uv;
1117
1118 if (bq->state.bypass) {
1119 ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2,
1120 BQ25980_EN_BYPASS, BQ25980_EN_BYPASS);
1121 if (ret)
1122 return ret;
1123
1124 curr_val = bq->init_data.bypass_ilim;
1125 volt_val = bq->init_data.bypass_vlim;
1126 } else {
1127 curr_val = bq->init_data.sc_ilim;
1128 volt_val = bq->init_data.sc_vlim;
1129 }
1130
1131 ret = bq25980_set_input_curr_lim(bq, curr_val);
1132 if (ret)
1133 return ret;
1134
1135 ret = bq25980_set_input_volt_lim(bq, volt_val);
1136 if (ret)
1137 return ret;
1138
1139 return regmap_update_bits(bq->regmap, BQ25980_ADC_CONTROL1,
1140 BQ25980_ADC_EN, BQ25980_ADC_EN);
1141 }
1142
1143 static int bq25980_parse_dt(struct bq25980_device *bq)
1144 {
1145 int ret;
1146
1147 ret = device_property_read_u32(bq->dev, "ti,watchdog-timeout-ms",
1148 &bq->watchdog_timer);
1149 if (ret)
1150 bq->watchdog_timer = BQ25980_WATCHDOG_MIN;
1151
1152 if (bq->watchdog_timer > BQ25980_WATCHDOG_MAX ||
1153 bq->watchdog_timer < BQ25980_WATCHDOG_MIN)
1154 return -EINVAL;
1155
1156 ret = device_property_read_u32(bq->dev,
1157 "ti,sc-ovp-limit-microvolt",
1158 &bq->init_data.sc_vlim);
1159 if (ret)
1160 bq->init_data.sc_vlim = bq->chip_info->busovp_sc_def;
1161
1162 if (bq->init_data.sc_vlim > bq->chip_info->busovp_sc_max ||
1163 bq->init_data.sc_vlim < bq->chip_info->busovp_sc_min) {
1164 dev_err(bq->dev, "SC ovp limit is out of range\n");
1165 return -EINVAL;
1166 }
1167
1168 ret = device_property_read_u32(bq->dev,
1169 "ti,sc-ocp-limit-microamp",
1170 &bq->init_data.sc_ilim);
1171 if (ret)
1172 bq->init_data.sc_ilim = bq->chip_info->busocp_def;
1173
1174 if (bq->init_data.sc_ilim > bq->chip_info->busocp_sc_max ||
1175 bq->init_data.sc_ilim < bq->chip_info->busocp_sc_min) {
1176 dev_err(bq->dev, "SC ocp limit is out of range\n");
1177 return -EINVAL;
1178 }
1179
1180 ret = device_property_read_u32(bq->dev,
1181 "ti,bypass-ovp-limit-microvolt",
1182 &bq->init_data.bypass_vlim);
1183 if (ret)
1184 bq->init_data.bypass_vlim = bq->chip_info->busovp_byp_def;
1185
1186 if (bq->init_data.bypass_vlim > bq->chip_info->busovp_byp_max ||
1187 bq->init_data.bypass_vlim < bq->chip_info->busovp_byp_min) {
1188 dev_err(bq->dev, "Bypass ovp limit is out of range\n");
1189 return -EINVAL;
1190 }
1191
1192 ret = device_property_read_u32(bq->dev,
1193 "ti,bypass-ocp-limit-microamp",
1194 &bq->init_data.bypass_ilim);
1195 if (ret)
1196 bq->init_data.bypass_ilim = bq->chip_info->busocp_def;
1197
1198 if (bq->init_data.bypass_ilim > bq->chip_info->busocp_byp_max ||
1199 bq->init_data.bypass_ilim < bq->chip_info->busocp_byp_min) {
1200 dev_err(bq->dev, "Bypass ocp limit is out of range\n");
1201 return -EINVAL;
1202 }
1203
1204
1205 bq->state.bypass = device_property_read_bool(bq->dev,
1206 "ti,bypass-enable");
1207 return 0;
1208 }
1209
1210 static int bq25980_probe(struct i2c_client *client,
1211 const struct i2c_device_id *id)
1212 {
1213 struct device *dev = &client->dev;
1214 struct bq25980_device *bq;
1215 int ret;
1216
1217 bq = devm_kzalloc(dev, sizeof(*bq), GFP_KERNEL);
1218 if (!bq)
1219 return -ENOMEM;
1220
1221 bq->client = client;
1222 bq->dev = dev;
1223
1224 mutex_init(&bq->lock);
1225
1226 strncpy(bq->model_name, id->name, I2C_NAME_SIZE);
1227 bq->chip_info = &bq25980_chip_info_tbl[id->driver_data];
1228
1229 bq->regmap = devm_regmap_init_i2c(client,
1230 bq->chip_info->regmap_config);
1231 if (IS_ERR(bq->regmap)) {
1232 dev_err(dev, "Failed to allocate register map\n");
1233 return PTR_ERR(bq->regmap);
1234 }
1235
1236 i2c_set_clientdata(client, bq);
1237
1238 ret = bq25980_parse_dt(bq);
1239 if (ret) {
1240 dev_err(dev, "Failed to read device tree properties%d\n", ret);
1241 return ret;
1242 }
1243
1244 if (client->irq) {
1245 ret = devm_request_threaded_irq(dev, client->irq, NULL,
1246 bq25980_irq_handler_thread,
1247 IRQF_TRIGGER_FALLING |
1248 IRQF_ONESHOT,
1249 dev_name(&client->dev), bq);
1250 if (ret)
1251 return ret;
1252 }
1253
1254 ret = bq25980_power_supply_init(bq, dev);
1255 if (ret) {
1256 dev_err(dev, "Failed to register power supply\n");
1257 return ret;
1258 }
1259
1260 ret = bq25980_hw_init(bq);
1261 if (ret) {
1262 dev_err(dev, "Cannot initialize the chip.\n");
1263 return ret;
1264 }
1265
1266 return 0;
1267 }
1268
1269 static const struct i2c_device_id bq25980_i2c_ids[] = {
1270 { "bq25980", BQ25980 },
1271 { "bq25975", BQ25975 },
1272 { "bq25960", BQ25960 },
1273 {},
1274 };
1275 MODULE_DEVICE_TABLE(i2c, bq25980_i2c_ids);
1276
1277 static const struct of_device_id bq25980_of_match[] = {
1278 { .compatible = "ti,bq25980", .data = (void *)BQ25980 },
1279 { .compatible = "ti,bq25975", .data = (void *)BQ25975 },
1280 { .compatible = "ti,bq25960", .data = (void *)BQ25960 },
1281 { },
1282 };
1283 MODULE_DEVICE_TABLE(of, bq25980_of_match);
1284
1285 static struct i2c_driver bq25980_driver = {
1286 .driver = {
1287 .name = "bq25980-charger",
1288 .of_match_table = bq25980_of_match,
1289 },
1290 .probe = bq25980_probe,
1291 .id_table = bq25980_i2c_ids,
1292 };
1293 module_i2c_driver(bq25980_driver);
1294
1295 MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
1296 MODULE_AUTHOR("Ricardo Rivera-Matos <r-rivera-matos@ti.com>");
1297 MODULE_DESCRIPTION("bq25980 charger driver");
1298 MODULE_LICENSE("GPL v2");
