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0011 #include <linux/bitops.h>
0012 #include <linux/delay.h>
0013 #include <linux/device.h>
0014 #include <linux/interrupt.h>
0015 #include <linux/io.h>
0016 #include <linux/mod_devicetable.h>
0017 #include <linux/module.h>
0018 #include <linux/platform_device.h>
0019
0020 #include <asm/intel_punit_ipc.h>
0021
0022
0023 #define OFFSET_DATA_LOW 0x0
0024 #define OFFSET_DATA_HIGH 0x4
0025
0026 #define CMD_RUN BIT(31)
0027 #define CMD_ERRCODE_MASK GENMASK(7, 0)
0028 #define CMD_PARA1_SHIFT 8
0029 #define CMD_PARA2_SHIFT 16
0030
0031 #define CMD_TIMEOUT_SECONDS 1
0032
0033 enum {
0034 BASE_DATA = 0,
0035 BASE_IFACE,
0036 BASE_MAX,
0037 };
0038
0039 typedef struct {
0040 struct device *dev;
0041 struct mutex lock;
0042 int irq;
0043 struct completion cmd_complete;
0044
0045 void __iomem *base[RESERVED_IPC][BASE_MAX];
0046 IPC_TYPE type;
0047 } IPC_DEV;
0048
0049 static IPC_DEV *punit_ipcdev;
0050
0051 static inline u32 ipc_read_status(IPC_DEV *ipcdev, IPC_TYPE type)
0052 {
0053 return readl(ipcdev->base[type][BASE_IFACE]);
0054 }
0055
0056 static inline void ipc_write_cmd(IPC_DEV *ipcdev, IPC_TYPE type, u32 cmd)
0057 {
0058 writel(cmd, ipcdev->base[type][BASE_IFACE]);
0059 }
0060
0061 static inline u32 ipc_read_data_low(IPC_DEV *ipcdev, IPC_TYPE type)
0062 {
0063 return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);
0064 }
0065
0066 static inline u32 ipc_read_data_high(IPC_DEV *ipcdev, IPC_TYPE type)
0067 {
0068 return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);
0069 }
0070
0071 static inline void ipc_write_data_low(IPC_DEV *ipcdev, IPC_TYPE type, u32 data)
0072 {
0073 writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);
0074 }
0075
0076 static inline void ipc_write_data_high(IPC_DEV *ipcdev, IPC_TYPE type, u32 data)
0077 {
0078 writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);
0079 }
0080
0081 static const char *ipc_err_string(int error)
0082 {
0083 if (error == IPC_PUNIT_ERR_SUCCESS)
0084 return "no error";
0085 else if (error == IPC_PUNIT_ERR_INVALID_CMD)
0086 return "invalid command";
0087 else if (error == IPC_PUNIT_ERR_INVALID_PARAMETER)
0088 return "invalid parameter";
0089 else if (error == IPC_PUNIT_ERR_CMD_TIMEOUT)
0090 return "command timeout";
0091 else if (error == IPC_PUNIT_ERR_CMD_LOCKED)
0092 return "command locked";
0093 else if (error == IPC_PUNIT_ERR_INVALID_VR_ID)
0094 return "invalid vr id";
0095 else if (error == IPC_PUNIT_ERR_VR_ERR)
0096 return "vr error";
0097 else
0098 return "unknown error";
0099 }
0100
0101 static int intel_punit_ipc_check_status(IPC_DEV *ipcdev, IPC_TYPE type)
0102 {
0103 int loops = CMD_TIMEOUT_SECONDS * USEC_PER_SEC;
0104 int errcode;
0105 int status;
0106
0107 if (ipcdev->irq) {
0108 if (!wait_for_completion_timeout(&ipcdev->cmd_complete,
0109 CMD_TIMEOUT_SECONDS * HZ)) {
0110 dev_err(ipcdev->dev, "IPC timed out\n");
0111 return -ETIMEDOUT;
0112 }
0113 } else {
0114 while ((ipc_read_status(ipcdev, type) & CMD_RUN) && --loops)
0115 udelay(1);
0116 if (!loops) {
0117 dev_err(ipcdev->dev, "IPC timed out\n");
0118 return -ETIMEDOUT;
0119 }
0120 }
0121
0122 status = ipc_read_status(ipcdev, type);
0123 errcode = status & CMD_ERRCODE_MASK;
0124 if (errcode) {
0125 dev_err(ipcdev->dev, "IPC failed: %s, IPC_STS=0x%x\n",
0126 ipc_err_string(errcode), status);
0127 return -EIO;
0128 }
0129
0130 return 0;
0131 }
0132
0133
0134
0135
0136
0137
0138
0139
0140
0141
0142
0143 int intel_punit_ipc_simple_command(int cmd, int para1, int para2)
0144 {
0145 IPC_DEV *ipcdev = punit_ipcdev;
0146 IPC_TYPE type;
0147 u32 val;
0148 int ret;
0149
0150 mutex_lock(&ipcdev->lock);
0151
0152 reinit_completion(&ipcdev->cmd_complete);
0153 type = (cmd & IPC_PUNIT_CMD_TYPE_MASK) >> IPC_TYPE_OFFSET;
0154
0155 val = cmd & ~IPC_PUNIT_CMD_TYPE_MASK;
0156 val |= CMD_RUN | para2 << CMD_PARA2_SHIFT | para1 << CMD_PARA1_SHIFT;
0157 ipc_write_cmd(ipcdev, type, val);
0158 ret = intel_punit_ipc_check_status(ipcdev, type);
0159
0160 mutex_unlock(&ipcdev->lock);
0161
0162 return ret;
0163 }
0164 EXPORT_SYMBOL(intel_punit_ipc_simple_command);
0165
0166
0167
0168
0169
0170
0171
0172
0173
0174
0175
0176
0177
0178 int intel_punit_ipc_command(u32 cmd, u32 para1, u32 para2, u32 *in, u32 *out)
0179 {
0180 IPC_DEV *ipcdev = punit_ipcdev;
0181 IPC_TYPE type;
0182 u32 val;
0183 int ret;
0184
0185 mutex_lock(&ipcdev->lock);
0186
0187 reinit_completion(&ipcdev->cmd_complete);
0188 type = (cmd & IPC_PUNIT_CMD_TYPE_MASK) >> IPC_TYPE_OFFSET;
0189
0190 if (in) {
0191 ipc_write_data_low(ipcdev, type, *in);
0192 if (type == GTDRIVER_IPC || type == ISPDRIVER_IPC)
0193 ipc_write_data_high(ipcdev, type, *++in);
0194 }
0195
0196 val = cmd & ~IPC_PUNIT_CMD_TYPE_MASK;
0197 val |= CMD_RUN | para2 << CMD_PARA2_SHIFT | para1 << CMD_PARA1_SHIFT;
0198 ipc_write_cmd(ipcdev, type, val);
0199
0200 ret = intel_punit_ipc_check_status(ipcdev, type);
0201 if (ret)
0202 goto out;
0203
0204 if (out) {
0205 *out = ipc_read_data_low(ipcdev, type);
0206 if (type == GTDRIVER_IPC || type == ISPDRIVER_IPC)
0207 *++out = ipc_read_data_high(ipcdev, type);
0208 }
0209
0210 out:
0211 mutex_unlock(&ipcdev->lock);
0212 return ret;
0213 }
0214 EXPORT_SYMBOL_GPL(intel_punit_ipc_command);
0215
0216 static irqreturn_t intel_punit_ioc(int irq, void *dev_id)
0217 {
0218 IPC_DEV *ipcdev = dev_id;
0219
0220 complete(&ipcdev->cmd_complete);
0221 return IRQ_HANDLED;
0222 }
0223
0224 static int intel_punit_get_bars(struct platform_device *pdev)
0225 {
0226 void __iomem *addr;
0227
0228
0229
0230
0231
0232
0233 addr = devm_platform_ioremap_resource(pdev, 0);
0234 if (IS_ERR(addr))
0235 return PTR_ERR(addr);
0236 punit_ipcdev->base[BIOS_IPC][BASE_DATA] = addr;
0237
0238 addr = devm_platform_ioremap_resource(pdev, 1);
0239 if (IS_ERR(addr))
0240 return PTR_ERR(addr);
0241 punit_ipcdev->base[BIOS_IPC][BASE_IFACE] = addr;
0242
0243
0244
0245
0246
0247
0248
0249
0250 addr = devm_platform_ioremap_resource(pdev, 2);
0251 if (!IS_ERR(addr))
0252 punit_ipcdev->base[ISPDRIVER_IPC][BASE_DATA] = addr;
0253
0254 addr = devm_platform_ioremap_resource(pdev, 3);
0255 if (!IS_ERR(addr))
0256 punit_ipcdev->base[ISPDRIVER_IPC][BASE_IFACE] = addr;
0257
0258 addr = devm_platform_ioremap_resource(pdev, 4);
0259 if (!IS_ERR(addr))
0260 punit_ipcdev->base[GTDRIVER_IPC][BASE_DATA] = addr;
0261
0262 addr = devm_platform_ioremap_resource(pdev, 5);
0263 if (!IS_ERR(addr))
0264 punit_ipcdev->base[GTDRIVER_IPC][BASE_IFACE] = addr;
0265
0266 return 0;
0267 }
0268
0269 static int intel_punit_ipc_probe(struct platform_device *pdev)
0270 {
0271 int irq, ret;
0272
0273 punit_ipcdev = devm_kzalloc(&pdev->dev,
0274 sizeof(*punit_ipcdev), GFP_KERNEL);
0275 if (!punit_ipcdev)
0276 return -ENOMEM;
0277
0278 platform_set_drvdata(pdev, punit_ipcdev);
0279
0280 irq = platform_get_irq_optional(pdev, 0);
0281 if (irq < 0) {
0282 dev_warn(&pdev->dev, "Invalid IRQ, using polling mode\n");
0283 } else {
0284 ret = devm_request_irq(&pdev->dev, irq, intel_punit_ioc,
0285 IRQF_NO_SUSPEND, "intel_punit_ipc",
0286 &punit_ipcdev);
0287 if (ret) {
0288 dev_err(&pdev->dev, "Failed to request irq: %d\n", irq);
0289 return ret;
0290 }
0291 punit_ipcdev->irq = irq;
0292 }
0293
0294 ret = intel_punit_get_bars(pdev);
0295 if (ret)
0296 return ret;
0297
0298 punit_ipcdev->dev = &pdev->dev;
0299 mutex_init(&punit_ipcdev->lock);
0300 init_completion(&punit_ipcdev->cmd_complete);
0301
0302 return 0;
0303 }
0304
0305 static int intel_punit_ipc_remove(struct platform_device *pdev)
0306 {
0307 return 0;
0308 }
0309
0310 static const struct acpi_device_id punit_ipc_acpi_ids[] = {
0311 { "INT34D4", 0 },
0312 { }
0313 };
0314 MODULE_DEVICE_TABLE(acpi, punit_ipc_acpi_ids);
0315
0316 static struct platform_driver intel_punit_ipc_driver = {
0317 .probe = intel_punit_ipc_probe,
0318 .remove = intel_punit_ipc_remove,
0319 .driver = {
0320 .name = "intel_punit_ipc",
0321 .acpi_match_table = punit_ipc_acpi_ids,
0322 },
0323 };
0324
0325 static int __init intel_punit_ipc_init(void)
0326 {
0327 return platform_driver_register(&intel_punit_ipc_driver);
0328 }
0329
0330 static void __exit intel_punit_ipc_exit(void)
0331 {
0332 platform_driver_unregister(&intel_punit_ipc_driver);
0333 }
0334
0335 MODULE_AUTHOR("Zha Qipeng <qipeng.zha@intel.com>");
0336 MODULE_DESCRIPTION("Intel P-Unit IPC driver");
0337 MODULE_LICENSE("GPL v2");
0338
0339
0340 fs_initcall(intel_punit_ipc_init);
0341 module_exit(intel_punit_ipc_exit);